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ISUAL Mass Memory
Robert Abiad
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 2
Outline
• Description• Requirements• Interfaces• Block Diagram• Usage Scheme• Parts• Development Status
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 3
Description
• 2.6 GBit organized as 64 M x 40 bits• 32 bit data word• 7 bit Error Correction Code per word corrects all
single bit errors and detects all double bit and some multiple bit errors.
• Base device is Samsung K4S560832A-TL1H 256 Mbit base device organized as 32M x 8bits.
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 4
Requirements
• Store data from Imager at 8M pixels/s data rate• Store data from Array Photometer at 20k samples/s x
32 channels/sample = 640k channels/s• Store data from Spectrophotometer at 10k samples/s
x 6 channels/sample = 60k channels/s• Read telemetry data at 1.6 Mb/s• Allow read/write from DPU• Allow read/write from DCM
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 5
Mass Memory Interfaces
ImagerIDC/
Mass Memory
DPU
12
DATASP
AP
CLK
CLK
STB
DATA-1
CLKSTB
DATA-2
DATACMD0CMD1CLK
DCM32
2
DATA
DATA
26ADDR
MBUSY
22
TelemetryCLKDATARTS
CTS
R/W
ACQUIRE
2
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 6
Priorities
• Imager• Memory Refresh• Telemetry• Array Photometer• Fast Spectrophotometer• Slow Spectrophotometer• DPU• DCM
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 7
Mass Memory Block Diagram
32MB SDRAM
32MB SDRAM
32MB SDRAM
32MB SDRAM
32MB SDRAM
32MB SDRAM
32MB SDRAM
32MB SDRAM
32MB SDRAM
32MB SDRAMLevel
Shift
Level
Shift
Data Interface
Address Interface
ImagerAPSPDPUDCMTLM
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 8
Usage Scheme
• Circular buffers
• Fill on trigger– M Pretrigger
– N Posttrigger
• Buffer switch
Buffer Allocation
TriggerM
N
A A
Buffer Allocation
B
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 9
SAMSUNG SDRAM
• Latch up immune up to 82 MeV/(mg/cm²)• Radiation hardened to 17-40 kRad total dose• Radiation study done by Innovative Concepts,
Inc. – No total dose issues
– SEU rate of ~100 events/day
– Uncorrectable error rate of ~4/day
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 10
Development Status
• Engineering unit designed and built• Actel 85% done• Board powered up• Currently debugging• First tests to be done with DPU• Interface tests planned with Imager and DCM
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 11
Schematics Page 1
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 12
Schematics Page 2
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 13
Schematics Page 3
NCKU UCB Tohoku Mass Memory R. Abiad
CDR 9-10 Jul 2001 14
Schematics Page 4
