3
*6 < ISSCC98 / SESSION 24 / DISK DRIVE SIGNAL PROCESSfNG / PAPER SP 24.4 1 SP 24.4: A CMOS DVD 4x Speed Read Channel Programmable Over 5 Octaves G-S. Kim, G-0. Gho, Y-H. Kim, B-S. Song’ Samsung Electronics Co. Ltd., Suwon, Korea ’University of Illinois, Urbana, IL Analog interface functions between optical pick-up and DSP in CD/ DVD ROM systems include pulse equalization, one-beam tracking error detection,plus many servo and glue functions such as three- beam tracking error generator for CD, shiny mirror surface detec- tor, defect detector,focus and focus error detectors,envelope detec- tor, laser power control, and reference generators, etc.. To date, pulse equalizer and one-beam tracking error generator have been implemented separately using bipolar, and a digital version has been introduced at the standard DVD speed 11, 21. This work uses CMOS to integrate all read channel functions up to the DVD 4x speed. Technical challenges are 5-octave programma- bility in the pulse equalizer and delay compensation in the one- beam tracking error detector. The DVD read channel is explained in Figure 1. Outputs A, B, C, and D from the pick-up assembly are summed and converted into a differential signal. The AGC amplifier consists of a variable-Gm stage followed by a transresistance amplifier. It sets the signal level to 1Vpp. The equalizer uses two real zeros symmetric around the imaginary axis [31. The key requirement in the pulse equalizer design is phase linearity to reduce the effect of intersymbol interference. The one-beam tracking error detection system is explained in Figure 2. Unlike the three-beam method, the phase difference between the A+C and B+D signals produces a tracking error. For example, if the pit of the track appears on the right side, the B+D signal makes transitions earlier than the A+C signal because the detector B detects the pit earlier than the other three. The phase difference of the two signals will be zero if the pit lies on the center of the beam. The standard disc pit depth is ?4 of the laser wavelength of 650nm. The delay adjustment is for discs with non-standard pit depths varying from 1/5 to 1/3 of the wavelength. For this, the push-pull delay control range needs to cover +60ns. The pulse equalizer is a 9th-order Bessel Gm-C filter with maxi- mally-flat group delay. For dynamic range considerations, two zeros are included in the last stage so that high-frequency noise is attenuated before boosting.The biquad with two symmetriczeros is shown in Figure 3. The differentiator consisting of R3 and C3 is fixed, and the boost is controlled by Gm2. The cutoff frequency of the equalizer is controlled by Gml while the boost is set by Gm2 independently of the frequency control. For the 4x speed DVD, the 25.6MHz component is boosted up to 12dB, and the Bessel filter cutoff frequency is set to about 34.5MHz. The group delay deviation of this filter is <+3%. Allpass delay network uses a symmetric pole-zero pair for delay adjustment. To achieve +80ns over the frequency band of interest, a 2-pole 2-zero Bessel delay equalizer is used. After delay equalization, the same 5th- order pulse equalizers are used to slim the A+C and B+D signals. The edge-sensitive phase detector detects both rising and falling edges with no dead zone. To disable the phase comparator output when the disc is defective, the missing pulse detector senses both A+C and B+D signals, and a pulse is generated when one of the signals does not make transitions. A variable Gm stage with common-mode feedback shown in Figure 4 uses two MOS transistors biased in triode region [41. Speed selection is programmable by switching in extra parallel Gm cells for higher speed. The output current of the Gm stage is integrated using a differentialpair integrator with its right-half-planezero canceled. All Gm stages for AGC amplifier, integrator, high-frequency boosting cell, and delay circuit are set with referenced to an external resistor. The three-beam tracking error used for CD generates an error voltage proportional to the difference in the outputs of E and F photodetectors. The bandwidth ofthis block is made adjustable for high-speedsearchmode, and the peak and bottom oftheoutput are balanced using digital servo control. The focus error block produces an output proportional to the difference between the A+C and B+D signals. The mirror detector senses shiny surface when the laser pick-up jumps between tracks. The mirror detector threshold is typically lOOmV, and the time constant is set by an external capacitor. The defect detector also senses a signal level lower than 1OOmV. The focus detector checks the summed signal whether it exceeds about 400mV. The envelopedetector is a peak detector, and its output is used to automatically balance the focus error signal. Most comparators are designed to have 70mV hysteresis so that comparator outputs may not glitch due to noise. The comparator for the summed channel is a wideband comparator using current switching push-pull structure. Its offset and asymme- try are canceled using dc servo feedback as shown in Figure 1. The prototype chip including all described functions uses 0.8pm CMOS. A chip micrograph is shown in Figure 5. The chip occupies 5x5mm2,but the equalizer and the one-beam tracking error detector occupy active areas of 2x2mm2 and 2x3mm2, respectively. The chip consumes 500mW with 5V supply. The equalizer is programmable from 0.7 to 25MHz covering more than five octaves. The measured frequency tuning range at any frequency setting is over 20%, and the boost is adjustable up to 12dB. Figure 6 shows the gain and group delay responses of the equalizer at different settings. When the gain at 25MHz is boosted by 9dB, the group delay variation is within +1.5ns ( 3%). The maximum adjustable delay of 93ns between the A+C and B+D signals is shown in Figure 7. Performance is summarized in Table 1. References. [ll for DVD,”Toshiba Data Sheet. [21 SAA7335, “DSP for CD and DVD ROM systems,” Philips Data Sheet. [31 De Veirman, G., R. Yamasaki, “Design of a bipolar 10-MHzprogram- mable continuous-time 0.05 equiripple linear phase filter,” IEEE J. Solid- State Circuits, vol. SC-27, pp. 324-331, March, 1992. 141 Laber, C., P. Gray, “A 20-MHz sixth-order BiCMOS parasitic-insensi- tive continuous-time filter and second-order equalizer optimized for disc- drive read channels,” IEEE J. Solid-stateCircuits, vol. SC-28, pp. 462-470, April, 1993. TA1236F and TA1253FN, “RF processor and tracking error generator Technology Boosted frequency Tuning range Maximum boost Phase linearity One-beam error gain Delay tuning range Power consumption Chip area 0.8pm CMOS 0.7 to 25MHz +20% 12dB <*3% 1V/9O0 29311s 500mW a t 5V 5x5mmz Table 1: Performance summary. 3RA fI.7RVLA?AA.l/QR I kln fUl $448 IFFF lntmrnntinnal Snlicl-Statm f!lrriiitc Cnnforonra

ISSCC98 SESSION 24 DISK DRIVE SIGNAL PROCESSfNG PAPER … · 2019. 11. 10. · 12dB. Figure 6 shows the gain and group delay responses of the equalizer at different settings. When

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Page 1: ISSCC98 SESSION 24 DISK DRIVE SIGNAL PROCESSfNG PAPER … · 2019. 11. 10. · 12dB. Figure 6 shows the gain and group delay responses of the equalizer at different settings. When

*6 < ISSCC98 / SESSION 24 / DISK DRIVE SIGNAL PROCESSfNG / PAPER SP 24.4 1

SP 24.4: A CMOS DVD 4x Speed Read Channel Programmable Over 5 Octaves

G-S. Kim, G-0. Gho, Y-H. Kim, B-S. Song’

Samsung Electronics Co. Ltd., Suwon, Korea ’University of Illinois, Urbana, IL

Analog interface functions between optical pick-up and DSP in CD/ DVD ROM systems include pulse equalization, one-beam tracking error detection, plus many servo and glue functions such as three- beam tracking error generator for CD, shiny mirror surface detec- tor, defect detector, focus and focus error detectors, envelope detec- tor, laser power control, and reference generators, etc.. To date, pulse equalizer and one-beam tracking error generator have been implemented separately using bipolar, and a digital version has been introduced at the standard DVD speed 11, 21. This work uses CMOS to integrate all read channel functions up to the DVD 4x speed. Technical challenges are 5-octave programma- bility in the pulse equalizer and delay compensation in the one- beam tracking error detector.

The DVD read channel is explained in Figure 1. Outputs A, B, C, and D from the pick-up assembly are summed and converted into a differential signal. The AGC amplifier consists of a variable-Gm stage followed by a transresistance amplifier. It sets the signal level to 1Vpp. The equalizer uses two real zeros symmetric around the imaginary axis [31. The key requirement in the pulse equalizer design is phase linearity to reduce the effect of intersymbol interference. The one-beam tracking error detection system is explained in Figure 2. Unlike the three-beam method, the phase difference between the A+C and B+D signals produces a tracking error. For example, if the pit of the track appears on the right side, the B+D signal makes transitions earlier than the A+C signal because the detector B detects the pit earlier than the other three. The phase difference of the two signals will be zero if the pit lies on the center of the beam. The standard disc pit depth is ?4 of the laser wavelength of 650nm. The delay adjustment is for discs with non-standard pit depths varying from 1/5 to 1/3 of the wavelength. For this, the push-pull delay control range needs to cover +60ns.

The pulse equalizer is a 9th-order Bessel Gm-C filter with maxi- mally-flat group delay. For dynamic range considerations, two zeros are included in the last stage so that high-frequency noise is attenuated before boosting. The biquad with two symmetric zeros is shown in Figure 3. The differentiator consisting of R3 and C3 is fixed, and the boost is controlled by Gm2. The cutoff frequency of the equalizer is controlled by Gml while the boost is set by Gm2 independently of the frequency control. For the 4x speed DVD, the 25.6MHz component is boosted up to 12dB, and the Bessel filter cutoff frequency is set to about 34.5MHz. The group delay deviation of this filter is <+3%. Allpass delay network uses a symmetric pole-zero pair for delay adjustment. To achieve +80ns over the frequency band of interest, a 2-pole 2-zero Bessel delay equalizer is used. After delay equalization, the same 5th- order pulse equalizers are used to slim the A+C and B+D signals. The edge-sensitive phase detector detects both rising and falling edges with no dead zone. To disable the phase comparator output when the disc is defective, the missing pulse detector senses both A+C and B+D signals, and a pulse is generated when one of the signals does not make transitions. A variable Gm stage with common-mode feedback shown in Figure 4 uses two MOS transistors biased in triode region [41. Speed selection is programmable by switching in extra parallel Gm cells for higher speed. The output current of the Gm stage is integrated using a differential pair integrator with its right-half-plane zero canceled.

All Gm stages for AGC amplifier, integrator, high-frequency boosting cell, and delay circuit are set with referenced to an external resistor.

The three-beam tracking error used for CD generates an error voltage proportional to the difference in the outputs of E and F photodetectors. The bandwidth ofthis block is made adjustable for high-speed searchmode, and the peak and bottom ofthe output are balanced using digital servo control. The focus error block produces an output proportional to the difference between the A+C and B+D signals. The mirror detector senses shiny surface when the laser pick-up jumps between tracks. The mirror detector threshold is typically lOOmV, and the time constant is set by an external capacitor. The defect detector also senses a signal level lower than 1OOmV. The focus detector checks the summed signal whether it exceeds about 400mV. The envelope detector is a peak detector, and its output is used to automatically balance the focus error signal. Most comparators are designed to have 70mV hysteresis so that comparator outputs may not glitch due to noise. The comparator for the summed channel is a wideband comparator using current switching push-pull structure. Its offset and asymme- try are canceled using dc servo feedback as shown in Figure 1.

The prototype chip including all described functions uses 0.8pm CMOS. A chip micrograph is shown in Figure 5. The chip occupies 5x5mm2, but the equalizer and the one-beam tracking error detector occupy active areas of 2x2mm2 and 2x3mm2, respectively. The chip consumes 500mW with 5V supply. The equalizer is programmable from 0.7 to 25MHz covering more than five octaves. The measured frequency tuning range at any frequency setting is over 20%, and the boost is adjustable up to 12dB. Figure 6 shows the gain and group delay responses of the equalizer at different settings. When the gain at 25MHz is boosted by 9dB, the group delay variation is within +1.5ns ( 3%). The maximum adjustable delay of 93ns between the A+C and B+D signals is shown in Figure 7. Performance is summarized in Table 1.

References.

[ l l for DVD,” Toshiba Data Sheet.

[21 SAA7335, “DSP for CD and DVD ROM systems,” Philips Data Sheet.

[31 De Veirman, G., R. Yamasaki, “Design of a bipolar 10-MHz program- mable continuous-time 0.05 equiripple linear phase filter,” IEEE J. Solid- State Circuits, vol. SC-27, pp. 324-331, March, 1992.

141 Laber, C., P. Gray, “A 20-MHz sixth-order BiCMOS parasitic-insensi- tive continuous-time filter and second-order equalizer optimized for disc- drive read channels,” IEEE J. Solid-state Circuits, vol. SC-28, pp. 462-470, April, 1993.

TA1236F and TA1253FN, “RF processor and tracking error generator

Technology Boosted frequency Tuning range Maximum boost Phase linearity One-beam error gain Delay tuning range Power consumption Chip area

0.8pm CMOS 0.7 to 25MHz +20% 12dB <*3% 1V/9O0 29311s 500mW at 5V 5x5mmz

Table 1: Performance summary.

3 R A fI.7RVLA?AA.l/QR I k ln fUl $448 IFFF lntmrnntinnal Snlicl-Statm f!lrriiitc Cnnforonra

Page 2: ISSCC98 SESSION 24 DISK DRIVE SIGNAL PROCESSfNG PAPER … · 2019. 11. 10. · 12dB. Figure 6 shows the gain and group delay responses of the equalizer at different settings. When

ISSCC98 I February 7,1998 / Salon 8 I 3:15 PM

PULSE

FREQUENCY 6 8009T TUNING CONTROL

E TE 38 F TRACKING

MIRROR DETECT

DEFECT

DETECT

ENVELOPE DETECT

Figure 1: Analog front-end for optical disc read channels.

I I

FREQ.

Figure 3: Tunable biquad with two symmetric zeros.

C H I MEM 109 MAG 5 d S / REF 6 585 d S CHi? MEM d e l a y 5 005 ne/ REF 35 22 " 5

PRm

COP

r

PRm

C O P

START 1.000 000 MHL STOP 50.000 000 M H z

Figure 6 Pulse equalizer gain and group delay responses.

1

Figure 2: One-beam tracking error detection for DVD.

2 t-I" Figure 4: Variable Gm cell with common-mode

feedback. Figure 5: See page 469.

I 1 I

Figure 7: Maximum delay adjustment for two channels.

DIGEST OF TECHNICAL PAPERS 385

Page 3: ISSCC98 SESSION 24 DISK DRIVE SIGNAL PROCESSfNG PAPER … · 2019. 11. 10. · 12dB. Figure 6 shows the gain and group delay responses of the equalizer at different settings. When

-~ SP 24.4:A CMOS DVD 4x Speed Read Channel Programmable Over 5 Octaves

(Continued from page 385) %..

Figure 5: Die micrograph

SP 24.5: A 240Mbps 1W CMOS EPRML Read Channel LSI for Hard Disk Drives (Continued from page 387)

Figure 6 Die micrograph.

DIGEST OF TECHNICAL PAPERS 469