© 2012 TSMC, Ltd

TSMC Property

IP Quality

Dan Kochpatcharin

Deputy Director

Design and Technology Platform

TSMC

© 2012 TSMC, Ltd

TSMC Property

Agenda

TSMC Background

IP Quality

© 2012 TSMC, Ltd

TSMC Property

TSMC Highlights

• Founded in 1987

• The world's first dedicated semiconductor foundry

• Fabs in Taiwan, U.S.A., Singapore and China

• 2011 total managed capacity reached 13.22 million 8” wafer

equivalents

• 2011 total revenue reached a new high at US$14.54 billion

• Launched TSMC Solar and Lighting businesses in 2009

• Recognized for its environmental achievements 11 straight years by

the Dow Jones Sustainability Index

© 2012 TSMC, Ltd

TSMC Property

Available Developing

Logic MEMS

65/55nm

90/80nm

0.13/0.11µm

0.25µm

0.35µm

>0.5µm

40nm

28nm

0.18/0.15µm

Analog

20nm

Expanding Functionality Expanding Functionality

BCD- Power IC

Embedded DRAM

MCU (Embedded Flash)

RF CMOS

High Voltage

CMOS Image Sensor

A D

D

M

R

B

M C

TSMC Process Types

© 2012 TSMC, Ltd

TSMC Property

Increasing Innovation – More

Functions Human-Centric

Visual

Perf

orm

ance

DT/NB

Tablet/Ultrabook

Smart phone

CRT TV SD 720 x 480i

2GHz

>2.5GHz

Time

Full HD 1920 x 1080p 1G Hz

Future PC

Future Phone

Basic Phone

>1.5G Hz

300 MHz

>3.5GHz

>2.5G Hz

Glassless 3D 4096 x 2048p 2G Hz

Mobile

© 2012 TSMC, Ltd

TSMC Property Optimizing the IC Design Ecosystem

Partnering with leading EDA, Library, IP and Design

companies

Library

IP

EDA

Design

Center

Packaging

Foundry

Testing

© 2012 TSMC, Ltd

TSMC Property

TSMC IP Alliance (41)

TSMC’s IP Alliance Members

© 2012 TSMC, Ltd

TSMC Property Comprehensive IP Portfolio

4,100+ IP titles from over 40 IP vendors

ADC/DAC

Voltage Regulator

Oscilator

Analog IP

Standard Cell / IO

SRAM

PLL

Foundation IP

SD/MMC

MIPI SATA

DDR

USB

PCIe/PCIx

XAUI

LVDS

IIC/IIS

Interface IP

MTP/OTP

Electrical Fuse

Embedded DRAM

Embedded Flash

Embedded Memory

CPU Core

Embedded CPU

Feb 2012 (source: D&R , ChipEstimate & TSMC)

© 2012 TSMC, Ltd

TSMC Property

IP Quality

© 2012 TSMC, Ltd

TSMC Property Open Innovation Platform®

Active

Accuracy

Assurance

TSMC

Quality

Management

TSMC Innovations

Enablement Interface

Open

Innovation

Platform

Solutions

Services

Flows

Tools

IP

Hosted by TSMC Product

Tape-out

Ecosystem Partner

Innovations

Customer Innovations

Process

Design IP

Packaging

EDA tools

Design IP

Services

Design Projects

Design Projects

Design Projects

Design Projects Compatibility

© 2012 TSMC, Ltd

TSMC Property TSMC9000 Introduction – Yr 2000

TSMC9000 program includes a set of minimum quality requirements for

Library/IP designed by IP provider on TSMC processes

TSMC9000 program is for customers Library/IP quality reference, TSMC

does not assess the FUNCTIONALITY, DURABILITY or SUITABILITY of

any of the IPs in any particular design environment

© 2012 TSMC, Ltd

TSMC Property IP Quality – Multiple Checks C

on

fid

ence

Lev

el

Assessment Level

1) QC (design kits) review 2) Design review

1) TO review 2) Silicon reports review

1) Split lot TO review 2) Silicon reports review

1) Customer product quantity 2) Customer product yield tracing

Sub-phases

1) DRC, LVS, ERC & Antenna checks (QA) 2) IP tag

Split Lot Silicon Assessment

Typical Silicon Assessment

Pre-silicon Assessment

Physical Review

Volume Production

DFM Compliance 1) DFM-LPE, LPC, Dummy Insertion (Mandatory for advanced tech nodes) 2) VCMP (recommended)

© 2012 TSMC, Ltd

TSMC Property IP Quality – Sample Checklists

Quality Level Action Review Items

Physical review Physical kits review 1. DRC/LVS/ERC/Antenna check

2. IP Tag

DFM compliance DFM compliance 1. LPE/LPC/Dummy insertion/VCMP review

Pre-silicon assessment

QC review 1. Design kit & document

2. QC reports & checklist

Design review

1. Bit cell layout for Memory IP

2. Electrical performance (design margin report)

3. Design checklist

Typical silicon assessment

TO review 1. Test chip plan

2. DRC/LVS log reports

Silicon report review

1. Silicon correlation reports

2. Qualification reports for eDRAM/1TRAM,

Electrical-Fuse, NVM IP

Split lot silicon assessment

TO review 1. Split lot test chip plan

Silicon report review 1. Split lot silicon correlation reports

Volume production Usage tracking 1. Production quantity

2. Yield report

© 2012 TSMC, Ltd

TSMC Property

The IP TSMC9000 assessment status available on TSMC-Online

IP Quality – The Consumer Reports

IP

Ven

dor

ADC20M

ADC80M

IP Vendor

© 2012 TSMC, Ltd

TSMC Property

Statistics

Type # of IP

Active IP (IP Alliance) 4601

IP in TSMC 9000 5963

Typical # IP being review / month ~150-250

Failed TSMC 9000 1009

Potential fatal failure 355

You could be the unlucky one.

© 2012 TSMC, Ltd

TSMC Property IP Quality – Integrated Solution

© 2012 TSMC, Ltd

TSMC Property Soft-IP Alliance Program

13 IP providers have qualified their Soft-IP

for the TSMC 9000TM IP library

TSMC Online provides Soft-IP robustness

and completeness information

Now Soft-IP

Partners

Customer TSMC

Tech

Optimized IP

Optimized design

Faster Tape-out

• Technology file

• Enhanced libs

• TSMC9000 QA

Soft-IP

Partners

Customer TSMC

Past

Low

Interaction

© 2012 TSMC, Ltd

TSMC Property

Summary

IP quality is extremely important for time

to market.

TSMC has the system/process to provide

you with information to help make your

customer’s design successful

THANK YOU!