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Introduction to ADC testing I
Definition of basic parameters
Ján ŠaligaDept. of Electronics and Telecommunications
Technical University of Kosice, Slovakia
Agenda
Introduction Deterministic and probabilistic
models Basic static parameters Basic dynamic parameters Other parameters
A/D converter – A/D interface
ADC
A/D interface
Timing and control circuit
Signal condi-tioning
Reference and power sources
Buffer
S&H(optional)
ADCADCx
Qx
roundk
ADC parameters (characteristics & errors)
Static (quasistatic) parameters – derived from transfer characteristic Point (gain, gain error, offset, missing code, ...) Function (transfer characteristic, INL, DNL, ...)
Dynamic parameters – characterize a behavior of ADC at time-varying signals SINAD, ENOB, SNR, SFDR, THD, IMD, ...
ADC parameter testing requires extraordinaire accuracy E.g.: 12-bit ADC: detetermination of transition
level with uncertainty < 1% →uncertainty of measurement < 1/(100*4096) ~ 0,00025%=2,5ppm of ADC FS
Accuracy versus precision
ADC transfer characteristicInputcode k
011
010
001
000
111
110
101
100 -4 -3 -2 -10 1 2 3 4
Input analogue value x(t)
[Vfs/Q]IdeIdealal AADCDC
ReRealal AADCDC
Gain (slope) error
Missingcode
Error in monotonicity
Non-linearity
Offset error
Ideal and real straight lines
Vfs - full scale rangeVfs = Vref(2N-1)/(2N)
QTTV Nnom
NnomN
N
fsn
211222
2
T[k] - transition level (thresholdof code k),W[k]= T[k]- T[k-1] – code bin width
N – nominal resolution (number of bits) of ADC
22
112
Nnom
Nnom
nom
TTQ
Gain and offset + their errors Fitting the straight line:
End points straight line - connecting the two end code transition or code midstep values
Least-square fit straight line according a least-square fitting algorithm
Minimum-maximum straight line - the line which leads to the most positive and the most negative deviations from the ideal straight line
ADC transfer characteristic
Deterministic model Stochastic model
00 11 1,1,55 22
PP((kk ||xx))
11
DeterministicDeterministicdefinitiondefinition
StochasticStochasticdefinitiondefinition
11 22
101101
100100
OutputOutput codecode kk
InputInput analanalogueoguevvaluealue xx((t) t)
[[VVfsfs/2/2NN]]
InputInput analogueanaloguevaluevalue xx((t) t)
[[VVfsfs/2/2NN]]
Channel profileChannel profile
OutputOutput codecode kk
analanalooggueue InputInput
valuevalue xx((t) t) [[VVfsfs/2/2
NN]]
011011
010010
001001
000000
111111
110110
101101
100100
-- -- --4 4 3 3 2 2 -- 1 0 1 1 0 1 2 3 4 2 3 4
== NN22 ...,..., 1,1, 0,0,kk -1-1
Conditional probability 5,0: TESTTESTTESTTESTTEST kTkkPkTkkPkT
DNL and INL Differential non-linearity
Integral non-linearity
[[ ]][[ ]]
nonomm
nonomm
QQkkWWkkDNLDNL
--==
[[ ]][[ ]] [[ ]]
nomnom
nomnom
QQkkTTkkTT
kkINLINL--
==
kDNLkINL
iDNLkINLk
i
10
Dynamic parameters I Bandwidth (BW) - the band of frequencies of input
signal that the ADC under test is intended to digitize with nominal constant gain. It is also designated as the Half-power Bandwidth, i.e., the frequency range over which the ADC maintains a dynamic gain level of at least 3 dB with respect to the maximum level.
Gain flatness error (G(f)) - the difference between the gain of the ADC at a given frequency in the ADC bandwidth, and its gain at a specified reference frequency, expressed as a percentage of the gain at the reference frequency. The reference frequency is typically the frequency where the bandwidth of ADC presents the maximum gain. For DC-coupled ADCs the reference frequency is usually fref = 0.
Quantisation noise and errors
Caused by rounding in quantisation process (and ADC non-linearity)
Power of quantisation noise for ideal ADC (2
eq, 2rms)
Is it dependent/independent on input signal? Is the value Q 2/12 correct? Distribution?
Answer: see the simulation
1022
22 211
121
k
Nq kJ
kQ
ADC noise and distortion ADC output random noise – random signal:
Quantisation noise - uniform Noise generated in input analogue circuits - Gaussian Noise caused by sampling frequency jitter and aperture
uncertainty (Kobayashi) Spurious – unwanted deterministic spectral
components uncorrelated with input signal (e.g. 50Hz) Total noise – any deviation between the output
signal (converted to input units) and the input signal, except deviations caused by linear time invariant system response (gain and phase shift), harmonics of the fundamental up to the frequency fm, or a DC level shift.
Distortion – new unwanted deterministic spectral components correlated with input signal
Noise floor determines the lowest input signal power level
which is reliably detectable at the ADC output, i. e., it limits the ultimate ADC sensitivity to the weak input signals, since any signal whose amplitude is below the noise floor (SNR < 0 dB) will become difficult to recover.
max
max
12/
,,1
22
22
2
221
hhh
M
MYkY
NFl
M
hJkJkk
Dynamic parameters IISignal to noise and distortion ratio
SINAD: for a pure sinewave input of specified amplitude and frequency, the ratio of the rms amplitude of the ADC output fundamental tone to the rms amplitude of the output noise, where noise is defined as to include not only random errors but also non-linear distortion and the effects of sampling time errors, i.e., the sum of all non-fundamental spectral components in the range from DC (excluded) up to half the sampling frequency (fs/2).
12/
,1
222
22
221
2
log10M
Jkk
dBM
YNFlKY
NFlJYSINAD
Dynamic parameters IIISNR
Signal to noise ratio (SNR) - harmonic signal power (rms) to broadband noise power ratio excluding DC, fundamental, and harmonics
12/
,,1
22
max
2
22
221
1
log10M
hJkJkk
dBM
YNFlhkY
NFlJYSNR
Dynamic parameters IVTHD, THD+noise, IMD
THD
THD+noise = 1/SINAD
Intermodulation distortion (IMD) - for an input signal composed of two or more pure sinewaves, the distortion due to output components at frequencies resulting from the sum and difference of all possible integer multiples of the input frequency tones.
A
HTHD
A
HTHD i
ADCii
ADCi
dB
22
,log20
IMtoneA
IMD
Dynamic parameters VEffective Number of Bits
Effective Number of Bits (Nef, ENOB) - for a sinusoidal input signal, Nef is defined as:
where rms is the rms total noise including harmonic distortion and eq the ideal rms quantisation noise for a sinusoidal input. (SINADdBFS = SINADdB - 20log(SFSR)) SFSR – signal to full scale ratio
Nef can be interpreted as follows: if the actual noise is attributed only to the quantisation process, the ADC under test can be considered as equivalent to an ideal Nef-bit ADC insofar as they produce the same rms noise level.
02.676.1
12loglog 22
dBSINAD
QNNN
dBFS
nom
rms
q
rmsef
Spurious-free dynamic range (SFDR) - expresses the range, in dB, of input signals lying between the averaged amplitude of the ADC's output fundamental tone, fi, to the averaged amplitude of the highest frequency harmonic or spurious spectral component observed over the full Nyquist band, for a pure sinewave input of specified amplitude and frequency, i.e., max{|Y(fh)| , |Y(fsp)|}:
where: Yavm is the averaged spectrum of the ADC output, fi
is the input signal frequency, fh and fsp are the frequencies of the set of harmonic and spurious spectral components.
|)(||)(max{|
)(log20)(
spavmhavm
iavm
fYfY
fYdBSFDR
Dynamic parameters VISFDR
Dynamic parameters VII Experimental demonstration
Measurement setup (run generator first and then demonstration)
NI USB 6009ADC: 12 bits, 10kHz,
differential
AI1 (DUT) USB
Software (LabVIEW):
1. Sinewave generator = Sound card
2. Control: AI1 = DUT (FS, record)Data processing and visualisation
Sound out
Other parameters Various electrical parameters, e.g. input
impedance, power requirements, grounding, …
Time parameters, e.g. clock frequency, conversion time, sampling frequency, …
Digital output: data coding, levels (logic), serial/parallel, error bit rate, …
…
Introduction to ADC testing IIBasic standardized test methods
Agenda
Standardization Static test method Histogram test Dynamic test with data processing
in time domain Dynamic test with data processing
in spectral domain
Standardization IEEE Std. 1057 - 1994, "IEEE Standard for Digitizing Waveform Recorders", IEEE Std. 1241 - 2000, "IEEE Standard for Terminology and Test Methods
for Analog-to-Digital Converters European project DYNAD – SMT4-CT98-2214, „Methods and draft
standards for the DYNamic characterisation of Analogue to Digital converters“http://www.fe.up.pt/~hsm/dynad
IEC Standard 62008 “Performance characteristics and calibration methods for digital data acquisition systems and relevant software”
Additional and related standards: IEEE Standard on Transition and Pulse Waveforms, Std-181-2003 (IEC 60469-1,
-2) IEEE and IEC standards for DAQ and ADM – in preparation IEC 60748 - covers only static ADC and DAC operations …
Detail overview of standards and standardisation – see the lecture of Pasquale Arpaia: A/D and D/A Standards, CD from SS on DAQ 2005
Standard comparison: Sergio Rapuano: Figures of Merit for Analog-to-Digital Converters: Analytic Comparison of International Standards, In Proc. of IMTC 2006, Sorrento, Italy, pp. 134-139
ADC static test
Standardized method
ADC static test - basic ideas
Yields ADC transfer characteristic Static point and function parameters
can be derived and calculated: Gain, offset, FS, DNL, INL, …
Based on the stochastic model of ADC Simple test setup – DC voltmeter is the
only accurate instrument Time consuming – each T[k] is
determined individually. The total time: 2N x longer than determination of one T [k]
Static test setup (IEEE 1057)
ADC static test - algorithm Start with the code k = 1 Find an input voltage level for which the probability of
codes lower than k in the record is slightly higher than 0.5 – the voltage is below T[k].
Find a bit higher voltage (the usual step is a quarter of Q) for which the probability of codes lower than k is slightly lower than 0.5 – the voltage is above T[k]
Fit these two point by line and calculate the voltage for which the probability of codes smaller than k is 0.5 – this is the transition level of code k – the voltage equal to T[k]
Repeat the procedure for all k = 1, 2, …., 2N-1 – the complete transfer characteristic will be measured out
Uncertainty in the static test
The uncertainty can be reduced by increasing the number of acquired samples (M).
The table shows the measurement precision for a confidence level of 99,87%.Number of acquired samples
(M)64 256
1024
4096
Transition level measurement precision
(% of noise standard deviation)
45% 23% 12% 6%
The main disadvantage of the static testing
The test is long time consuming: Let’s test 16bit ADC with sampling
frequency 10kHz, testing step is Q/4, additive noise: =1LSB, required precision: better than 10%.
The chosen record length: 2000 samples Measurement on one level takes
2000 x 0.1ms = 0.2s Total required time: 0.2s x 2(16+4)= 58.2
hours!!!
Static test Experimental demonstration
Measurement setup (run demonstration)
NI USB 6009ADC: 12 bits, 10kHz,
differentialDAC: 12 bit, static, RSE
AI0 (DUT)
AI1 (Voltmeter)
AO0 (DC source)
USB
1:10
Software (LabVIEW) controls:
1. AO0 = DC test voltage
2. AIO = DUT - FS, record
3. AI1– virtual DC voltmeter with averaging
4. Statistical data processing and visualisation
Alternative static methodwith feedback - IEEE 1241
Alternative static methodwith feedback - IEEE 1241
Some experimental results INI USB 6008 (12 bits, 10kHz, 10000s/T)
Some experimental results IINI USB 6008/9 (10000s/T)
Difference of two following measurements
Switching monitor during the measurement
Histogram (statistical) test
Standardized method
Histogram (statistical) testBasic ideas I
Goal: to determine ADC transfer characteristic (the same as in static test method)
The calibrating signal is a time invariant repetitive signal covering the ADC full scale The stream of ADC output codes is recorded Histogram is built from the record The relative count of hits in code bin k in the
histogram in comparison to the calibrating signal probability density function (or counts for code bin k in cumulative histogram in relation to signal probability distribution function) gives information about the code bin width (or code transition levels)
Histogram (statistical) testBasic ideas II
The best shape would be ramp or triangular signal. Why? Problem?
The basic recommended signal by all standards: sinewave. Why?
To achieve a required accuracy a relative long record (or records) is required
Faster than the static test Requirement: an accurate generator with
an extremely high accuracy (low distortion, high linearity, high spectral purity)
Histogram (statistical) testGeneral test setup
Ramp signal (IEEE 1241)
T[k]=C+G.HC[k-1]/S for k=1, 2, .... , (2N- 2)G is a gain factor, C is an offset factor,The code bins 0 and 2N-1 are usually excluded from data processing (why?)
noiseandtynonlinearirampbygiven:yuncertaint
221
kDNL
1221
22
11
N
N
i
j
iC
SkH
QkTkT
STT
GTCiHSiHjHN
Sinewave signal(All standards) – theoretical background I
Signal: Density
of probability: Distribution of probability:
ftAtx 2cos
22
1arccos
21
dd
.2xAA
xx
xp
,
2.21
arcsin2.2
arcsin1
d1
11
2
2
2
2122
1
1
1
N
Nfs
N
Nfs
kV
kV
AkV
AkV
xxA
kPN
Nfs
N
Nfs
Sinewave signal(All standards) – theoretical background I
Ideal theoretical histogram:
DNL:
Transition levels:
N
Nfs
N
Nfs
id AkV
AkVM
kH2
21arcsin
22
arcsin11
kH
kHkHkDNL
id
id
12,,2,1
121
cos
NN
c
c kforH
kHACkT
Sinewave signal(All standards) – theoretical background II
Problem in praxis: what are the sinewave parameters – A, C →Hid[k]?
Various ways of estimation, e.g Dynad: Incorrect
estimation →error ingain and offset
12
22cos
120
cos
1~
12~
~
,
1222
cos12
0cos
1222
cos1~
120
cos12~
~
NC
NC
NC
C
N
NC
NC
NC
C
NC
NC
NC
CN
HH
HH
TTA
HH
HH
HH
TH
HT
C
Sinewave signalTest conditions I
The total record must contain exactly an integer number J of sinewave cycles
R partial records can be used instead of one long record
Total recorded number M of samples must be relatively prime with J, i.e. they have no common factor
Then the sampling and sinewave frequency are:
si fMJ
f
si ffrJMr
r
,
21
Sinewave signalTest conditions II
The number of samples (M) to acquire in the histogram test, depends on: The noise level in the measurement system, The required tolerance (B is measured in LSBs)
and confidence level () and the M is different if DNL (quantization interval) or INL (transition levels) it to be determined.
The specification of tolerance for an individual transition level or code bin width, or for the worst case in all range.
1BQTTBQTP MEASrealMEAS
Sinewave signalTest conditions III
The equation generally used to determine the number of records to acquire is:
J=1 for INL, J=2 for DNL, is the standard deviation of noise level in volt for the INL determination and the smaller of the values of and Q/1,1 for the DNL determination.
deK
MTTV
c
cTT
cB
KJR
NS
N
N
0
1
21
2
2erf2
11221
2,0112
1,12
Sinewave signalSimulation
Simulation = (see the simulation): Form of histogram for various test
signals Error caused by limited number of
samples Error caused non-coherent sampling Error caused by noise in input signal Error caused by higher harmonics …
Histogram test Experimental demonstration
Measurement setup (run generator first and then demonstration)
NI USB 6009ADC: 12 bits, 10kHz,
differential
AI1 (DUT) USB1:2
Software (LabVIEW):
Sinewave generator = Sound card
AI1 control = DUT - FS, record
Data processing and visualisation
Sound out
Results of experimental testsComparison generators (USB 6009)
Stanford DS 360 (20-bits, 100 mil. samples)
Agilent 33220A (14-bits, 100 mil. samples)
Histogram (statistical) test
Some non-standardized methods
Non standardized histogram tests Basic ideas
Reasons: To use signals that are closer to real signal
digitized by ADC in common applications To use signal that can be simply generated
with required precision Common signals:
Gaussian noise Exponential signal Uniform noise, small sinewave or triangular
with DC steps, …
Non standardized histogram test Gaussian noise I
Martins, R. C., Serra, A. C.: ADC Characterisation by using Histogram Test stimulated by Gaussian Noise. Theory and experimental results, Measurement, Elsevier Science B. V., vol. 27, n. 4, pp. 291-300, June 2000
The noise is centred within ADC input range and overlap the whole ADC range
Problem generate the noise with really precise Gaussian distribution – convenient methods for low resolution ADCs and very high and very low frequencies where it is difficult to generate sinewave with required purity
Non standardized histogram test Gaussian noise II
Holub J., Komárek M., Macháček J., Vedral J.: STEP-GAUSS STOCHASTIC TESTING METHOD APPLICATION FOR TRANSPORTABLE REFERENCE ADC DEVICE, Proc. 8th IWADC 2003, Perugia, Italy, pp. 223-226
Gaussian noise with a small standard deviation is moved within the ADC input range by adding a DC voltage (mean) in small steps so that the results will be the same as using uniform noise overlapping the whole ADC full scale
Discussion: is really possible in praxis to fulfil the requirement of the limit with finite DC steps with acceptable precision?
01
,lim0
kG kpdf
Non standardized histogram test Small amplitude sinewave or triangular with a DC component
Michaeli L., Serra A.C., ..: In: IEEE transactions on instrumentation and measurement, Measurement, proc. of IMTC, IMEKO – IWADC
Idea: multistep test with fractional histograms (and INLs) acquired at small signal (sinewave, triangular) covering only a few tens/hundreds of codes shifted within ADC FS by known DC voltage
Advantage: the quality of test signal may be much worse than those of signal covering the whole FS of ADC
Disadvantage: connecting the partial histograms to build the final histogram
Non standardized histogram test Exponential signal
Holcer R., Michaeli L., Šaliga J.: DNL ADC testing by the exponential shaped voltage, In: IEEE transactions on instrumentation and measurement, Vol. 52, no. 3 (2003), pp. 946-949.
Šaliga J., Holcer R., Michaeli L.: Noise sensitivity of the exponential histogram ADC test, In: Measurement, Vol. 39, no. 3 (2006), pp. 238-244
We will continue with a new PhD. Student next year
Exponential signal is simple to generate – native signal in electronic circuit
Problem: distortion by other exponential with different time constant and keeping the final value of the signal known and constant.
Bt
BFStx
exp
Non standardized histogram test Small signals with a DC component
Measurement setup (run generator first and then demonstration)
NI USB 6009ADC: 12 bits, 10kHz,
differential
AI0 (DUT) USB1:21:10
Arbitrary generator = Sound card
DC shift = AO0
AI0 = DUT (FS, record)
Data processing and visualisation
Sound out
AO0 (DC shift)
Software (LabVIEW):
Histogram testConclusions
Histogram versus static test: histogram test gives usually better – more reliable results because: Faster = the test conditions are “constant”
and measurement of any T [k] is distributed and repeated in time over the all testing time
Disadvantage: an precise generator is needed Non standardised test procedures can
bring simplifying in test setup and decrease the requirements on instrumentation precision.
ADC dynamic testing
Dynamic testIntroduction
Goal: Determination of various dynamic ADC
parameters such as SINAD, ENOB, SNR, THD, IMD SFDR, …
Two ways of data processing: Time domain – directly SINAD, ENOB Spectral domain (DFT test): SINAD, ENOB,
SNR, THD, IMD SFDR, … No way can be generally supposed to be
the best one
Dynamic testGeneral test setup
Dynamic testRequirements
Coherent sampling – the same as for sinewave histogram test - the precise coherence is not necessary
Minimal size of record:
Record can consist of a few partial records Sinewave must cover the ADC input range
as much as possible (more than 90 – 95%) but must not overload it.
NM 2min max
min 12
DNLM
N
Dynamic test
Data processing in time domain
Dynamic testData processing in time domain I
See the following lectures by prof. Kollár and prof. Händel
Basic idea: to calculated the noise in the record (residuals) as the deference between the input signal – sinewave (analogue samples) and the record (digitized samples).
Knowing the noise the SINAD and ENOB can be calculated according the definitions
xyη ~
Dynamic testData processing in time domain II
Difficult task and question: the input signal must be precisely know – how to do it?
Common solution: recovering the input signal from the record by a fitting method (LMS) Three-parameter fit (A, C, ) Four-parameter fit (A, C, , f)
Question: is the recovered fitted signal really the origin input signal?!
Dynamic testThree-parameter fit I
Simple calculation = system of linear system of 3 equations is to be solved
CmfAmfA
CffmAf
fmA
CmfACffmAmx
iNiN
s
i
s
i
iNs
i
2sinsin2coscos
2sinsin2coscos
2cos2cos~
22
1
0
2
~E
2sinsin2coscos1
rms
M
miNiN CmfAmfAmy
M
xy
Dynamic testThree-parameter fit II
In matrix form: T,sin,cos CAAP x
11-Msin21-Mcos2
.........
1sin2cos2
101
where,~ T2
iNiN
iNiN
PP
ff
ff
D
DxyDxyxy
yDDDxx
DxyDxy T1TT
0
P
P
PP
Dynamic testThree-parameter fit III
Necessary condition:The input (and sampling) frequency
must be precisely known!!!If not – incorrect results SINAD, …
SEE THE SIMULATION
Dynamic testFour-parameter fit I
Unknown parameters: A, C, , f Difficult calculation = system of non-
linear system of 4 equations is to be solved
The system can be solved only by iteration process
Dynamic testFour-parameter fit II
Let T,,sin,cos iNP fCAA x
T,,sin,cos jiNjjjjjjP fCAA x
12cossin1
12sincos1112sin12cos
............2cossin
2sincos12sin2cos
0101
11
11
11
11
MfMA
MfMAMfMf
fA
fAff
jiNjj
jiNjj
jiNjiN
jiNjj
jiNjj
jiNjiN
j
D
00 iNf0iNfLet the first estimation
is yDDDx T
jjTjjP
1 11 jiNjiNjiN fffRepeat
calculation:
Dynamic testFour-parameter fit III
Problem with convergence – one global minimum and a few local minima
If the first estimation is incorrect the iteration converges to the fault minimum One of best estimations is the estimation from
spectrum within the interval (J-s, J+s):
See the simulation
sJ
sJm
sJ
sJmiN
mY
mYfmf
2
2
~
Dynamic testData processing in spectral domain – DFT test
Dynamic testData processing in spectral domain I
The same test setup, requirements and the first step as for Data processing in time domain
The DFT spectrum is calculated from the record
Using the definitions (see the beginning part of this lecture) the unknown ADC parameters can be estimated
Dynamic testData processing in spectral domain II
Common problem in praxis: incoherent sampling – leakage effect in the record spectrum
Solution: applying a window function (Hanning, 7 term Blackman-Harris, …) to suppress the leakage effect and then correction of results according the window parameters (see the general theory of windowing in DSP) Introduced in detail in DYNAD Rule: the higher the ADC resolution is, the lower the
side-lobes of the window have to be. Nevertheless, lowering the side-lobes results in increasing the main lobe width
Calculation is much more complex
Dynamic testData processing in spectral domain III
Spectrum calculation:
Error in coherency:
1
0
.2
eM
m
Mmi
fj iN
mxmwiY
1
0
2
21
0
2
2
1
0
22
21
0
2
M
n
M
n
T
M
nT
M
n
nw
nw
A
nw
nwA
PG
21
0
1
0
2
M
n
M
n
nw
nwMENBW
Processing gain
Equivalent Noise Bandwidth
Mf
Jf sJi
Dynamic testData processing in spectral domain IV
Changes in formulas: example 1: Noise floor:
maxmax
maxmax
12/
(,1,1
22
2
0,2
)12(2
221
llhh
lhM
MYkY
NFl
M
lJhrndkJkk j
Dynamic testData processing in spectral domain V
Changes in formulas: example 2: SINAD
max
2
2
2
22
max
12/
(,1,1
1
0
22
max
2
2
222
,0
.
and
0with
0,22
122
:where
0log10log10log10
h
h
M
feisj
c
sjrc
j
M
lJhrndkJkk
M
n
sjrc
dB
dttweM
fW
M
fJhfracW
WJhrndYENBWB
ll
nwWM
YNFllkYA
M
fW
WENBW
BA
NFlJYSINAD
sj
j
Dynamic testConclusions
No method of data processing can be suppose to be absolutely the best
Processing in time domain is less sensitive on coherency but the 4-parameter fit can be problematic
Processing in frequency domain gives directly much more parameters but it is very sensitive on coherency
The final conclusions ADC testing is not a simple task Extremely difficult task: to test ADC with
high resolution (more than 20 bits) Methods are in the process = a challenge
for you Another challenge: test procedures for
special ADC, e.g. band-pass for direct digitalization and demodulation of high frequency signals, etc.
Thank you for your attention