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Introduction The present calorimeter ECS is mainly based on SPECS Front-end, LED pulsing, HV, Integrators We suppose that we will keep the rest unchanged Power supplies (Maraton), Turbines, HCAL rad. Source (CanBus) SPECS will probably not be supported for the upgrade Do not want to be alone to maintain SPECS Follow the overall collaboration → GBT This is not a problem for systems which have to be re-designed We would like to keep some of our boards which are based on SPECS Thursday 13th December, 2012 Electronics Upgrade Meeting 1/6 Barcelona/Orsay/Annecy

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Introduction. The present calorimeter ECS is mainly based on SPECS Front-end, LED pulsing, HV, Integrators We suppose that we will keep the rest unchanged Power supplies (Maraton), Turbines, HCAL rad. Source (CanBus) SPECS will probably not be supported for the upgrade - PowerPoint PPT Presentation

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Page 1: Introduction

Introduction

The present calorimeter ECS is mainly based on SPECS Front-end, LED pulsing, HV, Integrators

We suppose that we will keep the rest unchanged Power supplies (Maraton), Turbines, HCAL rad. Source

(CanBus)

SPECS will probably not be supported for the upgrade Do not want to be alone to maintain SPECS Follow the overall collaboration → GBT

This is not a problem for systems which have to be re-designed

We would like to keep some of our boards which are based on SPECS

Thursday 13th December, 2012

Electronics Upgrade Meeting 1/6

Barcelona/Orsay/Annecy

Page 2: Introduction

Thursday 13th December, 2012

Electronics Upgrade Meeting 2/6

The cases

3 cases :1)Electronics in FE crates and to be re-designed (FEB, control

board)2)Electronics in FE crates kept and based on a SPECS slave (TVB)3)Electronics kept and based on a SPECS mezzanine (e.g. HV)

We have to find a “GBT solution” for all of these cases

Page 3: Introduction

3

Readout Crate

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

FEs FEs FEsFEs...FEs FEs FEsFEs...FEs FEs FEsFEs...

SO

L40

ECS

SOL40 to FE

Page 4: Introduction

4

Readout Crate

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

FEs FEs FEsFEs...FEs FEs FEsFEs

FEs FEs FEsFEs...

SO

L40

ECS

control

control

backplane

backplane

Calo Control Board: New board New board Old Board

TVB

TVB

Old Board

T RI G

40

Trigger Crate

TFC +ECS

FE-CALO(18 Crates)

SOL40 to FE-CALO

Page 5: Introduction

5

23 .. 12 11..10 9 8 7 .. 5 4 3 2 1 0

BXID(11..0) Synch NZS Mode

Header Only

BXID Reset

FE ResetCalibration Type(2..0) BX VetoSnapshotReserve

Used in ECAL backplane (old TTC line)t.b.c.NOT used

TFC protocol to FE-CALO

Page 6: Introduction

6

FEs FEs FEsFEs...

FEs FEs FEsFEs...

SO

L40

ECS

control

control

backplane

backplane

New board Old Board

TVB

TVB

Old Board

TFC +ECS

BCnt

Synchroniser

Constant latency

logic

Raw data

Preset ECS

BXID reset 23 .. 12 11..10 9 8 7 .. 5 4 3 2 1 0

BXID(11..0) Synch NZS Mode

Header Only

BXID Reset

FE ResetCalibration Type(2..0) BX VetoSnapshotReserve

NOT used

Calo Control Board: New board

BXID in FE-CALO

Page 7: Introduction

ECAL/HCAL Backplane Crate ressources

TVB TVB

9 differencial line (100Ω)

18 diff. line (100Ω)

16 x 4 diff. line (100Ω)

SPECS bus (5 diff. line)

9 TFC signals

18 GBT CLK

16 SCA e-link

Upgrade reuse

TVB reserved (5 diff. line)

Calo Control Board: New board

New board

Old Board

Old Board

Page 8: Introduction

8

objectobject

TELL40TELL40TELL40

DCS object

DATA

SOL40

TFC+ECS

GBTX SCA

GBTX

FE FPGA

9

TFC commands

SCA

TFC+ECS GBT

DATA GBT

Configuration data monitoring dataI2C, JTAG…

Clock

Calo Control Board

GOL

TVBFPGA

GlueFPGA

TRIG 40

x16

x2

SCA

x18

ECAL/HCAL Crate

FE-CALO Link

e-Link

x18

Page 9: Introduction

Phase – Aligners + Ser/Des for E – Ports

GBT – SCAon FE Board

E – Port

Phase - Shifter

E – PortE – Port

E – PortE – Port

CDR

DEC/D

SCR

SER

SCR/ENC

I2C MasterI2C Slave

Control Logic Configuration(e-Fuses + reg-Bank)

Clock[17:0]

CLK Manager

CLK Reference/xPLL

External clock reference

clockscontroldata

16 e-Link ( 80 Mb/s port) I2C port

I2C (light)

JTAG

GBTIA

GBLD

GBTXe-Link

clock

data-up

data-down

ePLLTx

ePLLRx

JTAG port

9

GBT – SCAon FE Board

E – Port

GBT – SCAon FE Board

E – Port

GBT – SCAon FE Board

E – Port

Repeter Clock

+ GBT-SCA for Calo control Board+ Link for TVB (I2C or e-Link)+ Calib Board?

GBT on Calo Control Board

Page 10: Introduction

10

ECS register FE-CALO

Readout Crate

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

TE

LL40

FEs FEs FEsFEs...

FEs FEs FEsFEs...

SO

L40

ECS

control

control

backplane

backplane

New board : ECS register tbd ECS SPI & // register ECS: Same I2C register than now

TVB

TVB

T RI G

40

Trigger Crate

TFC +ECS

FE-CALO(18 crates)

Calib

Calib

ECS register FE-CALO

Page 11: Introduction

Thursday 13th December, 2012

Electronics Upgrade Meeting 11/6

Case 1 : New electronics in crate

Backplane is kept as is but many lines are not necessary anymore

Use them for ECS point to point connections A new control board must be designed → GBT-ECS fibre

connection GBT receiver on the control board Propagate e-links on the backplane (SVLS @80MHz → to be

tested!) Receive the signal with a GBT-SCA chip on the boards (FEB)

Generates SPI and // bus for slow control on the FE boards

GBT-SCA

GBT

FEB Control Board

E-links (point 2 point)

Page 12: Introduction

Thursday 13th December, 2012

Electronics Upgrade Meeting 12/6

Case 2 : Old electronics in crate (SPECS Glue)

Some boards should be kept ECS input is currently SPECS bus Replace the signal from SPECS frame to I2C frame

This is not obvious : SPECS is here a mono-directional SPECS !

May have to add a FPGA on Control board to make it transparent for the GBT

Firmware has to be written Reprogram the SPECS slave to make it a I2C→I2C transmitter

(Firmware) The board directly receives I2C from the control board

GBT-SCA on the control board Could this solution also be used for case 1 ?

GBT-SCAGBT

FEB Control Board

Page 13: Introduction

Thursday 13th December, 2012

Electronics Upgrade Meeting 13/6

Case 3 : SPECS Mezzanine

The SPECS mezzanine have to be replaced by a “GBT equivalent”

This would consist in replacing the SPECS mezza. by a GBT one Yuri Guz from the calorimeter group volunteered to realize

this Difficulties : GBT frequency, power supply, signal

levels,...

SPECS

SPECS signal

GBT Mezzanine

Bus Bus

GBT optical signal

Page 14: Introduction

Thursday 13th December, 2012

Electronics Upgrade Meeting 14/6

Conclusion

Those are just ideas Deeper thinking with experts of the different boards is needed Preliminary tests are mandatory (usage of the backplane for e-link,

clock, ...) This is heavily connected with the control board design

Could imagine several alternatives and variations It could be safer to have a bi-directional GBT link per FEB

But costs increases → not the baseline Plan to use SPI on the FE board

Block already available (LAL) SPI with addressing and chip select to avoid long frames:

Address: 7 bit for register selection Chip select: should be generate externally

More than 10 chip select signals needed, not enough in GBT-SCA GBT parallel bus could be used to generate chip selects

Asynchronous command Discussion with GBT experts has started

FPGA for ECS needed on the FEB Reprogram the one of the TVB


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