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Introducing the Spartan-6 & Virtex-6 FPGA Embedded Kits

Introducing the Spartan-6 & Virtex-6 FPGA Embedded …xilinx.eetrend.com/files-eetrend-xilinx/forum/201104/1788-3259... · I2C/SPI GPIO Debug MicroBlaze 32-bit Processor Sub-System

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Introducing the Spartan-6 & Virtex-6 FPGA Embedded Kits

© Copyright 2009 Xilinx2

Overview

§ Embedded Design Challenges

§ Xilinx Embedded Platforms for Embedded Processing

§ Introducing Spartan-6 and Virtex-6 FPGA Embedded Kits

§ Designing with Embedded Targeted Reference Designs and Xilinx FPGAs

© Copyright 2009 Xilinx3

Challenges for Embedded Processing for FPGAs

§

–––

§

– Want pre-

§ Reduce Schedule Risk–––

© Copyright 2009 Xilinx4

Overview

§ Embedded Design Challenges

§ Xilinx Embedded Platforms for Embedded Processing

§ Introducing Spartan-6 and Virtex-6 FPGA Embedded Kits

§ Embedded Processing Design with Embedded Targeted Reference Designs and Xilinx FPGAs

© Copyright 2009 Xilinx5

Xilinx Embedded Platforms

Basic Value of XilinxEmbedded Platforms

New EmbeddedTargeted Reference Designs

New Spartan-6 and Virtex-6Embedded Kits

featuringTargeted Reference Designs

© Copyright 2009 Xilinx6

Overview

§ Embedded Design Challenges

§ Xilinx Embedded Platforms for Embedded Processing

§ Introducing Spartan-6 and Virtex-6 FPGA Embedded Kits

§ Embedded Processing Design with Embedded Targeted Reference Designs and Xilinx FPGAs

© Copyright 2009 Xilinx7

Spartan-6 FPGA Embedded Kit

§ Description:– This kit enables software development with MicroBlaze soft processor as well as

customization of the hardware processor system using Spartan™-6 LX45T FPGA§ Contents:

– SP605 Board with Spartan-6 LX45T FPGA• Download/Debug Cables & Power Supply

– ISE Design Suite Embedded Edition• ISE & Chipscope - Device locked to S6LX45T• Platform Studio, SDK (Eclipse IDE)

– Embedded Targeted Reference Design• MicroBlaze Processor Sub-System design

– Documentation• HW Setup Guide & Getting Started Guide• In-depth Hardware & Software Tutorials

– Ecosystem OS/RTOS Support• Linux, uC/OS-II, Treck

§ Available: Now§ Price: $995 US§ Part Number: DK-S6-EMBD-G

http://www.xilinx.com/s6embkit

© Copyright 2009 Xilinx8

Virtex-6 FPGA Embedded Kit

§ Description:– This kit enables software development with MicroBlaze soft processor as well as

customization of the hardware processor system using Virtex™-6 LX240T FPGA§ Contents:

– ML605 Board with Virtex-6 LX240T FPGA• Download/Debug Cables & Power Supply

– ISE Design Suite Embedded Edition• ISE & Chipscope - Device locked to V6LX240T• Platform Studio, SDK (Eclipse IDE)

– Embedded Targeted Reference Design• MicroBlaze Processor Sub-System design

– Documentation• HW Setup Guide & Getting Started Guide• In-depth Hardware & Software Tutorials

– Ecosystem OS/RTOS Support• Linux, uC/OS-II, Treck

§ Available: Now§ Price: $2495 US§ Part Number: DK-V6-EMBD-G

http://www.xilinx.com/v6embkit

© Copyright 2009 Xilinx9

Embedded Targeted Reference DeignMicroBlaze Processor Sub-System

§ Scalable embedded processing Targeted Reference Design – Built with Xilinx MicroBlaze 32-bit processor– Integrates common embedded processing peripherals

and IP blocks– Completely integrated & verified together to shorten

design cycle

§ Enables software programmability using industry-standard OSes out-of-the-box– Enabled by Xilinx Software Development Kit (SDK)

§ Starting point for multiple Xilinx Market-specific platforms– Can be extended and modified with Xilinx Platform

Studio (XDS) delivered with EDK

MicroBlaze32-bit CPU

MPMC

TEMAC

UART

I2C/SPI

GPIO

Debug

MicroBlaze32-bit Processor

Sub-System

FLASH

Timer

INT CTRL

© Copyright 2009 Xilinx10

MicroBlaze Processor Sub-System Features

§ Flexible 32-bit MicroBlaze Processor– Pre-configured 32-bit MicroBlaze Soft Processor– Integrated Memory Management Unit (MMU)– 16KB Instruction and Data Caches– JTAG processor debug– 100MHZ operation

§ Variety of Memory Controller support– MultiPort DDR3 Memory Controller

• Direct interface to 128 MB 64-bit wide DDR3 SDRAM interface operating at 400 MHz.– NOR Flash Memory Controller

• 32MB FLASH– Direct access to 32 KB Internal Block RAM– Support for various FLASH Memory devices

• 32 MB Linear (Parallel) FLASH • 8 MB Serial FLASH• System ACE™ Compact FLASH

– Access to 1 KB IIC EEPROM§ Integrated High Performance I/O Peripherals

– Gigabit Ethernet controller (TEMAC)– Two 32-bit Timers– Interrupt Controllers– Three General Purpose I/O controllers– One 16550 compatible UART – SPI, I2C serial interfaces

MicroBlaze32-bit CPU

MPMC

TEMAC

UART

I2C/SPI

GPIO

Debug

MicroBlaze32-bit Processor

Sub-System

FLASH

Timer

INT CTRL

© Copyright 2009 Xilinx11

MicroBlaze Processor Sub-System In FPGA Design

Spartan-6 or Virtex-6 Evaluation Board

MicroBlaze32-bit CPU

MPMC

TEMAC

UART

I2C/SPI

GPIO

Debug

MicroBlaze PSS

FLASH

Timer

INT CTRL

User Defined Portion

of Design

Spartan-6 FPGA or Virtex-6 FPGA

DDR3

Compact FLASH

SPI FLASH

IIC EEPROM

ENET PHY

RS232 Line Drv

GPIO

IIC/SPI

§ Simple Block Diagram– MicroBlaze PSS on

Virtex-6 or Spartan-6 FPGAs

§ User Defined Logic– Can be added to

base PSS§ Physical Devices on

evaluation boards – Controlled by PSS

peripherals § Basis of Demo

included in the kits– Next section

© Copyright 2009 Xilinx12

Overview

§ Embedded Design Challenges

§ Xilinx Embedded Platforms for Embedded Processing

§ Introducing Spartan-6 and Virtex-6 FPGA Embedded Kits

§ Embedded Processing Design with Embedded Targeted Reference Designs and Xilinx FPGAs

© Copyright 2009 Xilinx13

EmbeddedEdition

Simple Steps to Productivity

ü1 ü2 ü3

Get Started in Minutes

§ Connect Cables§ Power-up Board§ Load Embedded Platform

Demonstration

Evaluate

§ Evaluate with Embedded Platform Demonstration

§ Use interactive interface to evaluate performance options

Customize

§ Open XPS Project with Embedded Targeted Reference Design

§ Follow Software Tutorial to program, debug and profile software applications

§ Follow Hardware Tutorials to modify design

© Copyright 2009 Xilinx14

Step 1: Get Started in Minutes

§ Open the Spartan-6 or Virtex-6 Embedded Kit

§ Follow the printed Hardware Setup Guide to setup the board and run the out-of-box demos– Connect the Ethernet cable from the SP605/ML605 board to a PC– Connect the DVI cable to a Monitor– Insert provided Compact Flash card into the SystemACE port on the board– Connect Power Supply to the board and switch it ON.

© Copyright 2009 Xilinx15

Step 2: Evaluate Embedded Platform Demo

§ Demonstration Overview– Webserver with Ethernet

networking running on MicroBlaze

– MicroBlaze program controlling DSP co-efficients

– Web-based user interface to manipulate images and visual effects like edge-detect, smooth, sharpen, etc

§ Hardware Implementation– SP605 or ML605 Board– MicroBlaze PSS Design with

Video DSP IP added• 2D FIR filter, DVI output

DisplayWeb Browser

© Copyright 2009 Xilinx16

Step 3: Customize Embedded Design

Start with the Embedded Targeted

Reference Design

Design with Industry-standard Hardware & Software Development Tools

Hardware Customization with XPS

Software Development with SDK

Complete your design on time

17

EDK Software, Hardware and Integration Flows

Software Flow(SDK)

Integration(XPS)

Hardware Flow(ISE)

© Copyright 2009 Xilinx18

Simple Steps to XPS Hardware Design Flow

Simulation/Synthesis

Build & Map

Place & Route

Standard FPGAHW Development Flow

VHDL or Verilog

Configuration File

Xilinx PlatformStudio (XPS)

System Netlist

Create IP Wizard

§ Start with XPS § Open the MicroBlaze PSS

Targeted Reference Design Project

§ Modify– Select additional standard

peripherals from EDK suite to add to PSS

– Add Custom IP with Create IP Wizard

– Add ChipScope Debug IP using Debug Configuration Wizard

© Copyright 2009 Xilinx19

Simple Steps to SDK Software Development Flow

Code Entry

C/C++ Cross Compiler

Linker

Load SoftwareInto FLASH

Debugger

Standard EmbeddedSW Development Flow

C Code

Hardware Board

§ Start with SDK Eclipse IDE§ Open the Workspace

configured for the MicroBlaze PSS Targeted Reference Design

§ Program– Create Standalone Software

platform or OS BSP– Create, Compile and build

Software applications– Debug Software Applications

using graphical debugger

© Copyright 2009 Xilinx20

Integrate & Optimize Hardware & Software

§ Use ChipScope Analyzer to debug hardware/software integration issues

§ Use SDK to Profile your application & identify hot spots

§ Offload Performance critical code to hardware accelerators

Hardware Board

Chipscope AnalyzerDebugger & Profiler

Download CombinedImage to FPGA

© Copyright 2009 Xilinx21

Ecosystem Support

OS Vendor Tools Key Features

Linux (PetaLinux) PetaLogix PetaLinux SDK, Xilinx SDK

§ Low-cost Linux§ Fully customizable §Automatic BSP Generation

uC/OS-II Micrium Xilinx SDK § Low-cost Real-Time OS §Automatic BSP Generation

Treck Networking Middleware

Treck Xilinx SDK § High Performance TCP/IP stack§ Comprehensive Networking middleware

§ Scalable Embedded Targeted Reference design is the foundation for 3rd party embedded software support

§ Strong OS, RTOS and Middleware offerings support Spartan-6 and Virtex-6 Embedded kits

© Copyright 2009 Xilinx22

Summary

§ New Embedded Development Kits minimize development time– Get to market faster

§ New Targeted Reference Designs Improve designer productivity – Lower risk with pre-integrated components

§ Empowering designers to focus on differentiation & product value

Innovation - right out of the box

For more information visit: www.xilinx.com/embedded

© Copyright 2009 Xilinx

§ 2010 5 14§ 30%§

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Embedded Kits

Spartan-6 FPGA嵌入式套件5 14

$995$695

即可发货

Virtex-6 FPGA 嵌入式套件5 14

$2,495$2,195

即可发货

Connectivity Kits

Spartan-6 FPGA 连接套件5 14

$2,495$1,995

即可发货