Interval Arithmetic Requirements for

Digital Signal Processor

William Edmonson Hampton University

Winser Alexander NC State University

Esther Hughes Virginia Commonwealth University

Clay Gloster Howard University

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Outline

Digital Signal Processing Applications Digital Signal Processors Importance of Interval Method Interval - Digital Signal Processors Conclusion

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Digital Signal Processing

DefinitionExtraction of useful information carried by the signal

Transformation Filtering Estimation

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Digital Signal Processing

Applications Transformation

Time-Frequency Analysis Music/Video Coding

Filtering Active Noise Cancellation Speech Synthesis

Estimation Direction of Arrival Medical Imaging

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Digital Signal Processors

DefinitionSpecial purpose processor designed to efficiently

perform convolution and correlation operations, and fast I/O.

Multiply-Accumulate (MAC)

where

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Digital Signal Processors

Important FeaturesReal-time operation of repetitive arithmetic operationsReduced footprintReduced power

ExamplesCell phonesAudio equipmentHearing aids

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General Purpose Processor

von Neumann ArchitectureSingle access to memory during each instruction cycleShared data and program memory

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Digital Signal Processor

Harvard ArchitectureMultiple bus structureSeparate memory for data and programReduced optimized instruction set

Addition, Subtraction, Logical Multiply-accumulate operation

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Digital Signal Processor

Modified Harvard Architecture

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Importance of Interval Methods to DSP

The control and analysis of numerical errorsFilteringEstimation

Implementation of optimization methods that produce guaranteed estimates.Large problem set of nonlinear estimation

Direction of Arrival (Sonar, RADAR) Spectral Estimation (Harmonic Retrieval) Neural Networks Medical Image Reconstruction (PET)

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Importance of Interval Methods to DSP

Slow software implementationGeneral purpose processorsDSP’s

Lack of dedicated interval arithmetic based HWEmbedded computing

Wireless communication Space exploration vehicles

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Interval Digital Signal Processor

RequirementsModified Harvard Architecture Interval multiply-accumulate in 1 instruction cycleDirected roundingFixed-point arithmeticMemory access of interval numbers in 1 instruction

cycle

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Interval Digital Signal Processor

Arithmetic Logic Unit/Multiply Accumulator2 data busses

Simultaneous fetches of operands B bits wide

4 input data registers X = [xlb,xub] Y = [ylb,yub]

2 accumulators Upper and lower interval results 2 B bits wide

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Interval Digital Signal Processor

Saturation arithmeticOverflow conditions

Directed roundingRound towards + ∞

Interval instruction setAddition, subtraction, multiplication, multiply-

accumulateLogical operations

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Interval Digital Signal Processor

Interval Multiplication

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Interval Digital Signal Processor

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Conclusion

Outlined HW requirements for a fixed-point DSP Future work is to implement on a FPGA Initial work for full acceptance by signal processing

community Technology key across all areas of reliable engineering

Civil Engineering Active Vibration Control

Mechanical/Aerospace Engineering Robotic Vision and Guidance

Acknowledgements Funding of this work is through a NASA-FAR grant.