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International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Special Issue, October (2013), © IAEME

International Conference on Communication Systems (ICCS-2013) October 18-20, 2013

B K Birla Institute of Engineering & Technology (BKBIET), Pilani, India Page 301

Hardware Co-simulation of BPSK and QPSK

For Software Defined Radio

Gaurav Purohit1, Divya Vyas2, Kota Solomon Raju2, V.K Chaubey2, Arvind Nehra 3

1PhD Scholar/Department of EEE, BITS- Pilani, Pilani Campus, Rajasthan, India

2Faculty/Computer Science, BKBIET, Pilani, Rajasthan, India

[email protected], [email protected]

ABSTRACT: The paper presents the design of a BPSK and QPSK digital Modulation scheme and

its implementation on FPGAs. The simulation of the system is made in MATLAB Simulink

environment and System Generator, a tool used for FPGA design. This paper mainly focuses on

the hardware realization of such scheme with a minimum area strategy for the universal

mobile telecommunication system (UMTS), CDMA2000 and SDR applications. Hardware Co

Simulation is designed using VHDL a hardware description language targeting a Virtex-5 device

(XC5VLX50T-1ff1136) and is verified using MATLAB Simulink.

KEYWORDS: BPSK, CDMA2000, LUT, QPSK, SDR, UMTS

I. INTRODUCTION

A significant transition from analog to digital has occurred in the past years and

communications is a field which has gain a lot because of this development. The advanced

algorithms used in a digital communication system made it more reliable than an analog one.

Studies about the implementation of digital communication systems were made in [1]. The

hardware and software resources used in generating the QPSK (Quadrature Phase Shift

Keying) modulation and demodulation were a computer with the Xilinx ISE and Digilent

GENESYS board and a Series of Oscilloscope, a high performance digital oscilloscope. The

purpose of this paper is to create a BPSK/QPSK (Binary Phase Shift Keying and Quadrature

Phase Shift Keying) system using Hardware Co Simulation with VHDL a hardware description

language targeting a Virtex-5 device (XC5VLX50T-1ff1136) and is verified using MATLAB

Simulink [2].

The paper is organized into 3 main and 2 sub sections. The paper begins with an introduction

in section 1. Section 2 presents the theoretical backgrounds about the digital communication

system and about the BPSK/QPSK modulation and demodulation. The first subsection gives

implementation of the BPSK whereas second gives implementation of QPSK system in MATLAB

Simulink and System Generator. Section 3 presents the conclusions.

IJECET © I A E M E

ISSN 0976 – 6464(Print)

ISSN 0976 – 6472(Online)

Volume 4, Issue 7 (2013), pp. 301-308

© IAEME: www.iaeme.com/ijecet.asp

Journal Impact Factor (2013): 5.8896 (Calculated by GISI)

www.jifactor.com

INTERNATIONAL JOURNAL OF ELECTRONICS AND

COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET)



II. Modulation Technique – PSK ( Phase Shift Keying)

The aim of digital baseband modulation methods, also known as line coding, is to transfer a

digital bit stream over a baseband channel using a pulse train, i.e. a discrete number of signal

levels, by directly modulating the voltage or current on a cable. Phase-shift keying (PSK) is a

digital modulation scheme that conveys data by changing, or modulating, the phase of a

reference signal (the carrier wave). PSK uses a finite number of phases; each assigned a unique

pattern of binary digits. Usually, each phase encodes an equal number of bits. Each pattern of

bits forms the symbol that is represented by the particular phase. PSK is much more robust

than ASK as it is not that vulnerable to noise, which changes amplitude of the signal [3].

Fig. 1: Basic Modulation System

Fig. 2: Digital Modulation techniques (A to D)

International Journal of Electronics and Communication Engineering & Technology (IJECET),ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 7 (2013), © IAEME



A typically digital communication system is presented in Fig.1. The role of a digital

communication system is to transport digital data between two nodes: the transmitter and the

receiver. A digital communication system is made up of both digital and analog parts. The

digital part consists of digital source/user, source encoder/decoder, channel encoder/decoder

and the digital modulator/demodulator. The digital data is transmitted between the

transmitter and the receiver by varying a physical characteristic of a sinusoidal carrier, by

phase since we have represented the variants of PSK i.e. BPSK would be presented first, and

then QPSK. Fig.2 shows the Software defined radio architecture and the block of digital

baseband system where we have the need of such schemes. Therefore, this paper begins with a

discussion of binary phase shift keying (BPSK) and uses this discussion as a vehicle for

development of generic models for Quadrature modulation.

1. BPSK (Binary Phase Shift Keying)

The binary phase shift keyed modulator is the simplest of app PSK modulators since it has only

two output phase states at the same frequency, but separated by 180º. The general form for the

BPSK signals are according to (1), where fc is the frequency of the carrier. If “1” is transmitted,

the modulated signal remained the same as the carrier, with 0º initial phase, but if “0” is

transmitted, the modulated signal would change with 180º, like shown in fig. 3 (a) and (b) [4]

[5].

(1)

(a) (b)

Fig. 3: (a) BPSK Modulation waveform and (b) Constellation diagram

1.1. BPSK Modulator in System Generator

System Generator is a digital signal processing design tool from Xilinx, based on the Simulink

environment used for FPGA design. Designs are made in the Simulink environment using a

Xilinx specific blockset. All implementation steps, including synthesis, place and route are

automatically performed to generate an FPGA programming file. BPSK Modulator using System

Generator tools in Simulink. In fig. 4, the system generator output and its HW Co-simulation

model is shown whereas fig.5 shows generated waveform from MATLAB environment and

verified waveform from Modelsim environment.




Fig.4: BPSK Modulator and its Co-simulation Block using system generator

Fig.5: BPSK Waveform from (a) MATLAB Scope and (b) Modelsim (Verification)




2. QPSK (Quadrature Phase Shift Keying)

In QPSK quadrature means 4 different states that are used to represent a group of 2 bits input

data. The four different inputs are 00, 01, 10 and 11 and each group takes one form of QPSK

states as shown in fig. 6 and 7.[6-8] This we do to increase the bit rate, hence we code 2 or

more bits onto one signal element. In QPSK, we parallelize the bit stream so that every two

incoming bits are split up and PSK a carrier frequency. One carrier frequency is phase shifted

90o from the other in quadrature. The two PSKed signals are then added to produce one of 4

signal elements. The conventional QPSK modulator operates by dividing the baseband data

into 2 main streams, even and odd data. The divided unipolar data then changed into bipolar

by using NRZ encoding technique [9]. The implementation is shown in fig.8 and fig.9 shows

waveform from MATLAB and Wavescope. Fig. 10 shows the routed waveform FPGA [10]

Genesys board to DSO.

Fig.6: QPSK and its implementation

Fig.7: QPSK constellation with Gray mapping




Fig.8: QPSK Modulator and its Co-simulation Block using system generator

Fig.9: QPSK Waveform from (a) MATLAB Scope and (b) Xilinx Wavescope (Verification)

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 7 (2013), © IAEME



Fig.10: QPSK Waveform Routed from FPGA Pins to Digital Oscilloscope

III. Conclusion

In this paper, we have shown the hardware co-simulation of two demanding variants of PSK i.e.

the BPSK Modulator and the QPSK Modulator in the MATLAB/Simulink environment using

Xilinx System generator. In the second step we implemented the BPSK and QPSK modulator on

the Virtex-5 device (XC5VLX50T-1ff1136) kit and routed the output to DSO for real time

demonstration. Our model is highly efficient and robust for demonstration of modulator for

SDR and other Wireless standards.

IV. Acknowledgments

The authors would like to thank Mrs. Anu Gupta, HOD, Department of EEE, BITS-Pilani. This

work is published with the support of CSIR (MHRD, DELHI) SRF Fellowship.

REFERENCES

[1]F.Xiong, “Digital Modulation Techniques”, Artech House, UK, 2000.

[2] S.T.Karris, “Introduction to Simulink with Engineering Applications”, Orchard Publications,

USA, 2006.

[3] B. A. Forouzan, S. C. Fegan, “Data Communications and Networking “, McGraw-Hill Higher

Education, 2003.

[4]W.Song, J.Zhang, Q.Yao, “Design and Implementation of BPSKModulator and Demodulator

on Modern DSP Technology”, 3rdIEEE International Symposium on Microwave,

Antenna,Propagation and EMC Technologies for WirelessCommunications, China, 2009,

pp.1135-1137.




[5]F.Ahamed, A. Scorpino, “An educational digital communicationsproject using FPGAs to

implement a BPSK Detector”, IEEETransactions on Education, Vol.48, No.1, 2005, pp.191-197.

[6] J.S. Chitode, “Digital Communication”,Technical Publications , 2008.

[7] A. H. Aghvami “Digital Modulation Techniques for mobile and personal communication

systems", Elect. & Comm. Eng. Journal, pp.125 -132 1993

[8] T. S. Rappaport, “Wireless Communications: Principles and Practice”, 1996: Prentice-Hall

[9] B. P. Lathi “Modern Digital and Analog Communication Systems”, 1989: Holt, Rinehart and

Winston

[10] Xilinx System Generator User's Guide, www. Xilinx.com.

BIOGRAPHY

Gaurav Purohit was born in Jodhpur, Rajasthan, India in 1986. He received

the B.E degree in Electronics and Telecommunication Engineering in 2006. He

received his M.E. in communication system in 2010. He is currently pursuing

PhD with SRF Scholarship and his research interests focus on VLSI, DSP and

digital design.

Divya Vyas was born in Jodhpur, Rajasthan, India in 1986. She received the

B.E degree in Information and technology from Rajasthan University in 2007.

She is currently teaching in CS/IT department, BKBIET, Pilani, Rajasthan, India

her research interests focus on Verilog and C languages with digital design.


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International Journal of Electronics and Communication ... · PDF fileInternational Journal of Electronics and Communication Engineering & Technology ... algorithms used in a digital