Intel Ia32

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    Intel IA32 (80x86)

    Microprocessors

    Dr. Doug L. Hoffman

    Computer Science 330Spring 2002

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    A Classic CISC

    Microprocessor

    The 80x86 family of Microprocessors is the

    dominant PC processor architecture:

    Around since 1978.

    Continually enhanced for two decades.

    Takes Upward compatibility to an extreme.

    Started as a Modified Accumulator Architecture. Now a General Purpose Register-Memory Architecture (sort

    of).

    Over 400,000,000 have been sold.

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    History of the 80x86

    Intel 4004 (4 bit) and 8008 (8 bit)accumulator architecture embedded

    control processors. Early 1970s. Intel 8080, and enhanced 8 bit processor

    that found its way into some of the first

    commercial PCs. Also a straightforwardaccumulator architecture. Mid 1970s.

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    History of the 80x86

    Intel 8086, 16 bit assembly-languagecompatible extension of the 8080

    architecture. 1978. All registers 16 bits wide.

    Additional registers all have dedicated uses.

    Extended Accumulatorarchitecture.

    IBM selects the 8088, an 8086 with an 8bit external bus, as the processor for theIBM PC. Early 1980.

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    History of the 80x86

    Intel 8087 floating-point coprocessor adds~60 new instructions to the 8086

    instruction set. 1978. All floating-point instructions processed on the coprocessor chip.

    Additional registers arranged as a stack to avoid makinginstructions even longer (and avoid changes to the 8086).

    Adds 8 80 bit floating-point registers arranged as a stack.

    Hardware designers decided to handle stack overflow/underflowin software. This never worked, resulting in a 50% reduction inFP performance.

    Extended Stackarchitecture.

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    History of the 80x86

    Intel 80286 further extends thearchitecture by increasing the address

    space. 1982.

    Expanded memory address space from 20 bits to 24 bits.

    Added memory mapping and multilevel protection scheme (see

    book). Added new instructions to support memory management.

    Added real addressingmode to support legacy 8086 code.

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    History of the 80x86

    Intel 80386 moves up to 32 bitarchitecture. 1985.

    Additional registers (segment pointers).

    All GP registers now 32 bits.

    Address space now 32 bits with several new addressing modes.

    Added paging support under existing segmented architecture. Almost a general purpose register machine.

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    History of the 80x86

    Intel 80486 basically improvesperformance. 1989.

    Intel Pentium, 1992, and P6, 1995, alsoimprove performance and addmultiprocessor support (only four new

    instructions. Since then more versions than you can

    sensibly keep track of.

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    Intel CPU Specs

    There are a large number of processor models

    and packages available from Intel.

    Celeron, Pentium II, Pentium III, Pentium 4.

    Slot 1, Socket 370, Socket 7, etc.

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    Intel CPU Specs, cont.

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    Intel CPU Specs, cont.

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    Instruction Set Madness

    The x86 isnt all that complex -- it just doesnt make a lot of sense, Mike Johnson, AMD

    Almost all registers have dedicated uses; stack

    pointers, data segment pointers, index register, etc,

    depending on mode.Segmented address space plus page translation.Instructions can be from 1 to 17 bytes long.Addressing mode use seemingly haphazardly

    applied to instructions. Definitely not orthogonal.Weird, half baked stack architecture for FP.

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    Registers of the 8086CPU8 General Purpose 16 bit Registers

    Four 16-bit registers can be divided into two 8-bit registers

    AX = AH|AL - Accumulator (Accumulator High|Accumulator Low)

    BX = BH|BL - Base (High|Low)- can be used as "pointer"

    CX = CH|CL - Count (High|Low) - used for counting loops

    DX = DH|DL - Data (High|Low) - paired with AX for "combined" 32-

    bit register. DX is high word, AX is low word.

    Four 16-bit registers used for Indexing and Stack

    SI - Source Index - used for indirect addressing

    DI - Destination Index - used for indirect addressing

    SP - Stack Pointer - accesses Stack Segment

    BP - Base Pointer

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    Registers of the 8086CPU6 Special Purpose Registers

    CS (Code); DS (Data); ES (Extra); (SS) Stack segment registers

    IP - Instruction Pointer holds address of next instruction

    Flag Register - OF|DF|IF|TF|SF|ZF|AF|PF|CF "flag" bits

    Overflow Flag set if last operation caused "signed overflowed"

    Sign Flag set if last operation was negativeZero Flag set if last operation resulted in 0

    Carry Flag set if last operation had carry out

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    Registers of the 8086CPUMemory Address Spaces

    CS:IP pair points to code address space

    DS:offset points to data address space

    SS:SP pair points to stack address space

    ES: extra data address spaceFS:GS even more extra data segment pointers add in 386.

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    Pentium III Architecture

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    Pentium III Die

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    Send in the Clones:AMD Athlon

    frequently used instructions extremely fast (typically in one clock).

    Less common or very complex instructions need to be decoded in a

    slower process (usually >2). AMD calls these OPs 'MOps', for Macro

    Operations.

    dispatch 9 Ops at the same time (Pentium only 5)

    256 kB L2 cache running on a backside bus at CPU clock speed.

    128 kB L1 cache, 64 kB data and 64 kB instruction cache.

    3 (three!) out-of-order, fully parallel FPU pipelines.Much RISC-ier core than Pentium III.

    Intel can only supply 60% of the market due to capacity limits.

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    Send in the Clones:AMD Athlon

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    Send in the Clones:AMD Athlon

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    Send in the Clones: Via Cyrix III

    Developed by National Semiconductor133 MHz Front Side Bus (although it supports 66 MHz, and 100 MHz

    FSB).256 KB integrated L2 cache along with a 64 KB integrated L1 cache.

    3dNow! SIMD instructions in a dual pipelined FPU.As with the MII, the Cyrix III supports MMX.superscalar design featuring two seven stage pipelines allowing two

    processing streams to be processed simultaneously.two level translation buffer and a 512 entry branch target buffer.

    out-of-order execution through register renaming and data forwarding andbypassing to resolve data dependencies between pipelines.Speculative execution after a predicted branch is also supported.15% to 20% cheaper than a comparable Celeron.Hope to capture 10% of market.

    Subject of a lot of legal action by Intel but VIA is still in business.

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    Send in the Clones: Via Cyrix III

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    Intels Latest: The Pentium 4 2.4GHz

    478 pin packaging

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    Intels Latest: The Pentium 4 2.4GHz

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    Intels Latest: The Pentium 4 2.4GHz

    The newer Pentium 4 chips, with their 512K L2 caches,

    perform extremely well, peaking out at nearly 900 MFLOPS at larger

    matrix sizes than the Athlon XP.

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    Conclusions:

    The Pentium 4 is faster at some things, and the Athlon XP is faster at others.

    On balance, the two processors are very closely matched.

    "Which is fastest?" depends entirely on what it is you want to do.Tech-report.com

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    And The Future Belongs to...

    Itanium

    The IA64 processor previously known as Merced

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    The Last Word

    Intel added new features to the originalinstruction set as you might add clothing

    to a packed bag, P & H.

    I dont really want onebut I have a half dozen.