AGCCNTL
7
0/90TXPLL
3
RXAGC
VCCs
GNDs
RXPLL
TXQ_IN
TX_OUT
TXI_IN
RX_IN
RX VGA
TX VGA
IFAMP
From SPI
from RXPLL
XPIC_INXPICOUT
XPICAGC
XPIC_BBI
XPIC_BBQ
LevelDetect
IF SAW
IF_OUT IF_IN
TX_PWD
TemperatureSensor
CLKSPIDATASPILESPI
RXBBI
RXBBQ
TEMPOUT
0/90
0/90
SPI
TRF2443
www.ti.com SLWS217B SEPTEMBER 2009REVISED MARCH 2012
Integrated IF Transceiver for Broadband Wireless ApplicationsCheck for Samples: TRF2443
1FEATURESDESCRIPTION Integrated TX Chain (165175 MHz / 330350The TRF2443 is a highly integrated full-duplexMHz)intermediate frequency (IF) transceiver designed for
Baseband Amplifiers broadband point-to-point wireless communications Quadrature Modulator applications. The receiver chain integrates a
quadrature (IQ) demodulator and provides more than Digitally Controlled VGA90 dB of gain range, obtained via a combination of TX Output IP3: 29.5 dBm analog- and digital-controlled VGAs. The integrated
TX Output Noise: 166 dBc/Hz programmable baseband low-pass filter gives theTRF2443 the flexibility to receive signals with different Integrated RX Chain (140165 MHz / 280330bandwidths, while also helping to remove interfererMHz)signals before they reach the ADC. Additionally, the IF Amplifiers TRF2443 gives the flexibility to add an external IF
Analog and Digital VGA filter to further remove unwanted signals. TheTRF2443 transmitter chain integrates a quadrature Quadrature Demodulator(IQ) modulator driving a highly linear IF DVGA that Baseband Filtersprovides 35 dB of gain range controlled via a serial
ADC Buffers programming interface (SPI). The TRF2443 includesthe two synthesizers for the receiver and transmitter IF SAW Filter Bypasschains, removing the need for external LO generation RX Noise Figure: 4.3 dBcircuitry and simplifying the implementation of a
RX Input IP3: 9.5 dBm frequency-division duplexing (FDD) transceiver Integrated TX and RX Synthesizers design. The TRF2443 also provides cross-
polarization interference cancellation (XPIC) support Integrated Cross-Polarization Interferencevia an integrated XPIC output amplifier and receiverCancellation (XPIC) Supportchain. The TRF2443 is an ideal building block for
Auxiliary RX Chain implementing the IF transceiver function in the indoorunit (IDU), which is connected via a coaxial cable
APPLICATIONS interface to the outdoor unit (ODU), of a point-to-pointmicrowave backhaul split-architecture system. Wireless Microwave Backhaul
Point-to-Point Microwave Broadband Wireless Applications WiMAX IF Transceiver
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright 20092012, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
http://www.ti.com/product/trf2443?qgpn=trf2443http://www.ti.comhttp://www.ti.com/product/trf2443#samples
AGCCNTL
7
0/90TXPLL
3
RXAGC
VCCs
GNDs
RXPLL
TXQ_IN
TX_OUT
TXI_IN
RX_IN
RX VGA
TX VGA
IFAMP
From SPI
from RXPLL
XPIC_INXPICOUT
XPICAGC
XPIC_BBI
XPIC_BBQ
LevelDetect
IF SAW
IF_OUT IF_IN
TX_PWD
TemperatureSensor
CLKSPIDATASPILESPI
RXBBI
RXBBQ
TEMPOUT
0/90
0/90
SPI
0/90
RX VGA
LNA
From SPI
from RXPLL
AGCCNTL
IFVGA1 IFVGA2 IFVGA3
From SPI
BB AMP/FLT
IF SAW
RX_IN
IF_OUT IF_IN
RX_BBI
RX_BBQ
RX_AGC
TRF2443
SLWS217B SEPTEMBER 2009REVISED MARCH 2012 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
TRF2443 DEVICE DESCRIPTION
Figure 1. TRF2443 Functional Block Diagram
RECEIVER DESCRIPTION
Figure 2. Receiver Chain Block Diagram
The TRF2443 features a highly linear low-noise receiver chain with over 60 dB of analog-controlled gain rangeand more than 40 dB of gain range programmable via the serial programming interface (SPI) in 1-dB steps.Moreover, the TRF2443 gives the flexibility to add an external IF filter to further remove unwanted signals. Suchan external filter can be bypassed using an internal path that can be enabled via SPI. The first block of thereceiver chain is a low-noise, highly linear IF amplifier (LNA). Its input is differential and internally matched to 50
2 Submit Documentation Feedback Copyright 20092012, Texas Instruments Incorporated
Product Folder Link(s): TRF2443
http://www.ti.com/product/trf2443?qgpn=trf2443http://www.ti.comhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLWS217B&partnum=TRF2443http://www.ti.com/product/trf2443?qgpn=trf2443
6
From SPI
0/90
To feedbackswitch
From TXPLL
TX_OUT
TXQ_IN
TXI_IN
Level
Detect
TX_PWD
ATTTXAMP
VCC
VCC
TRF2443
www.ti.com SLWS217B SEPTEMBER 2009REVISED MARCH 2012
. The TRF2443 LNA attenuation is programmable from 0 dB to 19 dB, corresponding to an LNA gain of 17 dBto 2 dB (1-dB steps). The LNA is followed by three analog-controlled VGAs that provide more than 60 dB ofgain range. The IFVGA1 output and IFVGA2 input can be connected externally (pins IFOUT and IFIN) throughan external IF filter. An internal switch gives the flexibility to bypass the external filter. The VGAs provide a gainslope of 51 dB/V. The IFVGA3 drives the demodulator, which downconverts the IF input signal directly tobaseband in-phase and quadrature. The demodulator block includes the local oscillator in-phase and quadraturegeneration circuitry followed by the LO buffer. The TRF2443 baseband section integrates a programmable-gainamplifier (PGA) and programmable low-pass filter. The baseband PGA minimum gain is 9 dB, and the maximumgain is 33 dB. The TRF2443 baseband low-pass filter cutoff frequency can be programmed from 2 MHz to 11MHz by setting the cutoff-frequency control bits appropriately. The baseband output buffers (ADC drivers) aredesigned to drive directly an analog-to-digital converter (ADC), either dc- or ac-coupled. The output commonmode of the ADC drivers is set externally via the RXBBCM pin (pin 40). When the TRF2443 is dc-connected tothe ADC, the same dc common mode can be used for both the ADC and the TRF2443 baseband output.
TRANSMITTER DESCRIPTION
Figure 3. Transmitter Chain Block Diagram
The transmitter chain integrates an IQ modulator followed by a variable attenuator and the final transmitteramplification stage. The last two blocks provide over 35 dB of gain range. A power-alarm circuit monitors thelevel at the modulator output, and its digital output goes low if the signal level falls below the user-specifiedthreshold level relative to the expected level. The first block of the transmitter chain is the IQ modulator, whichupconverts the incoming in-phase and quadrature signals to the TX IF frequency. The TRF2443 can be either ac-or dc-coupled to the digital-to-analog converter (DAC). The IQ modulator drives a variable attenuator. This blockprovides 5.5 dB of total attenuation range in 0.5-dB steps. The output amplifier integrates five attenuation stepsof 6 dB each for total of 30 dB. The output amplifier in combination with the variable attenuator provides over35.5 dB of monotonic output power control (0.5-dB steps).
SYNTHESIZERS DESCRIPTION
TRF2443 integrates two complete integer synthesizers for the receiver and transmitter chain. The RXVCOoperates at 16 times the typical RX input frequency, and the TXVCO operates at 8 times the typical TX outputfrequency.
Each synthesizer is composed of: High-frequency VCO (around 2720 MHz for the TX VCO and 2240 MHz for the RX VCO) N-divider (driven by the high-frequency VCO) done by an 8/9 prescaler followed by an A-B counter that drives
the phase-frequency detector Phase-frequency detector (PFD) (driven by the N-divider) that compares the VCO divided by N to the
reference clock divided by R signals Charge pump (driven by the PFD) which creates up and down current pulses, based on the incoming signals
from the PFD. Its output is filtered and transformed to voltage by the external loop filter and applied to theVCO input control voltage.
An external reference clock must be applied to the REFIN (pin 16). The incoming signal is buffered and goesthrough a programmable divider (R-divider).
Copyright 20092012, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TRF2443
http://www.ti.com/product/trf2443?qgpn=trf2443http://www.ti.comhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLWS217B&partnum=TRF2443http://www.ti.com/product/trf2443?qgpn=trf2443
22 23
GNDIFIN
TX
BB
IN
GNDIFIN
TX
BB
IP
IFINN
GN
DX
PIC
IFINP
XP
ICB
BC
M
VCCIFIN
XP
ICB
BQ
N
XPICOUTP
XP
ICB
BQ
P
XPICOUTN
XP
ICB
BIN
RXLOTEST
XP
ICB
BIP
VCCVCORX
VC
CX
PIC
GNDVCORX
XP
ICA
GC
