Input/output structure of the infinite horizon LQ bumpless transfer and its implications for transfer operator synthesis

INTERNATIONAL JOURNAL OF ROBUST AND NONLINEAR CONTROLInt. J. Robust Nonlinear Control 2010; 20:923–938Published online 16 July 2009 in Wiley InterScience (www.interscience.wiley.com). DOI: 10.1002/rnc.1484

Input/output structure of the infinite horizon LQ bumpless transfer and itsimplications for transfer operator synthesis

Kai Zheng and Joseph Bentsman∗,†

Department of Mechanical Science and Engineering, University of Illinois at Urbana-Champaign,1206 W Green St., Urbana IL 61801, U.S.A.

SUMMARY

The steady-state input/output structure of the infinite horizon LQ bumpless transfer topologies for strictly proper controllersis analyzed. It is found that in these topologies (1) the steady-state gain of the transfer function from the output of the onlinecontroller to that of the offline one is unity/asymptotically unity, and (2) the steady-state gain of the transfer function fromthe input of the online controller to the output of the offline one is zero/asymptotically zero, for essentially all strictly propercontrollers with the input dimension being no less than the output one. These facts (1) reveal the steady-state gain structureof the closed-loop transfer matrix in the standard LQ tracking problems, (2) demonstrate that the LQ bumpless transfertechnique solves the ideal bumpless transfer problem for controllers with an integrator in each of their output channels, (3)reveal the structure of unavoidable signal discontinuities in the controller input/output upon transfer between controllerswith non-integrating channels, and (4) provide guidance for minimizing the above signal discontinuities and the resultingbumps in the plant output in bumpless transfer synthesis. Copyright q 2009 John Wiley & Sons, Ltd.

Received 28 July 2006; Revised 17 April 2008; Accepted 7 May 2009

KEY WORDS: LQ bumpless transfer; steady-state gain; integral controllers; cheap control; LQ tracking

1. INTRODUCTION

The practical importance of bumpless transfer, orseamless switching between controllers in closed-loopcontrol applications, has spurred considerable effort inrecent years. Significant contributions have been made

∗Correspondence to: Joseph Bentsman, Department of MechanicalScience and Engineering, University of Illinois at Urbana-Champaign, 1206 W Green St., Urbana IL 61801, U.S.A.

†E-mail: [email protected]

Contract/grant sponsor: Grainger Center for Electric Machineryand Electromechanics at UIUCContract/grant sponsor: National Science Foundation;contract/grant numbers: CMS-0324630, ECS-0501407Contract/grant sponsor: Electric Power Research Institute

by Hanus et al. [1, 2], Kothare and Morari [3, 4], andothers (cf. [5–9]). A detailed review of the advantagesand disadvantages of the various anti-windup bumplesstransfer (AWBT) schemes is given in [6].

According to the objectives of design, the existingbumpless transfer schemes fall into two types: schemesof the first type, mostly originating from solving anti-windup problems, represent an AWBT operator forcingthe output of the offline controller to track that ofthe online one (cf. [5, 6, 9]). The input of the offlinecontroller in schemes of this type is conditioned by theAWBT operator and thus is not necessarily equal orclose to that of the online one at the time of transfer.Schemes of the second type (cf. [7] and the first schemein [8]), on the other hand, recognize the fact that signalsubstitution occurs at both the inputs and the outputs of

Copyright q 2009 John Wiley & Sons, Ltd.

924 K. ZHENG AND J. BENTSMAN

the controllers upon transfer and aim at simultaneouslyminimizing the difference between the online and theoffline control signals at each of these locations.

Owing to the aforementioned signal substitutionupon transfer, the ideal steady-state bumpless transferdesign requires that at the moment of controllerswitching, the values of the output signal of the offlinecontroller be, respectively, equal to those of the onlineone, and the same should hold for the controller inputs.Thus, the problem of steady-state bumpless transferdesign can be reformulated as a tracking problem, ortwo tracking sub-problems, of designing the bumplesstransfer operator such that the output signal of theoffline controller tracks that of the online one with zerosteady-state tracking error, and the same holds for thecontroller input signals. Owing to these requirements,bumpless transfer schemes of the second type providea better framework for achieving ideal bumplesstransfer. Among the schemes of this type, the infinitehorizon LQ bumpless transfer technique proposedin [7] stands out as a very convenient tool for thesteady-state bumpless transfer synthesis in industrialMIMO applications due to its widely accessible andnumerically reliable LQ computational setting as wellas excellent convergence properties inherent in the LQfull state feedback. The latter feature also makes thelatter transfer topology, augmented with a mismatchcompensator, a natural choice for bumpless transferunder controller uncertainty [9].

The questions, however, remain whether, and underwhat conditions, the aforementioned ideal bumplesstransfer design is achievable by the LQ bumplesstransfer technique of [7].

These questions are answered in the present workfor strictly proper controllers, thus completing, in part,the infinite horizon LQ bumpless transfer techniqueof [7]. Specifically, first, the steady-state input/outputstructure of the LQ bumpless transfer technique of [7]is analyzed. Namely, the transfer function from theoutput of the online controller to that of the offlineone, further referred to as G2, is expressed explicitlyin terms of the offline controller and the solution ofthe Algebraic Riccati Equation (ARE) involved. Thesteady-state gain of this transfer function is found tobe identity/asymptotically identity for essentially allstrictly proper controllers with the input dimension

Figure 1. Reduced offline controller subsystem in the 1DOFLQ bumpless transfer topology.

being no less than the output one. The latter resultalso uncovers the structure of the closed-loop transfermatrix steady-state gain in the standard LQ trackingproblems.

Moreover, the transfer function from the input of theonline controller to the output of the offline one, furtherreferred to as G1, is also analyzed, and its steady-state gain is found to be zero/asymptotically zero forthe same class of controllers for which the steady-state gain of G2 is identity/asymptotically identity. Thesignificance of the latter results can be made clear byFigure 1, where the offline controller subsystem repre-sented by G1 and G2 in the LQ transfer topologyis shown schematically, with e′ and u′ being onlinecontroller input and output, respectively, and u repre-senting the offline controller output. The derivationdetails of the diagram in Figure 1 are given in Section 3.The diagram shows that for the aforementioned classof controllers, zero steady-state error tracking of theoutput of the online controller, i.e. u′, by that of theoffline one, i.e. u, is guaranteed.

Next, the relationship between the solvability of theideal bumpless transfer problem and the steady-stategain structures of online/offline controllers is estab-lished. This relationship, in combination with the aboveresults on the input/output steady-state gain structureof LQ bumpless transfer

(1) shows that the ideal bumpless transfer designis achievable only for controllers with an inte-grator in each of their output channels, whilefor controllers having non-integrating channels,the ideal bumpless transfer design is, in general,unattainable due to the unavoidable signaldiscontinuities;

(2) demonstrates that the infinite horizon LQbumpless transfer technique solves the ideal

Copyright q 2009 John Wiley & Sons, Ltd. Int. J. Robust Nonlinear Control 2010; 20:923–938DOI: 10.1002/rnc

LQ BUMPLESS TRANSFER STRUCTURE AND ITS IMPLICATIONS 925

steady-state bumpless transfer problem forcontrollers with an integrator in each of theiroutput channels;

(3) provides guidance for minimizing the abovesignal discontinuities and the resulting bumps inthe plant output in bumpless transfer synthesis.

The paper is organized as follows: the LQ bumplesstransfer topology along with the supporting theoryis summarized in Section 2. Section 3 analyses thesteady-state gain structure of G1 and G2 in thistopology. Sections 4 and 5 present the implications ofthe results obtained in Section 3 in LQ optimal trackingproblems with nonzero setpoints and in bumplesstransfer design, respectively. The conclusion is givenin Section 6. Lemmas and proofs are given in theAppendix.

NotationThroughout this paper, I and 0 denote identity andzero matrices, respectively, with their dimension beingclear from the context. In is used to denote the identitymatrix of n×n, when it is necessary to indicate thedimension. A�B denotes that A is defined to be equalto B. The superscript T denotes matrix transposition.For consistency with the terminology in [9], the term‘steady-state gain’ is used to denote the ‘static gain’ ofa transfer function. The qualifier ‘infinite horizon’ for

LQ bumpless transfer is dropped, but assumed,throughout the paper.

2. LQ BUMPLESS TRANSFER

The LQ bumpless transfer topology proposed in [7]is shown in Figure 2. As seen from this figure, thestatic feedback matrix F maps the offline controllerstate x(t) and the online controller output u′(t) andinput e′(t), the latter being the plant output error signal,

into the offline controller input �(t), forcing the offlinecontroller output u(t) to reach the desired value neededfor the bumpless transfer. The derivation of matrixF (cf. [7]) is carried out through the quadratic mini-mization of the functional that includes the differencebetween two sets of signals, the output signals of bothcontrollers and the input signals driving the controllers,given by

J0(u,�) = 1

2

∫ ∞

0[zu(t)TWuzu(t)

+ze(t)TWeze(t)]dt (1)

where zu(t)=u(t)−u′(t), ze(t)=�(t)−e′(t), and WuandWe are constant positive definite weighting matricesof appropriate dimensions used to tune the design.

The computation of F is carried out as follows. First,a controllable and observable state-space realization(A, B,C,D) of the offline controller to be implementedis selected. The controller dynamics along with thecontroller input �(t) and output u(t) is then given by

x = Ax+B�

u = Cx+D�(2)

The vector � is computed as

�=F[xT (u′)T (e′)T]T (3)

Assuming that the online controller output u′ and inpute′ are both constant in the steady state, F can becomputed as

F=�

⎡⎢⎢⎣(BTX+DTWuC)T

(−DTWu+BTM(CTWu+CTWuD�DT+XB�DTWu))T

(−We+BTM(CTWuD�We+XB�We))T

⎤⎥⎥⎦T

(4)

Figure 2. The LQ bumpless transfer topology.



where X is the positive semi-definite solution of theARE

X A+ ATX+X BX+C=0 (5)

with �=−(DTWuD+We)−1,M=( AT+X B)−1, A=

A+B�DTWuC, B = B�BT, and C=CTWu(I +D�DTWu)C . If D=0, the expression for F noticeablysimplifies.

3. ANALYSIS OF G(0)

The offline controller subsystem consisting of theoffline controller and the feedback matrix F inFigure 2, denoted by G, can be represented by theloop configuration shown in Figure 3.

Partitioning G into (G1,G2) according to u=G1e′+G2u′, the topology of Figure 3 can be simplified to thatshown in Figure 1.

In this section, the explicit form of the transfer func-tions from the input e′ and the output u′ of the onlinecontroller to the output of the offline controller u, i.e.G1(s) and G2(s), respectively, is obtained in terms ofthe offline controller model and the solution of the AREinvolved. Then, the steady-state gains G1(0) and G2(0)of G1 and G2 are shown to be zero/asymptoticallyzero and identity/asymptotically identity, respectively,for almost all the strictly proper controllers with theinput dimension no less than the output one.

3.1. Explicit form of G1(0) and G2(0)

Suppose that the controller model is realized in thecontrollable and observable form (2), where A, B,C,Dare matrices of dimension n×n,n×m,k×n, and k×m,respectively. Minimization of the performance index(1) for fixed Wu and We gives (3) and (4), using which

Figure 3. Offline controller subsystem in the 1DOF LQbumpless transfer topology.

the transfer functions of G1 and G2 in Figure 3 can beexplicitly written as

G1(s)

={[C+D�(BTX+DTWuC)]×[s I −( A+ B X)]−1B+D}�×[−We+BTM(CTWuD�We+XB�We)] (6)

and

G2(s)

={[C+D�(BTX+DTWuC)]×[s I −( A+ B X)]−1B+D}�×[−DTWu+BTM(CTWu+CTWuD�DT

+XB�DTWu)] (7)

where A, B, �, X , and M are defined in (4). Since onlythe steady-state bumpless transfer is considered, onlythe steady-state gains G1(0) of G1 and G2(0) of G2are of interest. It follows from (6) and (7) that

G1(0) = {−[C+D�(BTX+DTWuC)]MTB+D}�[−We+BTM(CTWuD�We+XB�We)] (8)

and

G2(0) = {−[C+D�(BTX+DTWuC)]MTB+D}�[−DTWu+BTM(CTWu+CTWuD�DT

+XB�DTWu)] (9)

It can be seen that G1(0) is of dimension k×m,whereas G2(0) is square and of dimension k×k.The ijth entry in G1(0) represents the steady-stategain from the j th online controller input to the i thoffline controller output, while the ijth entry in G2(0)represents the steady-state gain from the j th onlinecontroller output to the i th offline controller output. Forsmooth steady-state bumpless transfer, it is desirablethat G1(0) be zero and G2(0) be identity. The presentwork focuses on the strictly proper subset of (2),assuming henceforth D=0. A more general case with



D=0 will be considered elsewhere. Thus, with D=0(8) and (9) yield, respectively

G1(0)=[−P−PBW−1e BT(A−BW−1

e BTX)−TX ]B (10)

and

G2(0)=QW−1e QTWu (11)

where

P=C(A−BW−1e BTX)−1 and Q=PB (12)

From (11), it is easy to see that rank(G2(0))�min(rank(C), rank(B))�min(k,m). The latter is less thank if the offline controller input dimension is less thanthe output one, i.e. m<k. This implies that G2(0) isrank deficient for any such controller and any weightingmatrices We and Wu and thus can never be identity orasymptotically identity.

For controllers with the input dimension no less thanthe output one, however, it is shown in [10] that thedeterminant of C(A−BW−1

e BTX)−1B is full row rankif the strictly proper offline controller has no zeros at theorigin. This result, in combination with the symmetricstructure of G2(0), immediately implies that G2(0) ispositive definite, yielding the following theorem.

Theorem 1Suppose that the offline controller in Figure 3 is strictlyproper and its input dimension is no less than the outputone. Suppose further that the offline controller has nozeros at the origin. Then, G2(0) is positive definite forWu = I and any choice of positive definite We.

Moreover, the following two subsections show thatG1(0) is zero or asymptotically zero, while G2(0) isidentity or asymptotically identity for almost all suchcontrollers that are strictly proper.

3.2. Case 1: Controllers containing integrators

In this case, the following theorem guarantees thatG2(0) is identity provided a controllability and observ-ability assumption is satisfied.

Theorem 2Suppose the offline controller in Figure 3 contains anintegrator in each of its output channels, i.e. the offline

controller is realizable in the following controllable andobservable form:

x1 = Asx1+Bs�

x2 = Csx1+Ds�

u = x2

(13)

where � is the input to the controller, u is the output ofthe controller, (xT

1 xT2 )T is the state vector, and As , Bs ,

Cs , Ds are matrices of dimension n×n, n×m, k×n,and k×m, respectively. Let the feedback matrix F inFigure 3 be calculated via minimization of the perfor-mance index (1). Suppose further that k�m. Then, forany choice of positive definite weighting matrices Wuand We, G2(0)= I .

ProofThe proof of Theorem 2 is given in the Appendix. �

Remark 1The controllability and observability assumption ofthe realization in (13), i.e. of the triple (A, B,C), isessential for the proof of Theorem 2 since it guar-antees that the ARE in (A1) has a unique positivedefinite stabilizing solution. A closer look into thisassumption reveals that the observability of (A,C) isequivalent to the observability of (As,Cs). The control-lability of (A, B) is, however, slightly stronger thanthe controllability of (As, Bs) in that it also requires

that(AsCs

BsDs

)be full row rank. This requirement also

justifies the assumption of k�m in Theorem 2, since

otherwise(AsCs

BsDs

)has more rows than columns,

making it impossible for the latter block matrix to havefull row rank.

On the other hand, as seen from (10), showingthat G1(0)=0 simply follows from demonstratingthat −P−PBW−1

e BT(A−BW−1e BTX)−TX =0. This

is formalized by Lemma A1 in the Appendix thatdirectly implies the following theorem.

Theorem 3Suppose that all the assumptions in Theorem 2 aresatisfied. Then, G1(0)=0, where G1(0) is given in (10).



3.3. Case 2: Controllers with non-integratingchannels

In the case when the controller does not contain an inte-grator in each of its output channels, G2(0) and G1(0)are, in general, not identity and zero, respectively, foran arbitrary choice of weighting matrices We and Wu .Nevertheless, under mild conditions, G2(0) and G1(0)are asymptotically identity and zero, respectively, asWe approaches zero. These conditions are given belowin Theorems 4 and 5 and Theorems 6 and 7 for squareand nonsquare controllers, respectively.

3.3.1. 2a: square controllers

Theorem 4Let the offline controller in Figure 3 be realized in thefollowing controllable and observable form:

x = Ax+B�

u = Cx(14)

where � is the input to the controller, u is the outputof the controller, x is the state vector and A, B, andC are matrices of dimension n×n, n×m, and m×n,respectively. Let the feedback matrix F in Figure 3 becalculated via minimization of the performance index(1) for positive definite weighting matrices Wu = I andWe=ε2 I .

Suppose that (1) the offline controller has no zeros

on the imaginary axis, i.e.(A− j�I

CB0

)is nonsingular

for any real �, and (2) CB is nonsingular. Then

limε→0+G2(0)= I (15)

where G2(0) is given in (11).


Remark 2The assumption of CB being full rank is essential tothe proof of Theorem 4, since otherwise (A13) cannotbe solved for X220. This assumption is equivalent tothe assumption that the controller in (14) has maximumnumber of zeros n−m [11]. It is remarkable that thisrequirement appears to be significantly more conserva-tive than it actually is. In fact, [12] shows that almost

all controllers of the form (14) have maximum numberof zeros n−m.

Theorem 5Suppose all the assumptions in Theorem 4 are satisfied.Then, limε→0+G1(0)=0 where G1(0) is given in (10).


3.3.2. 2b: nonsquare controllers. Although the proofof Theorem 4 does not directly apply to nonsquarecontrollers, if the controller input dimension is greaterthan the output one, extra components can be addedto the output to obtain an augmented square systemto which Theorem 4 applies. Then, a limiting proce-dure shows that G2(0) is also asymptotically identityas We approaches zero under similar conditions. Thisis formalized by Theorem 6.

Theorem 6Let the offline controller in Figure 3 be realized in thecontrollable and observable form

x = Ax+B�

u = Cx(16)

where A, B, and C are matrices of dimension n×n,n×m, and k×n, respectively, with k<m�n. Let thefeedback matrix F in Figure 3 be calculated via mini-mization of the performance index (1) for positive defi-nite weighting matrices Wu = Im and We=ε2 Im .

Suppose that (1) the offline controller does not have

zeros on the imaginary axis, i.e.(A− j�I

CB0

)is full

row rank for any real �, and (2) B is full column rankand CB is full row rank. Then

limε→0+G2(0)= Im

where G2(0) is given in (11).


Likewise, when the input dimension is greater thanthe output one, G1(0) is also asymptotically zero, inlight of Theorem 6, as is formalized by the followingtheorem. The proof of the latter is simply a repetition



of the arguments in the proof of Theorems 6 and 5 andis thus omitted.

Theorem 7Suppose all the assumptions in Theorem 6 are satisfied.Then limε→0+G1(0)=0, where G1(0) is given in (10).

4. STEADY-STATE GAIN STRUCTURE OFLQ OPTIMAL TRACKING SYSTEMS

WITH NONZERO SETPOINTS

Consider the time-invariant system

x = Ax+Bu

z = Cx(17)

where z and u have the same dimensions. Consider alsoany asymptotically stable LTI control law

u(t)=−Fx(t)+u′(t) (18)

Introduce the corresponding open-loop and closed-looptransfer matrices

H(s)=C(s I −A)−1B

and

Hc(s)=C(s I −A+BF)−1B (19)

respectively. Then, it is well-known [10] that Hc(0)is nonsingular and the controlled variable z(t) can bemaintained at any constant value r under steady-stateconditions by choosing

u′(t)=H−1c (0)r (20)

if and only if H(s) has a nonzero numerator polynomialthat has no zeros at the origin.

Note that the control law in (18) is not restrictedto LQ optimal tracking control law. Namely, thestate feedback matrix F can be any matrix suchthat A−BF is Hurwitz. Nevertheless, if LQ optimaltracking control is of interest, F should then besought as F=W−1

e BTX , with We being the weighton the energy of the control signal and X being thepositive semidefinite stabilizing solution of the AREATX+XA−XBW−1

e BTX+CTC=0. Using the results

developed in Section 3, the above results can be refinedas follows.

Corollary 8Suppose an LQ optimal tracking control law of theform (18) is obtained for the system in (17) with We=1ε2I and suppose further that all the assumptions in

Theorem 4 are satisfied. Then

limε→0+

�i (Hc(0))

ε=1 (21)

for all i=1, . . . ,n, where �i (Hc(0)) denotes the i thsingular value of Hc(0).

ProofIt follows from (11), (19) and Theorem 4 thatlimε→0+ Hc(0)Hc(0)T =ε2 I . Performing a singularvalue decomposition of Hc(0) gives Hc(0)=U�V T

with U and V unitary. Then, it follows that limε→0+ Hc(0)Hc(0)T = limε→0+U�2UT=ε2 I , implying limε→0+�2=ε2 I , and hence (21). �

It is also easy to see that if the system in (17) isreplaced by the system in (13), namely, if an integratoris present in each of the output channels of the system,then (21) holds for any value of ε. This is formalizedas follows.

Corollary 9Suppose an LQ optimal tracking control law of theform (18) is obtained for the system in (13) withWe=(1/ε2)I . Suppose further all the assumptions inTheorem 2 are satisfied and the input dimension isequal to the output one. Then �i (Hc(0))=ε for anyε>0 and all i=1, . . . ,n.

5. IMPLICATIONS OF THE LQ BUMPLESSTRANSFER STEADY-STATE GAIN STRUCTURE

FOR TRANSFER DESIGN

As mentioned in the Introduction, the ideal steady-statebumpless transfer design requires that at the momentof controller switching, the values of the output signalof the offline controller be, respectively, equal tothose of the online one, and the same should hold forthe controller inputs. Thus, the problem of bumpless



transfer design can be reformulated as a trackingproblem, or two tracking sub-problems, of designingthe bumpless transfer operator such that the outputsignal of the offline controller tracks that of the onlineone with zero steady-state tracking error, and the sameholds for the controller input signals.

To investigate the solvability of the above problem, itis first observed that at the steady state, the values of theinput and the output signals of a controller are not inde-pendent, but related by the steady-state controller gain.For instance, if a controller has an integrator at eachof its output channels, then its steady-state input signalmust be zero regardless of a bumpless transfer operatordesigned. Correspondingly, if the controller has non-integrating channels, its steady-state input signal is, ingeneral, nonzero.

It is then natural to classify controllers into twogroups:

(1) controllers with an integrator at each of theiroutput channels,

(2) controllers with non-integrating channels.

Under this classification, controller transfer falls intofour types:

(I) transfer between group (1) controllers,(II) transfer between group (2) controllers,(III) transfer from a group (1) controller to a group

(2) controller,(IV) transfer from a group (2) controller to a group

(1) controller.

The following subsections show that the idealsteady-state bumpless transfer design is attainable fortype I transfer and indeed achieved by both LQ bump-less transfer and the state/output feedback topologyproposed in [7] and [9], respectively. For controllertransfer of the rest three types, it is shown that the idealsteady-state bumpless transfer is, in general, unachiev-able, i.e. nonzero tracking error always exists intracking of the input and output of the online controllerby those of the offline controller. The latter resultsin unavoidable signal discontinuities in the controllerinput/output upon transfer between controllers withnon-integrating channels. Nevertheless, in practicalapplications where controllers are of high gain, suchtracking error as well as signal discontinuities, could

be made small by simply achieving zero steady-stateerror tracking of the output of the online controller bythat of the offline one.

5.1. Controller transfer of type I

In this type of transfer, both controllers have an inte-grator in each of their output channels. Denote thesteady-state values of the outputs and the inputs of theoffline and the online controllers u,u′, �, and e (cf.Figure 2) as us,u′

s,�s , and es , respectively. Then thefollowing relationship is easily seen to hold:

�s =es =0 (22)

automatically guaranteeing zero steady-state errortracking of the online controller input signal by that ofthe offline one under any stabilizing bumpless transferoperator. The original bumpless transfer problem thenreduces to the problem of designing a bumpless transferoperator to achieve zero steady-state error trackingof the online controller output signal by that of theoffline one. The latter is obviously a standard trackingproblem, readily solved by various methods (cf. [10]).

Moreover, it is seen from Figure 1 that in LQ bump-less transfer us =G1(0)es+G2(0)u′

s . This, combinedwith the results in Theorems 2 and 3 implies that if allthe assumptions in Theorem 2 are satisfied, then

us =u′s

i.e. ideal steady-state bumpless transfer design isachieved for any weighting matrices Wu and We.The latter is also true for the state/output feedbacktopology proposed in [9] for bumpless transfer undercontroller uncertainty, due to the use of integrators asthe internal model, as demonstrated in [9].

5.2. Controller transfer of type II

In this case, both the online and offline controllers havenon-integrating channels. These channels have finiteinput–output gains, implying that es �=0 and �s �=0.Hence (22) does not hold. For simplicity, assume thatboth the online and offline controllers have only non-integrating channels. Denote the transfer matrices of theoffline and the online controllers by Hoff(s) and Hon(s),respectively. Then, Hoff(0) and Hon(0) are both finite



and the steady-state input/output signal relationshipsfor the offline and online controllers can be, respec-tively, described by

us =Hoff(0)�s (23)

and

u′s =Hon(0)es (24)

In practice, Hoff(s) and Hon(s) are two differentcontrollers designed to achieve different closed-loopperformance objectives, such as optimal tracking anddisturbance rejection, respectively (cf. [13]). Hence,their steady-state gains, Hoff(0) and Hon(0), are, ingeneral, different, i.e.

Hoff(0) �=Hon(0) (25)

This observation, combined with (23) and (24), essen-tially implies that if the zero steady-state error trackingof the online controller input by that of the offlineone is achieved, i.e. �s =es , then, in general, us �=u′

s .Conversely, if zero steady-state error tracking of theonline controller output by that of the offline one isachieved, i.e. us =u′

s , then in general �s �=es . This resultis easily seen to also hold for controllers having bothintegrating and non-integrating channels.

Thus, for controller transfer of type II, the idealsteady-state bumpless transfer design is, in general,unattainable. Consequently, a signal jump at thecontroller input side, with the magnitude equal to|�s−es |, and/or a signal jump at the controller outputside, with the magnitude equal to |us−u′

s |, inevitablyoccur for type II transfer, where at least one of thesetwo quantities, |�s−es | and |us−u′

s |, is nonzero inlight of (25).

5.3. Controller transfer of type III and IV

If the offline controller has an integrator in each ofits output channels, whereas the online one has non-integrating channels, as described by type IV transfer,then it follows that the steady-state value of the onlinecontroller input is, in general, nonzero, i.e. es �=0,whereas the steady-state value of the offline controllerinput is zero, i.e. �s =0. Hence, inherently,

�s �=es (26)

immediately implying that the ideal steady-state bump-less transfer design is unattainable. From the symmetrybetween type III and IV controller transfer, it is easilyseen that (26) holds for type III controller transfer aswell.

Thus, the ideal controller transfer of either type IIIor IV is also unattainable. Consequently, a signal jumpwith the magnitude equal to |�s−es |>0 inevitablyoccurs for type III and IV transfer at the controllerinput side upon controller transfer.

5.4. Impact of the above analysis on design

As analyzed above, the ideal bumpless transfer designfor type I transfer is easily achieved by solving a stan-dard tracking problem, whereas for type II, III andIV transfer, the ideal bumpless transfer design is, ingeneral, unattainable and controller input/output signaldiscontinuities are unavoidable upon transfer. Thesesignal discontinuities could potentially lead to unde-sirable bumps in the plant output. In practice, in typeII transfer, however, when controllers involved are ofhigh gain, as is the case for the majority of applica-tions that require small tracking/regulation error, thesteady-state value es of the online controller input, thatis, obviously, also the steady-state tracking/regulationerror, is small. If the original bumpless transfer problemis recast as the standard tracking problem of designinga bumpless transfer operator such that the output ofthe offline controller tracks that of the online one, i.e.us =u′

s , then the resulting steady-state offline controllerinput �s is also small. This essentially implies that

|�s−es | small and |us−u′s |=0 (27)

It is also easy to see that (27) holds for type II andIII transfer as well if the original bumpless transferproblem is also recast as the standard tracking problem.This result justifies the use of the convergence ofcontroller outputs alone as the criterion for readinessto transfer (cf. [5, 6], and [9]).5.5. An example

To demonstrate the analysis carried out in this section,the bumpless transfer from the tracking controllerto the disturbance rejection one in the control ofan induction motor [13] is taken as an example.



The online and offline controllers are then the trackingand the disturbance rejection controllers, respec-tively. Both controllers are three-input–three-outputand have only non-integrating channels, implyingthe transfer of type II. The controller input containstracking errors for rotor q-axis flux, d-axis flux, andspeed. The controller output contains stator q-axisand d-axis voltage commands and stator frequencycommand. The steady-state gains of the online andoffline controllers are

Hon(0)=⎛⎜⎝

1.5673 0.1473 0

−1.2735 0.0567 0

0 0 0.0342

⎞⎟⎠×106 (28)

and

Hoff(0)=⎛⎜⎝

1.5514 0.1526 0

−1.2936 0.0569 0

0 0 0.5295

⎞⎟⎠×106 (29)

respectively. It is seen that Hoff(0) �=Hon(0), implyingthat the ideal steady-state bumpless transfer designis, indeed, unattainable. Specifically, if the inductionmotor is operating at, for example, 360 rad/s underthe tracking controller, then simulation shows thatthe steady-state values of the online controller inputand output are es =(0.0046 0.1196 1.061)T×10−2

and u′s =(247.5 9.78 362.7)T, respectively. Then,

it is easily seen that if the original bumpless transferproblem is recast as a standard tracking problem suchthat the output of the online controller is tracked by thatof the offline one with zero steady-state tracking error,i.e. us =u′

s , then �s =(0.0044 0.1174 0.0685)T×10−2 �=es . Nevertheless, ‖�s−es‖=0.9925×10−2

is very small. The resulting transfer performance isshown in Figure 5 of [13], where it is clearly seen thatbumpless transfer is achieved. This demonstrates thatthe convergence of the output of the offline controllerto that of the online one prior to transfer sufficesto achieve good transfer performance. On the otherhand, if the input of the offline controller is madeto track that of the online one with zero steady-statetracking error, i.e. �=es , then it follows from (29)that us =(253.2 9.1 5616.3)T �=u′

s , and ‖us−u′s‖=

5253.6�‖�s−es‖=0.9925×10−2. The large signal

discontinuity generated at the controller output will,obviously, lead to undesirable bumps at the plantoutput.

6. CONCLUSION

The inherent steady-state structure of the transferfunctions from the input and output of the onlinecontroller to the output of the offline controller inLQ bumpless transfer topology is established to bezero/asymptotically zero and identity/asymptoticallyidentity, respectively, for almost all strictly propercontrollers with the input dimension being no lessthan the output one. These results, combined with theobserved relationship between the solvability of theideal bumpless transfer problem and the steady-stategain structure of the off-line and the online controllers,(1) demonstrate that the LQ bumpless transfer tech-nique solves the ideal bumpless transfer problem forcontrollers with an integrator in each of their outputchannels; (2) reveal the structure of unavoidable signaldiscontinuities in the controller input/output upontransfer between controllers with non-integrating chan-nels; and (3) provide guidance for minimizing theabove signal discontinuities and the resulting bumpsin the plant output in bumpless transfer synthesis. Theestablished results also clarify the steady-state gainstructure of the LQ optimal tracking systems.

APPENDIX A

A.1. Proofs

Proof of Theorem 2Rewriting (13) as

x = Ax+B�

u =Cx

where

x=(x1

x2

), A=

(As 0

Cs 0

), B=

(Bs

Ds

)



and C=(0 Ik), it follows from (11) that G2(0)=QW−1

e QTWu where Q=C(A−BW−1e BTX)−1B and

X is the unique positive definite stabilizing solution ofthe ARE

XA+ATX−XBW−1e BTX+CTWuC=0 (A1)

Let us now partition X into

X =(X1 X2

XT2 X3

)(A2)

where X1, X2, and X3 are n×n, n×k, and k×kmatrices, respectively, and both X1 and X3 aresymmetric. Then, from (A1) it follows that

ATs X1+X1As−(X1Bs+X2Ds)W

−1e

×(BTs X1+DT

s XT2 )+CT

s XT2 +X2Cs =0 (A3)

ATs X2+CT

s X3

−(X1Bs+X2Ds)W−1e (BT

s X2+DTs X3)=0 (A4)

and

−(XT2 Bs+X3Ds)W

−1e (BT

s X2+DTs X3)+Wu =0 (A5)

On the other hand, substituting (A2) into the formulafor Q yields

Q=(0 I )

(A11 A12

A21 A22

)−1(Bs

Ds

)

where A11= As−BsW−1e (BT

s X1+DTs X

T2 ), A12=

−BsW−1e (BT

s X2+DTs X3), A21=Cs−DsW−1

e (BTs X1+

DTs X

T2 ), and A22=−DsW−1

e (BTs X2+DT

s X3). For thepurpose of the proof, assume that A11 is nonsingular.Then, applying the matrix inversion formula in [14]yields

Q=−�−1(A21A−111 Bs−Ds) (A6)

where �= A22−A21A−111 A12. Now, it is seen that (A4)

implies

AT11X2+AT

21X3=0 (A7)

Since A11 is assumed to be nonsingular, XT2 =−X3

A21A−111 . It then follows from the nonsingularity of X3

that A21A−111 =−X−1

3 XT2 . Using this equality in (A6)

gives

Q=−W−1u (XT

2 Bs+X3Ds) (A8)

where the last equality follows from (A5). Substi-tuting (A8) into (11) and again using (A5) yieldsG2(0)= I . It remains to show that A11, i.e. As−BsW−1

e (BTs X1+DT

s XT2 ), is indeed nonsingular. For this

purpose, assume that As−BsW−1e (BT

s X1+DTs X

T2 )

is singular. Then, there is a nonzero x ∈Cn suchthat (As−BsW−1

e (BTs X1+DT

s XT2 ))x=0. However,

it follows from right multiplying (A7) by A21 thatAT11X2A21+AT

21X3A21=0. Then, left and right multi-plying the above equality by xT and x , respectively,yields xTAT

21X3A21x=0. X3 in the expression aboveis positive definite, since X is positive definite. Hence,A21x=0. It follows then that

(A−BW−1e BTX)

(x

0

)=(A11 A12

A21 A22

)(x

0

)=0

contradicting the fact that A−BW−1e BTX is Hurwitz.

�

Proof of Theorem 4First, we note that the assumption of the nonsingularityof CB implies that B is full column rank, which, byvirtue of Lemma A2, guarantees the existence of acoordinate transformation that brings B to the formB=[0 I ]T. Furthermore, under this transformation,C=[C1 C2], with C2 being an m×m square matrixand nonsingular. Without loss of generality, it isassumed that the realization in (14) is already under

the transformed coordinate, where A=(A11A21

A12A22

),

with A11, A12, A21, and A22 being matrices of dimen-sion (n−m)×(n−m), (n−m)×m, m×(n−m), andm×m, respectively.

It then follows immediately that the assumption that(A− j�I

CB0

)is nonsingular for any real � is equivalent

to(A11− j�I

C1

A12C2

)being nonsingular for any real �



and, further on, equivalent to the assumption that

Ac � A11−A12C−12 C1 has no eigenvalues

on the imaginary axis (A9)

due to the nonsingularity of C2.Moreover, it is also easily seen that the controllability

of the pair (A, B) is equivalent to the controllability ofthe pair (A11, A12) and, hence, implies the controlla-bility of the pair (Ac, A12).

Next, note that We=ε2 I implies [15] that the solu-tion of the ARE in (5) takes the following form:

X =(

X11 εX12

εXT12 εX22

)(A10)

Substituting (A10) into (5) gives an equivalent set ofequations:

X11A11+AT11X11+εX12A21+εAT

21XT12+CT

1C1

= X12XT12

X11A12+εX12A22+εAT11X12+εAT

21X22+CT1C2

= X12X22

εXT12A12+εAT

12X12+εX22A22+εAT22X22+CT

2C2

= X22X22

(A11)

Now, an asymptotic solution of (A11) can besought [15] such that the quantities Xi j , i, j =1,2 havethe following expansion:

Xi j (ε)∼∞∑k=0

Xijkεk (A12)

Substituting (A12) into (A11) and letting ε tend to zeroyield

X110A11+AT11X110 = X120X

T120

X110A12+CT1C2 = X120X220

CT2C2 = X220X220

(A13)

from which X110, X120, and X220 can be uniquely deter-mined [15] as follows:

X220 = (CT2C2)

1/2 (A14)

X120 = (X110A12+CT1C2)(C

T2C2)

−1/2 (A15)

and X110 satisfies the reduced order ARE

X110Ac+ATc X110−X110A12(C

T2C2)

−1AT12X110

=0 (A16)

where Ac is defined in (A9). Note that (Ac, A12) iscontrollable and Ac not having eigenvalues on the imag-inary axis (cf. (A9)) implies that the pair (0, A) does nothave any unobservable modes on the imaginary axis.It then follows fromARE theory [16] that a unique posi-tive semidefinite stabilizing solution X110 exists suchthat

Ap � Ac−A12(CT2C2)

−1AT12X110

= A11−A12X−1220X

T120 (A17)

is stable.Now, it is seen from (11) that G2(0)=(Q/ε)(Q/ε)T.

It then follows by using (A10) that

Q/ε = (C1 C2)

×(

εA11 εA12

εA21−XT12 εA22−X22

)−1(0

Im

)(A18)

The above inverse is guaranteed to exist by the prop-erties of ARE. Moreover, for sufficiently small ε,εA22−X22 is invertible. Thus, the matrix inversionformula in [14] can be applied to yield

Q/ε = [−C1+C2(εA22−X22)−1(εA21−XT

12)]×[L−1εA12(εA22−X22)

−1]+C2(εA22−X22)

−1

where L = εA11 − εA12(εA22 − X22)−1(εA21 − XT

12).Then, it follows by letting ε tend to zero that

limε→0+ L−1ε=(A11−A12X

−1220X

T120)

−1= A−1p (A19)

and, hence, limε→0+ Q/ε=[C1−C2X−1220X

T120]

[A−1p A12X

−1220] −C2X

−1220. It then follows that



limε→0+G2(0)= limε→0+ Q/ε limε→0+ QT/ε=C2X−1220X

−1220C

T2 +R where

R = −[C1−C2X−1220X

T120][A−1

p A12X−1220]X−1

220CT2

−C2X−1220X

−1220A

T12A

−Tp [C1−C2X

−1220X

T120]T

+[C1−C2X−1220X

T120][A−1

p A12X−1220]X−1

220AT12A

−Tp

×[C1−C2X−1220X

T120]T (A20)

SinceC2X−1220X

−1220C

T2 = I in light of (A14), it suffices

to show that R=0.Indeed, due to (A14) and (A15), C1−C2X

−1220X

T120=

−C−T2 AT

12X110. (A20) is then simplified to R=C−T2 AT

12X110A−1p A12X

−2220C

T2 +C2X

−2220A

T12A

−Tp X110

A12C−12 +C−T

2 AT12X110A−1

p A12X−2220A

T12A

−Tp X110A12

C−12 which, by using (A14), can be further reduced to

R =C−T2 AT

12(X110A−1p +A−T

p X110+X110A−1p A12

×(CT2C2)

−1AT12A

−Tp X110)A12C

−12 (A21)

Also, (A16) implies that X110A−1p =−A−T

c X110.Substituting the latter into (A21) yields the desiredresult. �

Proof of Theorem 5The expression for G1(0) in (10) can be rewritten asG1(0)=−Q−(Q/ε)(B/ε)T(A−BBTX/ε2)−TXB. Itis already clear from Theorem 4 that limε→0 Q=0and limε→0(Q/ε)=T , where T is a constant matrixwith TTT = Ik . Moreover, it follows from LemmaA3 that limε→0 XB=0. It then suffices to show thatBT(A−BW−1

e BTX)−T is bounded as ε→0. However,this is guaranteed, since (A18) and (A19) imply that

(B/ε)T(A−BBTX/ε2)−T

=(A−BBTX/ε2)−1B/ε

=( −L−1εA12(εA22−X22)

−1

(εA22−X22)−1(εA21−XT

12)+(εA22−X22)−1

)

and hence

limε→0+(B/ε)T(A−BBTX/ε2)−T

=⎛⎝ A−1

p A12X−1220

−X−1220X

T120A

−1p A12X

−1220−X−1

220

⎞⎠which is a constant matrix. �

Proof of Theorem 6Assumptions (1) and (2) essentially guarantee thatthere exists a full row rank matrix C0 of dimension(m−k)×n, such that for any �>0, the augmented

matrix Ca�(

C�C0

)is of dimension m×n, and such that(

A− j�ICa

B0

)is nonsingular for any real � and CaB is

nonsingular, i.e. the augmented system described by

x = Ax+B�

ua = Cax(A22)

satisfies all the assumptions in Theorem 4. It thenimmediately follows from Theorem 4 that for every�>0,

limε→0+Ha(Xa(�,ε),ε)= Im (A23)

where, for simplicity, Ha(Xa(�,ε),ε) denotes theG2(0) associated with the augmented system (cf. (11)),i.e.

Ha(Xa(�,ε),ε) =Ca(A−BBTXa(�,ε)/ε2)−1(BBT/ε2)

×(A−BBTXa(�,ε)/ε2)−TCTa

(A24)

In the latter expression, Xa(�,ε) is the unique posi-tive definite stabilizing solution to the ARE for theaugmented system in (A22), given by (5). The latter,when the matrices A, B, C , and X are replaced by A,BBT/ε2, Ca and Xa , respectively, takes the form

Xa A+ATXa− 1ε2XaBB

TXa+CTa Ca =0 (A25)

On the other hand, it is desired to show that

limε→0+H(X (ε),ε)= Ik (A26)



where H(X (ε),ε) denotes the G2(0) associated withthe original system in (16) (cf. (11)), i.e.

H(X (ε),ε) =C(A−BBTX (ε)/ε2)−1(BBT/ε2)

×(A−BBTX (ε)/ε2)−TCT (A27)

In expression (A27), X (ε) is the unique positive definitestabilizing solution to the ARE for the original system,given in (5). The latter, when the matrices A, B, and Care replaced by A, BBT/ε2, and C , respectively, takesthe form

XA+ATX− 1

ε2XBBTX+CTC=0 (A28)

Then, since

Ha(Xa(�,ε),ε)

=(

CS(Xa(�,ε),ε)CT �CS(Xa(�,ε),ε)CT0

�C0S(Xa(�,ε),ε)CT �2C0S(Xa(�,ε),ε)CT0

)

where S(Xa(�,ε),ε)=(A−BBTXa/ε2)−1(BBT/ε2)(A

−BBTXa/ε2)−T, it follows from (A27) and (A23) that

for every �>0,

limε→0+H(Xa(�,ε),ε) = lim

ε→0CS(Xa(�,ε),ε)CT

= Ik(A29)

Hence

limε→0+ lim

�→0+H(Xa(�,ε),ε) = lim

�→0limε→0

H(Xa(�,ε),ε)

= Ik (A30)

Comparing (A30) with (A26), it follows that to show(A26), it suffices to show that H(Xa(�,ε),ε) is contin-uous in Xa and

lim�→0+

Xa(�,ε)= X (ε) (A31)

Indeed, H is ([14] p. 366) differentiable in Xa ,implying that it is continuous if A−(1/ε2)BBTXa isnonsingular. The latter, however, is guaranteed by theproperties of the ARE.

To show (A31), first note that the ARE in (A25)coincides with the ARE associated with the optimal

solution to the standard LQR problem [10] for thesystem in (A22) under the performance index

Ja(x(0),�,ε,�(t))

=∫ ∞

0[x(t)TCT

a Cax(t)+ε2�(t)T�(t)]dt (A32)

Also note that the performance index in (A32) isdifferent from that in (1).

Denote the optimal cost by J ∗a (x(0),�,ε). Then it

is well-known that J ∗a (x(0),�,ε)= x(0)TXa(�,ε)x(0).

Likewise, the above ARE coincides with the AREassociated with the optimal solution to the stan-dard LQR problem [10] for the original controllerunder the performance index J (x(0), ε, �(t))=∫∞0 [x(t)TCTCx(t)+ε2�(t)T�(t)]dt , whose optimalvalue is given by J ∗(x(0),ε)= x(0)TX (ε)x(0).

Then, substituting the expression for Ca into (A32),it follows that

lim�→0+

J ∗a (x(0),�,ε)

= lim�→0+

min�(t)

Ja(x(0),�,ε,�(t))

=min�(t)

lim�→0+

Ja(x(0),�,ε,�(t))

=min�(t)

lim�→0+

∫ ∞

0[x(t)TCTCx(t)

+�2x(t)TCT0C0x(t)+ε2�(t)T�(t)]dt

=min�(t)

J (x(0),ε,�(t))= J ∗(x(0),ε)

Thus, lim�→0 x(0)TXa(�,ε)x(0)= x(0)TX (ε)x(0) forany x(0), implying (A31). �

A.2. Lemmas

Lemma A1Suppose all the assumptions of Theorem 2 are satisfied.Then

−P−PBW−1e BT(A−BW−1

e BTX)−TX =0

where P=C(A−BW−1e BTX)−1.

ProofThe proof of this lemma is carried out through straight-forward algebraic manipulation and thus is omitted.

�



Lemma A2 (Jameson [15])Suppose that a dynamic system is realized as

x = Ax+Bu

y = Cx(A33)

where A and B are n×n and n×m matrices. Supposethat the matrix B has rank m�n. Then, there exists achange of variables [17] to transform the realization in(A33) into the form

˙x = Ax+ Bu

y = C x(A34)

where B=[

0Im

]. If m=n, B= In .

ProofSince B has rankm�n, there exist nonsingular matricesM and N of dimension n×n and m×m, respectively,such that B=MBN. The desired change of variables isgiven by x=Mx, u=N−1u. The matrices in (A34) arethen given by A=MAM−1, B=MBN, and C=CM−1.

�

Lemma A3Suppose that an ARE is given by

XA+ATX− 1

ε2XBBTX+CTC=0 (A35)

where A, B, and C are matrices of dimensionn×n,n×m, and k×n, respectively, (A, B) and (A,C)

are stabilizable and detectable, respectively, and ε is a

positive real number. Suppose further that B=[

0Im

].

Then the following is true: if m<n, then

limε→0+ X =

[X110 0

0 0

](A36)

where X110 is a constant matrix of dimension(n−m)×(n−m). In the case when n=m, limε→0+ X=0.Moreover, limε→0+ XB=0 for both cases.

ProofThe fact that limε→0+ X exists is well known (e.g.[18], Remark 26 , or [19]). Further on, partition X as

[X11

XT12

X12X22

]where X11 is of dimension (n−m)×(n−m).

The ARE in (A35) can then be written as

ε2(XA+ATX+CTC)=XBBTX =(XB)(XB)T (A37)

It is now seen that lim�→0+XB=0. The desired results

follow by observing that m<n implies XB=[X12X22

],

while n=m implies that XB= X . �

ACKNOWLEDGEMENTS

The authors would like to thank the Associate EditorProfessor Henrik Niemann and the anonymous reviewersfor their insightful comments and illuminating suggestionsresulting in a substantial restructuring and improvementof the original submission. This work is jointly supportedby the Grainger Center for Electric Machinery and Elec-tromechanics at UIUC, National Science Foundation undergrants CMS-0324630 and ECS-0501407, and ElectricPower Research Institute.

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Documents

Input/output structure of the infinite horizon LQ bumpless transfer and its implications for transfer operator synthesis