IGEM Tutorial – Digital Circuit

By 石嘉慧4 June 2008

4 June 2008 IGEM Tutorial 2

Outline

Basic Concept Logic Gates Arithmetic Circuit

(Half adder/Full adder) Counter

4 June 2008 IGEM Tutorial 3

Basic Concept 1 Bit( 位 ): 0 or 1 1 Digit = 4 bits 1 Byte( 字节 ) = 2 digits = 8 bits

K = Kilo = 210 =1024 Kb = K bits = 1024 bits KB = K Bytes = 1024 Bytes 1M = Mega = 1024K 1G =Giga = 1024M

4 June 2008 IGEM Tutorial 4

Binary Number 0000 - 0 0001 - 1 0010 - 2 0011 - 3 0100 - 4 0101 - 5 0110 - 6 0111 - 7

1000 - 8 1001 - 9 1010 - 10 1011 - 11 1100 - 12 1101 - 13 1110 - 14 1111 - 15

4 June 2008 IGEM Tutorial 5

Logic Gates NOT – inverse x’

AND – 1 if both 1 x·y / xy

NAND – NOT AND (x·y)’ (the bubble means NOT)

http://en.wikipedia.org/wiki/Logic_gate

4 June 2008 IGEM Tutorial 6

Logic Gates OR – 1 if either 1 x+y

NOR – NOT OR (x+y)’

XOR – same 0; different 1 x⊕y=x’y+xy’

http://en.wikipedia.org/wiki/Logic_gate

4 June 2008 IGEM Tutorial 7

DeMorgan’s Law (x1 x2 … xn)’ = x1’+x2’+…+xn’

(x1 +x2+ … +xn)’ = x1’x2’…xn’

So (x+y)’ = x’y’; (xy)’ = x’+y’

4 June 2008 IGEM Tutorial 8

Arithmetic Circuit

运算电路

A circuit, composed of logic gates, to do arithmetic (+ - * / magnitude comparison …)

4 June 2008 IGEM Tutorial 9

Half adder 0+0=0

0+1=11+0=11+1=10

x+y=CS C is Carry( 进位 ) S is Sum Manually derive truth table

Observe:

4 June 2008 IGEM Tutorial 10

Half adder

x+y=CS 1 AND gate + 1 XOR gate

4 June 2008 IGEM Tutorial 11

Full adder

One more operand, z, which is the carry from the previous bit addition

x+y+z = CS Two expressions

(Use specific technique to derive)

4 June 2008 IGEM Tutorial 12

Counter – Flip-flop

Flip-flop ( 触发器 ) – sth. used to store 1 bit (1 bit memory)(Another meaning of Flip-flop is 人字拖 , but I’m not talking about that.)

3 common types:T/D/JK flip-flop

4 June 2008 IGEM Tutorial 13

Counter – T flip-flop

T Flip-flop:

Clock regularly changes between 0 and 1 (e.g. once/100ns)

When clock rises from 0 to 1:If control bit T is 0, Output bit Q doesn’t change.If control bit T is 1, Output bit Q changes (01;10).

Control Bit

Clock

Output Bit

Inverse of output Bit

4 June 2008 IGEM Tutorial 14

Counter – Binary Counter

Counting sequence: A3A2A1A0 A3A2A1A00 0 0 0 - 00 0 0 1 - 10 0 1 0 - 20 0 1 1 - 30 1 0 0 - 40 1 0 1 - 50 1 1 0 - 60 1 1 1 - 7

1 0 0 0 - 81 0 0 1 - 91 0 1 0 - 101 0 1 1 - 111 1 0 0 - 121 1 0 1 - 131 1 1 0 - 141 1 1 1 - 15

4 June 2008 IGEM Tutorial 15

Counter There is technique to design counters

counting in any number sequence.(e.g. 2 5 3 8 15 7 4 12…)

With extra functions appended. (e.g. Reset, up/down counting selection…)

But the circuit can be quite complicated.

4 June 2008 IGEM Tutorial 16

Summary

Basic Concept Logic Gates

NOT, AND, NAND, OR, NOR, XOR Arithmetic Circuit

Half adder, Full adder Counter

Flip-flop, Binary Counter

4 June 2008 IGEM Tutorial 17

Next… More tutorials can be given if more engineering

knowledge is needed and if I know them…

Sensors? Signal processing? Robotics? Computer Organization? Artificial Intelligence? Or even math? (Actualy, I haven’t learnt much of it.)