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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 9, SEPTEMBER 2008 3249

Power-Conditioning Circuitry for a Self-PoweredSystem Based on Micro PZT Generators in a

0.13-µm Low-Voltage Low-Power TechnologyJordi Colomer-Farrarons, Student Member, IEEE, Pere Miribel-Català, Member, IEEE,

Albert Saiz-Vela, Student Member, IEEE, Manel Puig-Vidal, Member, IEEE, andJosep Samitier, Member, IEEE

Abstract—The concept and design of a power-conditioning cir-cuit for an autonomous low-power System-in-Package (SiP) ispresented in this paper. The SiP’s main power source is based onthe use of micropiezoelectric generators. The electrical model ofthe power source, which has been obtained based on experimen-tal measurements and implemented on Cadence Analog Artist’sSpectre simulation environment, is explained. The model has beenused to simulate the power source with the power-conditioningelectronics over the entire design process. Finally, the simulatedand experimental results of the developed integrated power cir-cuits, which are formed by a rectifier and a low-power bandgapreference voltage source to define the threshold voltage for theclosed-loop regulation process, are also shown. These circuits havebeen designed using a commercial 0.13-µm technology from STMicroelectronics through the Multi-Projects Circuits (CMP) Tech-niques of Informatics and Microelectronics for Integrated SystemsArchitecture (TIMA) service.

Index Terms—Electric power generation, energy scavenging,low-power electronics, power conditioning, vibrations.

I. INTRODUCTION

NOWADAYS, there is an enormous interest in renewableenergy sources and their applications, particularly for

high power levels [1]–[3]. There is also an increasing interest inusing free available external energy sources for powering smallelectronic systems, a process known as energy harvesting [4].However, the amount of energy that can be obtained from theseexternal ambient sources like vibrations, heat, light, radio waves[5]–[8], or from human activity [9], [10] is limited regardingpower-consumption levels.

Some already published works show the design of self-powered systems based on microelectromechanical-system(MEMS) micropower sources like electromagnetic micropowerMEMS generators [11], [12], variable capacitors [13], piezo-electric (PZT)-based generators [14], or defining completely anintegrated sensor node [15]. Examples of this technologies arethe design of self-powered wireless networks [16] formed bydistributed sensors which are capable of monitoring the real-time condition of motors, turbines, pumps, and gear boxes andthe design of heating or ventilation control systems for burglar

Manuscript received February 28, 2008; revised June 17, 2008. First pub-lished July 9, 2008; last published August 29, 2008 (projected).

The authors are with the Systems for Instrumentation and CommunicationsLaboratory (SIC), Electronics Department, Universitat de Barcelona, 08028Barcelona, Spain (e-mail: [email protected]).

Digital Object Identifier 10.1109/TIE.2008.927973

alarms. One of the most interesting fields where this technologyis being applied is biology, where self-powered RF-ID tags canmonitor the working temperature on ultrahigh bands [18], [19]or check animal’s healthcare [20], [21]. Finally, self-poweredcommercial devices have been developed using the harvestingapproach like the Seiko Kinetic wristwatch [22] or a smarttennis racquet [23].

The continuous advances in the semiconductor’s integrationtechnology related to the reduction of the transistor’s sizeallow the industry to develop these new self-powered portableelectronic devices which usually include in their System-in-Package (SiP) or System-on-Chip (SoC) a great variety ofcircuitry and functions like wireless sensor networks or bio-medical electrical instrumentation. However, the main problemwith these new devices resides in the power-supply system,which is usually based on a typical bulky battery solution oftenwith much larger size than the SiP or SoC itself.

The size, width, finite-energy lifetime, and battery replace-ment are important drawbacks for those small and portableapplications that need long-lifetime energy-supply systems[24]–[26]. Therefore, novel and innovative energy-supply al-ternatives must be explored to remove or replace the batterydependence and make feasible the deployment of these free-battery-dependence devices. Focusing on this field, a new trendin the research of energy sources for low-power applicationshas grown rapidly in recent years. This approach consists ofharvesting the available energy of the environment in order tosupply enough power to the electronic applications instead ofusing a battery or other technologies with short lifetime andfinite amount of energy.

This paper is focused on the development of a real power-supply system based on the scavenged energy from mechanicalvibrations [27]. The idea is to avoid the use of any standardbattery and just work with the energy provided by the vibrationsof PZT materials. The developed power-supply system will bethe main part of the power-management circuitry of a self-powered microsensor network which is still being designed.

The structure of this paper is the following. In Section II, theconception of the full system is presented. Section III shows theelectrical model of the PZT generator. The designed integratedcircuits that define the whole system (formed by a rectifier, abandgap circuit, and control unit) are described in Section IV.Finally, Section V presents the simulated and experimentalresults of the power-conditioning circuitry.

0278-0046/$25.00 © 2008 IEEE

3250 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 9, SEPTEMBER 2008

Fig. 1. Proposed self-powered SiP.

Fig. 2. Performance of the presented PCC.

II. CONCEPT OF THE SIP SYSTEM

The proposed whole system (see Fig. 1) is conceived as aSiP, where sensors, interface electronics, processing, wirelesscommunications, and power systems are combined inside thesame package. However, the presented work in this paper isfocused on the development of the SiP’s power-supply system.

The input energy source is based on a PZT microgeneratorwhich supplies an ac voltage. This ac signal must be rectified,and the obtained dc signal, with some ripple, is used to drive asupercapacitor (SCapa).

A logic circuitry (control unit, Fig. 1) based on severalcomparators senses the voltage at the SCapa and defines twotrigger values (V max

out and V minout ) in order to control two PMOS

switching transistors. One PMOS switch is used to control thepower delivered to the interface and processing electronics,whereas the other one is used to control the power deliveredto the RF circuitry.

After the charging phase, when the voltage value at theSCapa raises to the regulated value of V max

out provided by therectifier, a control signal is generated to switch-on the PMOStransistors in order to start a discharge process (dischargingphase) over the SCapa. When the voltage decreases down toV min

out , the switching transistors are switched-off, finishing thedischarging phase. Note that V min

out is defined by the minimumsuitable voltage to ensure the right performance of the loadelectronics that would be used.

Once finished with the described charge–discharge cycle, theSCapa is charged again to the defined V max

out (recharging phase)as it is shown in Fig. 2. Furthermore, both trigger values, V max

out

and V minout , could be defined by the control unit, as it is presented

in Section IV.

III. ELECTRICAL MODEL OF THE PZT POWER SOURCE

A. Simple PZT Model

The used PZT generator is based on the Quick Pack QP20W(Midé Technology Corporation, Medford, MA, USA). TheQuick Pack QP20W [28] is a composite beam made of twoPZT layers working as a bimorph body, with an intermediatelayer based on polyimide. This composite beam is then locatedwith one end clamped to a vibrating body and the other endremaining free. The vibrations forced at the clamped end arepropagated along the cantilever beam. This wave generatesan induced strain in the membrane, which at the same timeproduces an electrical charge.

A lumped electrical model compatible with Spectre softwarehas been developed to validate the conception of the power-conditioning-circuit (PCC) integrated circuit. The model isbased on the modal analysis of PZT Euler–Bernoulli beamequations [29]. Solving the beam equation for the first res-onance mode and considering the equivalences between theequations defining a mechanical system and the equations

COLOMER-FARRARONS et al.: POWER-CONDITIONING CIRCUITRY FOR A SELF-POWERED SYSTEM 3251

Fig. 3. QP20W experimental-setup model identification and validation.

defining an electrical circuit, then an electromechanical equiv-alent circuit is proposed. All the electrical components thatappear in the equivalent circuit have been defined by meansof the beam geometrical and material parameters. Due to thecomposite nature of the material, some of these parameters areexperimentally identified. The experimental setup for modelidentification and model validation is shown in Fig. 3. Thetransducer is mounted and clamped over an electromagnetic vi-bration shaker ET-132 from Labworks Inc. The shaker is drivenwith a specific amplifier Pa-119 from Labworks Inc., with thecommand signals coming from a function generator. For thedisplacement measurements, a triangulation laser LC2440 fromKeyence is used. A model of the PZT is shown in Fig. 4.

B. Array of PZT Model

In order to increase the current capability of the powersource, different PZT have been used at the same time. This newpower-source structure uses in parallel different PZTs, allowingthe system to obtain a higher current. The idea is shown inFig. 1. Different simple PZT generators are connected in par-allel, creating an array of generators, assuming, at first glance,that all of the PZT generators are synchronized and vibratingat the same frequency. This array is then connected to thepower-conditioning circuitry to load the SCapa. This topologyallows us to use one or several PZT generators, increasing ordecreasing the total amount of current generated by the PZTs.

Moreover, the use of several PZT generators in a parallelconfiguration decreases the required charging time of the SCapaat the initial start-up instant. The fall of the charging time isshown in the simulation of Fig. 5, where different chargingtimes for different arrays of PZT generators at the 100-µFcapacitor are shown. Waveform Vldo9 shows the charging timefor an array composed by nine simple GP20W generators.

Fig. 4. (a) PZT model. (b) PZT symbol.

Waveform Vldo3 represents the time involved in the charge foran array of three elements, whereas waveform Vldo1 representsthe time for a single PZT generator.

It is important to remark that the simulation shown in Fig. 5has been carried out with a capacitive element which is notexactly the one used in the SiP. This simulation has just beenperformed to show how the use of an array of PZT can reducethe charging time of the SCapa. It can also be noticed thatthere is not a perfect additive current effect. Table I summarizesthe most important features of the three situations simulatedusing different arrays of PZT generators vibrating with anacceleration of 7 m/s2 at 80 Hz, which is the frequency usedfor the experimental validation presented in Section V.

With this acceleration value, the PZT open-circuit voltage(Voc) is equal to 2.5 V. The working principle of the PCC(control unit) is based in achieving the maximum PZT trans-ducer efficiency [30], which is defined by

Vco = Voc/2 (1)

where Vco is the rectified voltage with the generators connectedto the circuit. All these voltages are peak values.

IV. POWER-CONDITIONING CIRCUITRY

The power-conditioning circuitry combines three main cir-cuits: an integrated rectifier, which is needed to rectify theac signal coming from the PZT source; a voltage bandgapreference circuit, which is used to define a reference voltage;and a control unit.

A. Rectifier Circuits

Since the PZT generator supplies an ac voltage, a rectifica-tion stage is needed. Two different rectifiers [31], [32] basedon the diode-bridge configuration have been tested (see Fig. 6).Vin+ − Vin− is the generated ac signal that has to be rectified,and VSCapa is the dc voltage at the SCapa (see Fig. 1). Thefirst rectifier is based on NMOS transistors [Fig. 4(a)] andthe second one based on PMOS transistors [Fig. 4(b)]. Fromsimulated results, it can be demonstrated that the efficiency ofboth architectures is around 70%. However, the PMOS rectifierpresents a better behavior with an efficiency near 72%. In spiteof this better efficiency, the NMOS rectifier has been selecteddue to its reduced size. The PMOS rectifier is ten times largerthan the NMOS rectifier.

B. Bandgap Circuit

In order to avoid the use of bipolar transistors [35], [36], theproposed bandgap circuit is based on a full MOSFET bandgap


Fig. 5. SCapa initial charging time for different arrays of PZT.

TABLE IARRAY OF PZT FEATURES

Fig. 6. Integrated rectifiers. (a) NMOS. (b) PMOS.

Fig. 7. Schematic of the bandgap circuit.

architecture [33], [34]. A solution using bipolar transistors isnot possible because these transistor types are not available inthe integration technology used to design and manufacture thecircuits. The full MOSFET bandgap architecture [37] is shownin Fig. 7.

Fig. 8. Bandgap temperature response.

It consists of a self-biased peaking current source (CS) [38],[39] with a series resistor. M3 and M4 transistors, and R1resistor, form the peaking reference CS. The transistors workin the subthreshold region. M4 transistor is designed such thatID4 is at its peaking value. The design condition is defined by

ID3R1 = NVT . (2)

Then, it can be demonstrated [2] that the relationship be-tween ID3 and ID4, if the last condition is satisfied, is

ID4 = ID3K4

K3e−1 (3)

where K3 = W3/L3 and K4 = W4/L4.Owing to the current mirror, the condition ID3 = ID4 is

achieved, and then, the relationship between K3 and K4 tosatisfy the last condition is K4/K3 = e. If this ration is definedbetween the transistors, the peaking condition is maintained.


Fig. 9. Examples of bandgap Monte Carlo simulations at 22 ◦C and 65 ◦C.

The currents are proportional to the absolute temperature(PTAT). Then, the voltage drop in R1 is PTAT. The bandgapreference voltage (BG) is defined by

BG =R2

R1NVT + VGS3. (4)

With the right ratio between R2 and R1, it is possible tocompensate the variations with the temperature of VGS3.

Several simulations have been carried out obtaining a nomi-nal value for the reference voltage of 465 mV. The temperaturecoefficient is 100 ppm/◦C, and a PSRR of 42 dB can beexpected for T = 27 ◦C and VSCapa = 1.4 V. The PSRRis 80 dB for VSCapa = 1.8 V, and even greater (∼90 dB)for higher values up to 2.5 V. The power dissipation is11 µW at 1.4 V.

In Fig. 8 are shown some simulations of the reference voltage(BG) against the temperature for two different voltage valuesavailable at the SCapa. The BG starts to work properly at avoltage around 800 mV.

In Fig. 9 are shown two Monte Carlo simulations taking intoaccount process and mismatching variations, with a number of100 samples (Y -axis: samples distribution) for two differentworking temperature conditions: 22 ◦C and 65 ◦C.

C. Control Unit

The architecture of the unit is shown in Fig. 10. The ba-sic elements are two comparators that sense continuously thevoltage at the SCapa and compare it with a reference voltagesupplied by the bandgap. Two resistive networks are used toadapt the level values of VSCapa to the range defined by thebandgap reference voltage (BG, Fig. 10). One comparator isprepared to sense when the voltage at the SCapa reaches V max

out ,and the other one is prepared to detect V min

out . In addition, thecomparators have been designed with a hysteresis of 20 mV

Fig. 10. Control unit.

Fig. 11. Comparator architecture.

in order to define better the voltage-detection points. The archi-tecture and hysteresis of the comparator are shown in Fig. 11.Both comparators share the same bandgap circuit, and also, theyuse the same CS in order to reduce the consumption of this unit.The defined hysteresis band is ±25 mV.

The signals generated by the comparators are used by asimple logical circuitry to generate the control signal for thePMOS transistors and define the charge and discharge phases


Fig. 12. Controls signals generated by the control unit.

of the SiP. The comparators and the digital logic are poweredby the voltage at the SCapa.

As commented upon previously, the comparators are incharge of detecting the maximum and minimum voltages at theSCapa. In this way, several values of V max

out and V minout can be

selected using different values for the resistive networks.Fig. 12 shows the control signals generated by the control

unit. It is also possible to observe how the output of thecomparators increase and decrease its output in function of thesupply voltage provided by the SCapa.

In this implementation, the control module is able to workwith an integrated on-chip resistance network able to detectV max

out = 1.1 V and V minout = 1.0 V or with an external resis-

tance allowing the system to work until a maximum voltageup to 2.3 V.

V. SIMULATED AND EXPERIMENTAL RESULTS

The circuit has been designed in 0.13-µm technology bySTMicroelectronics through CMP–TIMA [40]. The circuit inthe die is shown in Fig. 13(a). The total size is 950 µm ×550 µm. To validate the circuit, the experimental results havebeen compared with the simulated ones, and some of them arepresented in this section. The experimental setup is based onthe use of four Quick Pack PZT QP20W stacked in parallel,working at 7 m/s2 at 80 Hz. It is assumed that the PZTs are notexactly synchronized. The generators are mounted and clampedover an electromagnetic vibration shaker ET-132 Labworks Inc.The shaker is driven with the Pa-119 Labworks Inc. amplifier.An LC2442 laser by Keyence is used for the displacementmeasurements. Two Tektronix oscilloscopes TDS 2014 andTDS 714L are used to visualize the circuit and the Agilent Tech-nology N6705A DC Power Analyzer is used to verify the powerconsumption. The experimental setup is shown in Fig. 13(b).

Fig. 13. (a) Final die implementation and (b) experimental setup.

To verify the system, an estimated power of 1.5 mW hasbeen assumed representing the consumption of the full load(RF plus processing, Fig. 1). Both PMOS switches are activatedat the same time using just one control unit. In addition, it isassumed that the power is consumed in pulses of 10 ms.

The selected value of the capacitor is 47 µF. A SCapa ora long capacitor value is not used to avoid long simulationstime. Using the previous values and taking into account that theenergy transferred form the capacitor to the load is describedby (5), where V max

out and V minout are the defined maximum and

minimum voltage values selected at the capacitor. With thesevalues, the total energy involved in the discharge phase isaround 5 µJ, defining an average output current of 600 µA.For this paper, 1.1 and 1.0 V have been used as maximum andminimum voltages, respectively. These values are obtainedusing the on-chip resistance network in the control module.

From the simulations, several interesting values could beextracted. The start-up time is 230 ms (Fig. 2); the time involvedin the discharge phase is 8 ms; and in the recharge phase is


Fig. 14. Simulated steady-state response of the system and voltage drop across the PMOS switch at 7 m/s2 at 80 Hz.

Fig. 15. Experimental system start-up at 7 m/s2 at 80 Hz.

60 ms (Fig. 14) for a typical case. The voltage drop across thePMOS switch is 11 mV also for a typical case. Several MonteCarlo simulations show that the drop voltage range can varyfrom 25 to 3 mV depending on the technological variation.

Fig. 15 shows the experimental start-up. The time involvedin this phase is 250 ms. The maximum voltage at the capacitoris 1.14 V, whereas Vmin is 1.02 V. The bandgap voltageis 438 mV.

The experimental discharge and recharge times are 10 and55 ms, respectively. The drop voltage across the switch is17 mV. These values are shown in detail in Fig. 16. The wholeconsumption of the electronics is 67 µW. All experimentalvalues are closed to the extracted simulated values, and thesystem is fully validated. The time differences between exper-imental and simulated values are due to the accuracy of thedeveloped spectre-compatible model in terms of the generated

Fig. 16. Experimental steady-state response of the system and voltage dropacross the PMOS switch at 7 m/s2 at 80 Hz.

current and by the consumption of the implemented circuit.A successful test has been carried out using external resistorsnetworks working with Vmax = 1.4 V and Vmin = 1.2 V.

∆E(J) = 0.5CSCapa (V maxout )2 − 0.5CSCapa

(V min

out

)2. (5)

VI. CONCLUSION

This paper has presented a full custom PCC for a self-powered system based on vibration-energy scavenging, whichis a low-cost PZT commercial generator in order to validate theconception of the IC.

The whole architecture has been designed using a low-powerlow-voltage commercial technology. The design of the systemis based on the use of a validated model of the PZT micro power


TABLE IIPCC MAXIMUM RATINGS

generator. The architecture of the proposed PCC is presented,and each circuit block is also described in detail.

The experimental performance of the PCC has been pre-sented and compared with the simulated values controllingbooth PMOS switches with just one control unit. The simula-tions are fully validated by experimental measurements.

These results confirm the correct performance of the adoptedarchitecture integrated in a commercial technology. In Table IIare shown the main parameters of the PCC in terms of thefollowing: the maximum voltage at the input rectifier and at theSCapa and the drop voltage across the PMOS switch.

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Jordi Colomer-Farrarons (S’06) received the B.Sc.degree in electrical engineering from the SalesiansTechnical Engineering School, Barcelona, Spain, in2002, and the M.Sc. degree in electrical engineer-ing from the University of Barcelona, Barcelona,in 2005.

From 2002 to 2005, he was a Hardware De-sign Engineer with Francisco Albero SA, Barcelona.Since 2005, he has been a Fellow Researcher with theSystems for Instrumentation and CommunicationsLaboratory, Electronics Department, University of

Barcelona, where he is working on low-voltage low-power circuits, smartpower, harvesting design circuits, interface circuits for biomedical applications,and microelectronic design.

Pere Miribel-Català (M’08) received the M.Sc.degree in physics and the Ph.D. degree from theUniversity of Barcelona, Barcelona, Spain, in 1994and 2000, respectively.

From 1993 to 1999, he was a Research Fellowwith the Systems for Instrumentation and Communi-cations Laboratory, Electronics Department, Univer-sity of Barcelona, where he worked on high-voltagesmart-power circuits and microelectronic design,and since 2003, has been an Associate Professor(Professor Titular). In 1998, he was a Visiting Re-

search Fellow at the LAAS-CNRS Laboratory, Toulouse, France. He had apostdoctoral position in the design center of ON Semiconductor Inc., Toulouse,France, where he designed power-management integrated dc–dc converters. Hisresearch topics are focused on low-voltage low-power integrated circuits, inter-face and analog processing circuits, particularly for biomedical applications,and smart-power and power-management circuits.

Albert Saiz-Vela (S’06) received the M.Sc. de-gree in electrical engineering from the Universityof Barcelona, Barcelona, Spain, in 2001, where heis currently working toward the Ph.D. degree inelectrical engineering in the Systems for Instrumen-tation and Communications Laboratory, ElectronicsDepartment, Universitat de Barcelona.

From 2001 to 2003, he was a Hardware DesignEngineer with the Research Division, Comelta,with AMR Systems, and with the Plasma TV De-sign Group, Sony BCN Technology Center, Sony,

Barcelona. His main research interests include efficient high-voltage switched-capacitor dc–dc converter design (commonly known as charge pumps), nu-merical simulation of analog circuits, and analog driving circuit design forPZT-based actuators in miniaturized systems (specifically miniaturized robots).

Manel Puig-Vidal (M’94) received the M.Sc. de-gree in physics from the University of Barcelona,Barcelona, Spain, in 1988, and the Ph.D. degree fromPaul Sabatier University, Toulouse, France, in 1993.

From 1989 to 1993, he was a Research Fellowwith the Laboratoire d’Automatique et d’Analysedes Systèmes, Toulouse, where he worked onlatch-up-free smart-power technology for automo-tive applications. In 1993, he was an Assistant Pro-fessor with the University of Barcelona, where heworked in the field of power electronics, and, since

1995, he has been an Associate Professor with the Systems for Instrumentationand Communications Laboratory, Electronics Department, where he teachespower electronics, control systems, and robotics in the electronic and computerscience engineering undergraduate programs. He is currently developing hisresearch in the field of smart-power integrated-circuit design and micro-robotics design based on smart materials for bioengineering applications inthe Bioelectronics and Nanobioscience Division, Nanobioengineering ResearchLaboratory, Barcelona.

Josep Samitier (M’95) received the M.Sc. degreein physics and the Ph.D. degree from the Universityof Barcelona, Barcelona, Spain, in 1982 and 1986,respectively.

From February 1984 to June 1985, he was a Vis-iting Research Fellow at the Philips Electronic Lab-oratory (LEP), Paris, France. From March 2001 toJune 2005, he was the Director of the Electronics De-partment and Deputy Head of the Barcelona SciencePark (PCB). He is currently a Full Professor with theSystems for Instrumentation and Communications

Laboratory, Electronics Department, University of Barcelona, and the Directorof the Nanobioengineering Laboratory that is supported by the Institute of Bio-engineering of Catalonia (IBEC). His current research and developed projectsconcern the development of nanotechnologies for biomedical applications. Hehas published more than 150 scientific papers in these fields. He is the holderof four licensed patents.

Prof. Samitier is the Coordinator of the Spanish Platform on Nanomedi-cine and member of the nanotechnology networks: Nano Spain, Europeannetwork Phantom, and Nano2life European Network of Excellence. In the last15 years, he has participated and coordinated several European projects con-cerning integrated microsystems and, more recently, nanotechnology devices.He was a co-recipient of the Barcelona City Prize from the 2003 BarcelonaCouncil in the area of technology.

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