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Independent Control of Input Current and OutputVoltage for Modular Matrix Converter
Yuma Hayashi, Takaharu TakeshitaNagoya Institute of TechnologyGokiso, Showa, Nagoya, Japan
[email protected], [email protected]
Masakazu Muneshima, Yugo TadanoMeidensha Corporation
515, Kaminakamizo, Higashimakado, Numazu, Shizuoka, [email protected], [email protected]
Abstract—This paper presents independent control of inputcurrent and output voltage for Modular Matrix Converter(MMxC). The MMxC is a multi-level converter without atransformer that converts from the high voltage AC to highvoltage AC with arbitrary amplitude and frequency. The controlmethod is difficult due to the simultaneous control of the inputcurrent and output voltage. The authors propose a novel controlmethod that is divided into two parts of the positive-sequencecircuit for the input current control, and the zero-sequence circuitfor the output voltage control. The effectiveness of the proposedcontrol method has been verified by simulations and experiments.
Index Terms—modular matrix converter, converter control,current control, capacitor voltage balancing.
I. INTRODUCTION
Modular Matrix Converter (MMxC) is a multi-level con-verter without a transformer that converts from the highvoltage AC to high voltage AC with arbitrary amplitude andfrequency. The applications of an MMxC are high voltagelow frequency motor drive, high voltage wind generator anda frequency converter between 50 and 60 Hz.
Fig.1 shows the main circuit configuration of an MMxCthat consists of multiple modules constructed with H-bridgeand a dc capacitor. The circuit configuration of an MMxChas been proposed in a configuration without arm inductor 𝐿𝑓
[1]. The control method by space vectors has been proposedin papers [2], [3]. Since it is difficult to keep the continuity ofthe arm current in the arm constructed several series modules,the circuit configuration installed arm inductors 𝐿𝑓 has beenproposed in the paper [4]. In the configuration with arm induc-tors, the control method has been proposed [5]-[8]. The controlmethod is complicated due to the simultaneous control bothinput current and output voltage. In the configuration using thez-winding three-phase inductors, the literatures [9],[10] haveproposed the independent control of input and output currentand indicated simulation results. However, the control methodis complicated because of fixed and rotational transformationsand Σ Δ modulation.
This paper presents a simple control method based onan independent control between the input current and theoutput voltage on the rotational frame. In the proposed controlmethod, the independent control between input current and theoutput voltage on the sub converter is realized and capacitorvoltage balancing loop is added.
uvv
fL
ui
vi
wi
1cruv
vwv
wuv
ruisui tui
ri
si
tirse
ste treN
sub converter U
sub
conv
erte
r V
sub
conv
erte
r W
cv C
2cruv
3cruv
mv
=
Load
arm ru arm su arm tu
mruv
module 1
R
S
T
U
V
W
module 2
module 3
module
Fig. 1. Main circuit of Modular Matrix Converter
The proposed control theory on the configuration with thearm of three modules connected in series is developed. In theconfiguration of more than three series modules, the theory isdirectly applicable.
The effectiveness of the proposed control method has beenverified by simulations and experiments.
II. CIRCUIT CONFIGURATION AND ANALYTICAL MODEL
A. Circuit Configuration
Fig.1 shows the main circuit configuration of an MMxC.The MMxC consists of nine arms between the input terminals𝑅, 𝑆, 𝑇 and the output terminals 𝑈 , 𝑉 , 𝑊 . Each arm isconstructed by three modules connected in series. The armreactor 𝐿𝑓 for the arm current continuity is installed in eacharm in series. Each module consists of a H-bridge and a dccapacitor. The three arms connected to the output terminal 𝑢
978-1-4799-0224-8/13/$31.00 ©2013 IEEE 888
re
se
te
*mruv
*msuv
*mtuv
rui
sui
tui
ui
uv
fL
(a) Analytical model
re
se
te
*aruv
*asuv
*atuv
ui
fLarui
asui
atui
fL
ui3ui
3ui
0=
(b) Positive-sequence circuit (c) Zero-sequence circuit
*ouv3ui
R
L
R
LR
Luvuv
*ouv
*ouv
Fig. 2. Analytical model
is called as sub converter 𝑈 . Since the module can generatethree output voltage levels of the dc capacitor voltage 𝑣𝑐, 0and −𝑣𝑐, the each arm can generate seven output voltage levelsbetween 3𝑣𝑐 and −3𝑣𝑐.
B. Analytical Model
Fig.2 (a) shows the analytical model of sub converter 𝑈 .The arms are expressed by the voltage sources 𝑣∗𝑚𝑟𝑢, 𝑣∗𝑚𝑠𝑢
and 𝑣∗𝑚𝑡𝑢. The load in phase 𝑢 is a inductive load of 𝑅 − 𝐿series circuit. The input voltages 𝑒𝑟, 𝑒𝑠, 𝑒𝑡 and the outputvoltage references 𝑣∗𝑢, 𝑣
∗𝑣 , 𝑣
∗𝑤 are given using the effective line
voltage 𝐸, the phase angle 𝜃, angular frequency 𝜔 of the inputvoltage, and the effective line voltage 𝑉 ∗
𝐿 , the phase angle 𝜃∗𝐿,angular frequency 𝜔∗
𝐿 of the output voltage reference by thefollowing equations.⎡
⎣ 𝑒𝑟𝑒𝑠𝑒𝑡
⎤⎦=
√2
3𝐸
⎡⎣ cos 𝜃cos(𝜃 − 2𝜋/3)cos(𝜃 + 2𝜋/3)
⎤⎦ (1)
𝜃 = 𝜔𝑡 (2)⎡⎣ 𝑣∗𝑢𝑣∗𝑣𝑣∗𝑤
⎤⎦=
√2
3𝑉 ∗𝐿
⎡⎣ cos 𝜃∗𝐿cos(𝜃∗𝐿 − 2𝜋/3)cos(𝜃∗𝐿 + 2𝜋/3)
⎤⎦ (3)
𝜃∗𝐿 = 𝜔∗𝐿𝑡 (4)
The sub converter 𝑈 in Fig.2 (a) is divided into two circuitsof the positive-sequence circuit for input current control inFig.2 (b), and the zero-sequence circuit for the output voltagecontrol in Fig.2 (c). In the positive-sequence circuit in (b), theload current is zero because the load current is treated as zero-sequence current. In order to obtain the constant dc capacitorvoltage 𝑣𝑐, the input currents 𝑖𝑎𝑟𝑢, 𝑖𝑎𝑠𝑢, 𝑖𝑎𝑡𝑢 are controlledto be the unity power factor by the output voltages 𝑣∗𝑎𝑟𝑢,𝑣∗𝑎𝑠𝑢, 𝑣∗𝑎𝑡𝑢. In the zero-sequence circuit in Fig.2 (c), the eacharm generates the same output voltage 𝑣𝑜𝑢 for controlling the
output voltage 𝑣𝑢. The load current 𝑖𝑢 flows as zero-sequencecurrent. The arm current 𝑖𝑢/3 in each arm flows.
The relations of the arm voltages and currents are obtainedas follows; ⎡
⎣ 𝑣∗𝑚𝑟𝑢
𝑣∗𝑚𝑠𝑢
𝑣∗𝑚𝑡𝑢
⎤⎦=
⎡⎣ 𝑣∗𝑎𝑟𝑢 + 𝑣∗𝑜𝑢𝑣∗𝑎𝑠𝑢 + 𝑣∗𝑜𝑢𝑣∗𝑎𝑡𝑢 + 𝑣∗𝑜𝑢
⎤⎦ (5)
⎡⎣ 𝑖𝑟𝑢𝑖𝑠𝑢𝑖𝑡𝑢
⎤⎦ =
⎡⎣ 𝑖𝑎𝑟𝑢 + 𝑖𝑢/3𝑖𝑎𝑠𝑢 + 𝑖𝑢/3𝑖𝑎𝑡𝑢 + 𝑖𝑢/3
⎤⎦ (6)
III. CONTROL METHOD
Fig.3 shows a proposed control block diagram of subconverter 𝑈 .
A. Input Current Control
The transformation matrix of the synchronous rotating 𝑑−𝑞frame with the input voltage is given by the following equa-tion.
[𝐶𝑑𝑞] =
√2
3
[cos 𝜃 cos(𝜃 − 2𝜋/3) cos(𝜃 + 2𝜋/3)−sin 𝜃 −sin(𝜃 − 2𝜋/3) −sin(𝜃 + 2𝜋/3)
](7)
By using transformation matrix in (7), the input voltage 𝑒𝑟, 𝑒𝑠and 𝑒𝑡 in (1) is transformed to 𝑒𝑑 and 𝑒𝑞 on 𝑑 − 𝑞 frame asfollows; [
𝑒𝑑𝑒𝑞
]=
[𝐸0
](8)
The positive-sequence voltage equation in Fig.2 (b) is obtainedas follows; ⎡
⎣ 𝑒𝑟𝑒𝑠𝑒𝑡
⎤⎦ =
𝑑
𝑑𝑡𝐿𝑓
⎡⎣ 𝑖𝑎𝑟𝑢𝑖𝑎𝑠𝑢𝑖𝑎𝑡𝑢
⎤⎦ +
⎡⎣ 𝑣∗𝑎𝑟𝑢𝑣∗𝑎𝑠𝑢𝑣∗𝑎𝑡𝑢
⎤⎦ (9)
The voltage equation on 𝑑− 𝑞 frame is obtained from (7) and(9) as follows;[
𝑒𝑑𝑒𝑞
]=
𝑑
𝑑𝑡𝐿𝑓
[𝑖𝑎𝑑𝑢𝑖𝑎𝑞𝑢
]+ 𝜔𝐿𝑓
[0 −11 0
][𝑖𝑎𝑑𝑢𝑖𝑎𝑞𝑢
]+
[𝑣∗𝑎𝑑𝑢𝑣∗𝑎𝑞𝑢
](10)
where, 𝑖𝑎𝑑𝑢 and 𝑖𝑎𝑞𝑢 are active and reactive currents, respec-tively.
Substituting (8) into (10) and solving 𝑖𝑎𝑑𝑢 and 𝑖𝑎𝑞𝑢, thetransfer function from the arm voltages 𝑣∗𝑎𝑑𝑢 and 𝑣∗𝑎𝑞𝑢 to theinput currents 𝑖𝑎𝑑𝑢 and 𝑖𝑎𝑞𝑢 are obtained by (11).[
𝑖𝑎𝑑𝑢𝑖𝑎𝑞𝑢
]=
1
𝑠𝐿𝑓
{[𝐸0
]−[𝑣∗𝑎𝑑𝑢𝑣∗𝑎𝑞𝑢
]− 𝜔𝐿𝑓
[0 −11 0
][𝑖𝑎𝑑𝑢𝑖𝑎𝑞𝑢
]}(11)
Fig.3 shows the control block diagram of sub converter 𝑈 .From (11), the block diagram of positive sequence circuit inFig.3 is obtained. The control block of the positive-sequencecircuit in Fig.3 [A] Input Current Control is constructedby the current PI control, 𝑑 − 𝑞 decupling control and thecompensation for the source voltage. The current referencesare given by the average dc voltage control 𝑖∗𝑐 , capacitor
889
−+ PI1
sC+ PI
1
fsL
fLω
+
PI
E
0
fLω fLω
fLω
1
fsL+
−
− −−
−−+
+ + ++
+ ++
E
0
2 / 3
d q−
−+
−+
−+
+
+
[B] Average CapacitanceVoltage Control
[A] Input Current Control
[E] Output Voltage Control Output
1
E
[F] Feed Forward Control
*uv ui
v*cu vcu
aduv*
aquv*
*ouv
mru1~3v *mruv*[D] Capacitor Voltage Balancing
Control among Arms
Positive Sequence Circuit
[C] Voltage Balancing Controlof Series Capacitors
adui
aqui
1/3 /3
cru1~3dV
csu1~3dV
ctu1~3dV
ruk suktuk
/3
++/
3
/3
/3
/3
/3
++/
3
/3
/3
/3/3
msu1~3v *
mtu1~3v *
msuv*
mtuv*
+ adui *
aqui *
ci *
duFi *
1/3
1/3
9 cu
E
vci
Balancing Block−
+0
.cuVdBalancing Circuit
bquCi *
Average CapacitanceVoltage Circut
Fig. 3. Block diagram of sub converter 𝑈
voltage balance control among 𝑅, 𝑆 and 𝑇 phases 𝑖∗𝑏𝑞𝑢𝐶 , andthe feed forward control of the load power 𝑖∗𝑑𝑢𝐹 as follows;[
𝑖∗𝑎𝑑𝑢𝑖∗𝑎𝑞𝑢
]=
[𝑖∗𝑐 + 𝑖∗𝑑𝑢𝐹𝑖∗𝑏𝑞𝑢𝐶
](12)
B. Average Capacitance Voltage Control
The instantaneous power 𝑝𝑐 absorbed to the sub converter𝑈 is obtained from (10) by the following equation.
𝑝𝑐=[ 𝑖𝑎𝑑𝑢 𝑖𝑎𝑞𝑢]
[𝑣∗𝑎𝑑𝑢𝑣∗𝑎𝑞𝑢
]≃ [ 𝑖𝑎𝑑𝑢 𝑖𝑎𝑞𝑢]
[𝑒𝑑𝑒𝑞
]= 𝑖𝑎𝑑𝑢𝐸 (13)
Fig.4 (a) and (b) shows the equivalent circuits for modulecapacitors of sub converter 𝑈 and one capacitor, respectively.Since the instantaneous power 𝑝𝑐 is supplied to the ninecapacitors provided, the instantaneous power 𝑝𝑐 is expressedusing the average one equivalent capacitor voltage 𝑣𝑐𝑢 and theequivalent capacitor current 𝑖𝑐 as follows;
𝑝𝑐=9𝑣𝑐𝑢𝑖𝑐 (14)
From (13) and (14), the equivalent capacitor current 𝑖𝑐 isobtained by (15).
𝑖𝑐 =𝐸
9𝑣𝑐𝑢𝑖𝑎𝑑𝑢 (15)
The relation between the average one capacitor voltage 𝑣𝑐𝑢 andthe equivalent capacitor current 𝑖𝑐 is given by the following
2cruvC
C
C
1cruv
3cruv
cuvC
C
C
C
C
C
1csuv 1ctuv
2ctuv
3ctuv
2csuv
3csuv
arui asui atuici
C
(a) Module Capacitance (b) Average Module Capacitance
Fig. 4. Capacitor voltage of sub converter 𝑈
equation.
𝑣𝑐𝑢 =1
𝐶
∫𝑖𝑐𝑑𝑡 (16)
From (15) and (16), the Average Capacitor Voltage Circuitin Fig.3 is obtained. The capacitor voltage is regulated byPI controller using the error between the capacitor voltagereference 𝑣∗𝑐𝑢 and the detected value 𝑣𝑐𝑢 as shown in Fig.3[B] Average Capacitance Voltage Control.
890
mruv*3
1mruv*
3
1cruv
cru1v cru2v cru3v mru1v*mru3v*
mru2v*000
(a) Series Capacitors Voltage(arm ru)
(b) Series Output Voltage( > 0 )
(c) Series Output Voltage( < 0 )aruiarui
mru1v*mru3v*
mru2v*
Fig. 5. Voltage Balancing Control of Series Capacitors
C. Voltage Balancing Control of Series Capacitors
The average capacitor voltage 𝑣𝑐𝑟𝑢 connected in series atthe arm 𝑟𝑢 is obtained as follows;
𝑣𝑐𝑟𝑢 =1
3(𝑣𝑐𝑟𝑢1 + 𝑣𝑐𝑟𝑢2 + 𝑣𝑐𝑟𝑢3) (17)
The voltage errors 𝑑𝑉𝑐𝑟𝑢1, 𝑑𝑉𝑐𝑟𝑢2 and 𝑑𝑉𝑐𝑟𝑢2 between thecapacitor voltages and the average voltage 𝑣𝑐𝑟𝑢, and therelation among voltage errors are obtained.
⎡⎣ 𝑑𝑉𝑐𝑟𝑢1
𝑑𝑉𝑐𝑟𝑢2
𝑑𝑉𝑐𝑟𝑢3
⎤⎦ =
⎡⎣ 𝑣𝑐𝑟𝑢1 − 𝑣𝑐𝑟𝑢𝑣𝑐𝑟𝑢2 − 𝑣𝑐𝑟𝑢𝑣𝑐𝑟𝑢3 − 𝑣𝑐𝑟𝑢
⎤⎦ (18)
𝑑𝑉𝑐𝑟𝑢1 + 𝑑𝑉𝑐𝑟𝑢2 + 𝑑𝑉𝑐𝑟𝑢3 = 0 (19)
For suppressing the unbalance of capacitor voltage, the ca-pacitor of higher voltage is much charged or little discharged.Function 𝑘𝑟𝑢 based on the sign of the input current 𝑖𝑎𝑟𝑢 isdefined as
𝑘𝑟𝑢 =
{1 : 𝑖𝑎𝑟𝑢 ≥ 0−1 : 𝑖𝑎𝑟𝑢 < 0
(20)
The output voltage references 𝑣∗𝑚𝑟𝑢1, 𝑣∗𝑚𝑟𝑢2 and 𝑣∗𝑚𝑟𝑢3 aredetermined using the output voltage reference 𝑣∗𝑚𝑟𝑢 of arm𝑟𝑢 and the function 𝑘𝑟𝑢 as follows;
⎡⎣ 𝑣∗𝑚𝑟𝑢1
𝑣∗𝑚𝑟𝑢2
𝑣∗𝑚𝑟𝑢3
⎤⎦ =
1
3
⎡⎣ 𝑣∗𝑚𝑟𝑢
𝑣∗𝑚𝑟𝑢
𝑣∗𝑚𝑟𝑢
⎤⎦+ 𝑘𝑟𝑢
⎡⎣ 𝑑𝑉𝑐𝑟𝑢1
𝑑𝑉𝑐𝑟𝑢2
𝑑𝑣𝑐𝑟𝑢3
⎤⎦ (21)
Fig.5(a) shows example of series capacitors voltage unbalanceunder 𝑣𝑐𝑟𝑢3 > 𝑣𝑐𝑟𝑢 > 𝑣𝑐𝑟𝑢1 > 𝑣𝑐𝑟𝑢2 in arm 𝑟𝑢. Fig.5(b)shows the output voltage references of the modules under𝑖𝑎𝑟𝑢 ≥ 0 according to (21). Also , Fig.5(c) is in the case of𝑖𝑎𝑟𝑢 < 0. The control block is [C] Voltage Balancing Controlof Series Capacitors in Fig.3. The series capacitor balancingcontrol does not influence to the arm output voltage becausethe amount of errors is zero in (19). The capacitor voltages inthe arms 𝑠𝑢 and 𝑡𝑢 can be similarly controlled.
D. Capacitor Voltage Balancing Control among Arms
The capacitor voltage errors 𝑑𝑉𝑐𝑟𝑢, 𝑑𝑉𝑐𝑠𝑢, 𝑑𝑉𝑐𝑡𝑢 from theaverage voltage 𝑣𝑐𝑢 in sub converter 𝑈 are given by thefollowing equation.
⎡⎣ 𝑑𝑉𝑐𝑟𝑢
𝑑𝑉𝑐𝑠𝑢
𝑑𝑉𝑐𝑡𝑢
⎤⎦ =
⎡⎣ 𝑣𝑐𝑟𝑢 − 𝑣𝑐𝑢𝑣𝑐𝑠𝑢 − 𝑣𝑐𝑢𝑣𝑐𝑡𝑢 − 𝑣𝑐𝑢
⎤⎦ (22)
The voltage error vector ˙𝑑𝑉𝑐𝑢 on 𝑑− 𝑞 frame is obtained bytransforming (22) using the transformation matrix in (7) asfollows;
˙𝑑𝑉𝑐𝑢 =
[𝑑𝑉𝑐𝑑𝑢
𝑑𝑉𝑐𝑞𝑢
]= [𝐶𝑑𝑞]
⎡⎣ 𝑑𝑉𝑐𝑟𝑢
𝑑𝑉𝑐𝑠𝑢
𝑑𝑉𝑐𝑡𝑢
⎤⎦ (23)
It is controlled by Fig.3 [D] Capacitor Voltage BalancingControl among Arms to zero in the ˙𝑑𝑉𝑐𝑢.
E. Output Voltage Control
The output voltage is controlled by a zero-sequence circuitin Fig.2 (c). The three arms 𝑟𝑢 𝑠𝑢 and 𝑡𝑢 generate the samearm voltage 𝑣∗𝑜𝑢 that is sum of the output voltage reference 𝑣∗𝑢and the voltage drop across the input reactor 𝐿𝑓 .
𝑣∗𝑜𝑢 = 𝑣∗𝑢 + 𝐿𝑓𝑑
𝑑𝑡(𝑖𝑢3) (24)
The zero-sequence circuit is independent from the positive-sequence circuit, the arm voltage references 𝑣∗𝑜𝑢 can be addedto the phase voltage references calculated from the positive-sequence circuit as shown in Fig.3 [E] Output Voltage Control.
F. Feed Forward Control
For suppressing capacitor voltage fluctuations, the feedforward control of the instantaneous load power in Fig.3 [F]Feed Forward Control are derived. The instantaneous outputpower 𝑝𝑢 in phase 𝑈 is obtained from the output voltagereference 𝑣∗𝑢 and the output current 𝑖𝑢 by (25).
𝑝𝑢 = 𝑣∗𝑢𝑖𝑢 (25)
In order to supply the input power equal to the load power, theinput active current reference 𝑖∗𝑑𝑢𝐹 for feed forward in phase𝑈 is given by (26).
𝑖∗𝑑𝑢𝐹 =𝑣∗𝑢𝑖𝑢𝐸
(26)
IV. SIMULATION RESULTS
A. Simulation conditions
Fig.6 shows simulation circuit. Table I shows the simulationconditions. The source voltage is 200 V, 60 Hz for the samecondition of experiments. The Output voltage reference forapplying to 1.5 kVA inductive load is 120V, 10Hz. The averagecapacitor voltage reference 𝑣∗𝑐 of 100 V is given.
891
uvv
fL
ui
vi
wi
1cruv
vwv
wuv
ruisui tui
ri
si
tirse
ste treN
sub converter U
sub
conv
erte
r V
sub
conv
erte
r W
cvC
2cruv
3cruv
mv
=
arm ru arm su arm tu
mruv
RL
U
V
W
R
S
T
module 1
module 2
module 3
module
Fig. 6. Simulation circuit for MMxC
TABLE ISIMULATION CONDITIONS
Source voltage 𝐸, 𝜔 200 V, 2𝜋×60 rad/sArm reactor 𝐿𝑓 4 mHModule capacitor 𝐶 1000 𝜇FLoad 𝑅, 𝐿 9.8 Ω, 20 mHOutput voltage reference 𝑉 ∗
𝐿 , 𝜔∗𝐿 120 V, 2𝜋×10 rad/s
Capacitor voltage reference 𝑣∗𝑐 100 VCarrier frequency 𝑓𝑐(= 1/2𝑇𝑠) 5 kHz
B. Simulation Waveforms
Fig.7 shows the voltage and current waveforms in simula-tion results. The colors of red, blue and green on the three-phase waveforms indicate the phases 𝑅, 𝑆 and 𝑇 , respectively.The sinusoidal source currents 𝑖𝑟 of unity input power factorare obtained. The output voltage 𝑣𝑢𝑣 is the sinusoidal wave-form with multi-level voltage. The sinusoidal output current 𝑖𝑢are obtained. The input currents 𝑖𝑟𝑢, 𝑖𝑠𝑢 and 𝑖𝑡𝑢 consist of onethird of the output current 𝑖𝑢 and the sinusoidal source currentof 60 Hz. The capacitor voltages keep around 100 V withthe fluctuation voltage of 8 V. The voltages waveforms 𝑣𝑐𝑟𝑢1,𝑣𝑐𝑟𝑢2 and 𝑣𝑐𝑟𝑢3 of series capacitors are overlapped becausethe small unbalance voltages.
V. EXPERIMENTAL RESULTS
A. Experimental Conditions
Fig.8 shows the experimental circuit. Table II shows theexperimental conditions. The arm is constructed by one mod-ule.The source voltage is 200 V, 60 Hz for the same condition
Sou
rce
line
volt
age
Sour
ce c
urre
ntA
rm c
urre
ntSu
b co
nver
ter
UC
apac
itor
vol
tage
Sub
conv
erte
r V
Cap
acito
r vo
ltage
Sub
con
vert
er W
Cap
acito
r vo
ltag
e
20ms Time
Out
put l
ine
volta
geO
utpu
t cur
rent
rse[V
]ri
[A]
ruisui
tui,
,[A
]uvv
[V]
ui[A
]
-10
-5
0
5
10
-400
-200
0
200
400
90
95
100
105
110
90
95
100
105
110
90
95
100
105
110
-10
-5
0
5
10
-10
-5
0
5
10
-400
-200
0
200
400
crv1
~3v
csv1
~3v
ctv1
~3
v,
,[V
]cr
u1~3
vcs
u1~3
vct
u1~
3v
,,
[V]
crw
1~3
vcs
w1~
3v
ctw
1~3
v,
,[V
]
Fig. 7. Simulation results
of simulations. The Output voltage reference for applying to1.5 kVA inductive load is 120V, 10Hz. The average capacitorvoltage reference 𝑣∗𝑐 of 300 V is given.
B. Experimental waveforms
Fig.9 shows the experimental waveforms. The source cur-rents 𝑖𝑟 of unity input power factor with distortion are ob-tained. The output voltage 𝑣𝑢𝑣 is the sinusoidal waveformwith multi-level voltage. The sinusoidal output current 𝑖𝑢 areobtained. The input currents 𝑖𝑟𝑢, 𝑖𝑠𝑢 and 𝑖𝑡𝑢 consist of onethird of the output current 𝑖𝑢 and the sinusoidal source currentof 60 Hz. The capacitor voltages keep around 300 V with thefluctuation voltage of 20 V.
892
uvv
fL
ui
vi
wi
1cruv
vwv
wuv
ruisui tui
ri
si
tirse
ste treN
sub converter U
sub
conv
erte
r V
sub
conv
erte
r W
cvC mv
=
arm ru arm su arm tu
mruv
RL
R
S
T
U
V
W
module 1
module
Fig. 8. Experiment circuit for MMxC
TABLE IIEXPERIMENT CONDITIONS
Source voltage 𝐸, 𝜔 200 V, 2𝜋×60 rad/sInput reactor 𝐿𝑓 4 mHModule capacitor 𝐶 1500 𝜇FLoad 𝑅, 𝐿 9.8 Ω, 20 mHOutput voltage reference 𝑉 ∗
𝐿 , 𝜔∗𝐿 120 V, 2𝜋×10 rad/s
Capacitor voltage reference 𝑣∗𝑐 300 VCarrier frequency 𝑓𝑐(= 1/2𝑇𝑠) 5 kHz
VI. CONCLUSIONS
This paper presents a simple control method for a modularmatrix converter based on an independent control between theinput current and the output voltage on the rotational frame.In the proposed control method, the independently control ofinput current and the output voltage on the sub converter isrealized, and capacitor voltage balancing loop is added.
In the configuration with the arm of three modules con-nected in series, the stable operation waveforms have beenobtained by simulations. In the configuration with the arm ofone module, the experimental results have been obtained andbasic operations have been verified. Therefore the effectivenessof the proposed control method has been verified.
REFERENCES
[1] R. Erickson and O. Al-Naseem, ”A new family of matrix converters,”in Industrial Electronics Society, 2001. IECON’01. The 27th AnnualConference of the IEEE, vol. 2, 2001, pp. 1515 - 1520 vol.2.
[2] S. Angkititrakul and R. Erickson, ”Control and implementation of a newmodular matrix converter,” in Applied Power Electronics Conference andExposition, 2004. APEC’04. Nineteenth Annual IEEE, vol. 2, 2004, pp.813 - 819 vol.2.
[3] S. Angkititrakul and R. W. Erickson, ”Capacitor voltage balancing controlfor a modular matrix converter,” inConf. Rec. IEEE-APEC 2006.
Sou
rce
line
volt
age
Sour
ce c
urre
ntA
rm c
urre
ntSu
b co
nver
ter
UC
apac
itor
vol
tage
Sub
conv
erte
r V
Cap
acito
r vo
ltage
Sub
con
vert
er W
Cap
acito
r vo
ltag
e
20ms Time
Out
put l
ine
volta
geO
utpu
t cur
rent
cru
vcs
uv
ctu
v,
,[V
]cr
vv
csv
vct
vv
,,
[V]
crw
vcs
wv
ctw
v,
,[V
]rse
[V]
ri[A
]rui
suitui
,,
[A]
uvv[V
]ui
[A]
-10
-5
0
5
10
260
280
300
320
340
260
280
300
320
340
260
280
300
320
340
-10
-5
0
5
10
-10
-5
0
5
10
-400
-200
0
200
400
-600
-300
0
300
600
Fig. 9. Experiment results
[4] C. Oates, ”A methodology for developing chainlink converters,” in PowerElectronics and Applications, 2009. EPE’09. 13th European Conferenceon, sept. 2009, pp. 1 - 10.
[5] C. Oates and G. Mondal, ”Dc circulating current for capacitor voltagebalancing in modular multilevel matrix converter,” in EPE 2011 Birm-ingham, aug. 2011.
[6] D. C. Ludois, J. K. Reed, and G. Venkataramanan, ”Hierarchical controlof bridge-of-bridge multilevel power converters,” in Industrial Electron-ics, IEEE Transactions on, vol. 57, no. 8, pp. 2679 - 2690, aug. 2010.
[7] A. Korn, M. Winkelnkemper, P. Steimer, and J. Kolar, ”Direct modularmulti-level converter for gearless low-speed drives,” in EPE 2011 Birm-ingham, aug. 2011.
[8] W. Kawamura and H. Akagi ”Control of the modular multilevel cascadeconverter based on triple-star bridge-cells (MMCC-TSBC) for motordrives,” in ECCE 2012, sept. 2012, pp.3506 - 3513
[9] F. Kammerer, J. Kolb, and M. Braun, ”A novel cascaded vector controlscheme for the modular multilevel matrix converter,” in IECON 2011Melbourne, Nov. 2011.
[10] F. Kammerer, J. Kolb, and M. Braun, ”Fully decoupled current controland energy balancing of the Modular Multilevel Matrix Converter,” inEPE/PEMC 2012, sept. 2012.
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