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Proc. IEEE 2001 Int. Conference on Microelectronic Test Structures, Vol 14, March 2001. 195 7.4 Evaluation of the Issues Involved with Test Structures for the Measurement of Sheet Resistance and Linewidth of Copper Damascene Interconnect S. Smith, A.J. Walton, A.W.S. Ross, G.K.H. Bodammer and J.T.M. Stevenson Department of Electronics and Electrical Engineering Scottish Microelectronics Centre Kings Buildings, The University of Edinburgh Edinburgh, EH9 3JE UK ABSTRACT The effect of the barrier layer and dishing in copper inter- connect causes extra difficulties in measuring sheet resis- tance and linewidth when compared with equivalent mea- surements on non-damascene processed tracks. This paper examines these issues and, for the first time, quantifies the effects of diffusion barrier layers and CMP dishing on the extraction of R, from Greek cross type structures and the effect this has on linewidth measurement. INTRODUCTION Advanced interconnect technologies are an essential part of the roadmap for improving the performance of integrated circuits. As a result copper is set to rapidly replace alu- minium because it has a lower resistivity which, when combined with the introduction of low-k dielectrics, reduces RC time delays and power consumption [l]. A damascene CMP process is typically used for fabricating copper interconnect, largely as a result of the difficulty associated with dry etching copper. Barrier layers are also required to prevent copper diffusing elsewhere which adds to the complexity of processing as well as complicating the measurement of sheet resistance. Resistive electrical test structures used to measure the linewidth of conducting tracks assume a homogeneous layer of conducting material. This is not the case for cop- per damascene interconnect because of the requirement to use barrier layers. Figure 1 shows a cross-section through two copper tracks with barrier layers and it can be deduced that as the width of the copper track decreases the percent- age contribution of the barrier layer to the sheet resistance increases. For example, a tantalum diffusion barrier has a higher sheet resistance than copper (pcu = 1.678pR-cm, pTa = 13pR-cm) and a simple calculation based on the cross-sectional area can be used to calculate the resistance of a track [2]. The resistance of damascene copper tracks is also affected by the polishing process, typically resulting in dishing which causes the track to be thinner in the cen- tre. The degree of dishing is a function of the track width, increasing in magnitude for wider tracks as shown in in fig- ure 2. The resulting reduction in the cross sectional area increases the resistance [3, 41. To electrically measure the linewidth of a conducting track the effective sheet resis- tance of the material must first be determined. This param- I Oxide Figure 1. Cross-section of copper damascene tracks of different widths. As the width of the copper line decreases the relative contribution of the sidewall barrier layers to the track resistance becomes more important. DKg Oxide Figure 2. Schematic cross section through two metal damascene lines showing increased dishing with larger linewidths. eter is normally measured using either a Greek or a box cross because no dimensional information is required (see figure 3) in the extraction of R, [5, 61. This insensitivity to CD variation has made these types of structures the indus- try standard for measuring sheet resistance of conducting layers. I Figure 3. Greek cross and box cross sheet resistor structures used for extracting R,. However, both of these test structures will be affected by dishing and the diffusion barrier layer. Any error in the value of R, will directly translate into an error in the value of linewidth extracted. Reference [2] discusses many of the issues associated with characterising copper intercon- nect and the purpose of this study is to, for the first time, quantify some of these effects. 0-7803-651 1-9/01/$10.0002001 IEEE 01CH37 153

[IEEE ICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures - Kobe, Japan (19-22 March 2001)] ICMTS 2001. Proceedings of the 2001 International

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Page 1: [IEEE ICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures - Kobe, Japan (19-22 March 2001)] ICMTS 2001. Proceedings of the 2001 International

Proc. IEEE 2001 Int. Conference on Microelectronic Test Structures, Vol 14, March 2001. 195

7.4 Evaluation of the Issues Involved with Test Structures for the Measurement of Sheet

Resistance and Linewidth of Copper Damascene Interconnect

S. Smith, A.J. Walton, A.W.S. Ross, G.K.H. Bodammer and J.T.M. Stevenson

Department of Electronics and Electrical Engineering Scottish Microelectronics Centre

Kings Buildings, The University of Edinburgh Edinburgh, EH9 3JE UK

ABSTRACT

The effect of the barrier layer and dishing in copper inter- connect causes extra difficulties in measuring sheet resis- tance and linewidth when compared with equivalent mea- surements on non-damascene processed tracks. This paper examines these issues and, for the first time, quantifies the effects of diffusion barrier layers and CMP dishing on the extraction of R, from Greek cross type structures and the effect this has on linewidth measurement.

INTRODUCTION

Advanced interconnect technologies are an essential part of the roadmap for improving the performance of integrated circuits. As a result copper is set to rapidly replace alu- minium because it has a lower resistivity which, when combined with the introduction of low-k dielectrics, reduces RC time delays and power consumption [l]. A damascene CMP process is typically used for fabricating copper interconnect, largely as a result of the difficulty associated with dry etching copper. Barrier layers are also required to prevent copper diffusing elsewhere which adds to the complexity of processing as well as complicating the measurement of sheet resistance.

Resistive electrical test structures used to measure the linewidth of conducting tracks assume a homogeneous layer of conducting material. This is not the case for cop- per damascene interconnect because of the requirement to use barrier layers. Figure 1 shows a cross-section through two copper tracks with barrier layers and it can be deduced that as the width of the copper track decreases the percent- age contribution of the barrier layer to the sheet resistance increases. For example, a tantalum diffusion barrier has a higher sheet resistance than copper (pcu = 1.678pR-cm, pTa = 13pR-cm) and a simple calculation based on the cross-sectional area can be used to calculate the resistance of a track [2]. The resistance of damascene copper tracks is also affected by the polishing process, typically resulting in dishing which causes the track to be thinner in the cen- tre. The degree of dishing is a function of the track width, increasing in magnitude for wider tracks as shown in in fig- ure 2. The resulting reduction in the cross sectional area increases the resistance [3, 41. To electrically measure the linewidth of a conducting track the effective sheet resis- tance of the material must first be determined. This param-

I Oxide

Figure 1. Cross-section of copper damascene tracks of different widths. As the width of the copper line decreases the relative contribution of the

sidewall barrier layers to the track resistance becomes more important.

D K g

Oxide

Figure 2. Schematic cross section through two metal damascene lines showing increased dishing with larger linewidths.

eter is normally measured using either a Greek or a box cross because no dimensional information is required (see figure 3) in the extraction of R, [5, 61. This insensitivity to CD variation has made these types of structures the indus- try standard for measuring sheet resistance of conducting layers.

I

Figure 3. Greek cross and box cross sheet resistor structures used for extracting R,.

However, both of these test structures will be affected by dishing and the diffusion barrier layer. Any error in the value of R, will directly translate into an error in the value of linewidth extracted. Reference [2] discusses many of the issues associated with characterising copper intercon- nect and the purpose of this study is to, for the first time, quantify some of these effects.

0-7803-651 1-9/01/$10.0002001 IEEE 01CH37 153

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196

BARRIER LAYER EFFECTS

The first question that needs to be answered is the exact effect that the barrier layer has on the extracted value of R,. The structure of the Greek cross used to perform this task is shown in figure 4. In this case the thickness of the tanta- lum barrier layer on the bottom and sidewalls of the trench was set to 50nm. A 2D simulator (Raphael) was used for the following simulations with the sheet resistance of the central region of the cross being equivalent to 500nm of copper over a 50nm thick barrier metal layer. The resis- tance of each sidewall barrier was set by assuming a layer of tantalum 550nm by the barrier layer thickness.

Wbd00nm

+Wb=SOnm

0.03251 I I I I , , I I I 7 0 0.5 1 1.5 2 2.5 3 3 5 4 4.5 5

Linewidth (um)

Figure 5 . Extracted sheet resistance versus copper linewidth fo! simulated Greek cross structures with barrier layers.

barrier layer. As would have been expected from the Greek cross results, figure 5 also shows that the tapwidth of the box cross structure does not affect the extraction of the copper over barrier layer sheet resistance.

Layer m

mL 0 0 2.0 4 0 6.0 8.0 10 0

Distance (Microns)

Figure 4. Greek cross test structure for simulation of barrier layer effects.

Simulations were performed for a range of linewidths with sidewall barrier layer thicknesses between 25 and 100nm. A 10 by 1 O p m box cross structure with a 50nm thick bar- rier layer was also simulated for a range of arm widths. The results of these simulations are presented in figure 5. For these simulations the sheet resistance of the copper over the thin barrier metal (Rsccu)) was set to 33. 132mWn and, as can be observed in figure 5, this is the sheet resis- tance extracted by the Greek crosses with large linewidths. For example, with a sidewall barrier layer thickness (wb) of lOOnm the extracted sheet resistance is within 1.3% of R,(cu) for linewidths greater than 0 . 5 ~ . It can also be seen that as the barrier thickness is reduced the error in the extracted value of Rs(Cu) associated with narrower tracks reduces e.g. with Wb = 25nm, R, is always within 0.5% of R,(cu). If an error in the measurement of sheet resistance of more than 1 % is considered to be significant then further simulations must be made. From these it has been deter- mined that for a copper track with a tantalum barrier layer the error in the sheet resistance will be less than 1% pro- vided that Wcu > 5. 6WT,. Taking into account the ratio of resistivities of the copper and barrier layer a more general expression can be developed:

Rcu RB

wcu>43.4-w,

where R B and WB are the thickness and resistivity of the

The above results indicate that the majority of the current flows in the centre of the cross (i.e. copper) where the resistance is lowest. In the 2D simulations the resistivity specified in this region was the parallel combination of the the copper and the underlying barrier layer. This was the value of sheet resistance extracted but confirmation is required that the 2D approximation used is valid. Hence, simulations were also repeated in 3-dimensions using Raphael confirming that, for the conditions specified in equation (l), the extracted R, is in fact that of the Cu in parallel with the underlying barrier layer. This is a useful observation which indicates that Greek cross structures can be used to measure the sheet resistance of copper and an underlying barrier layer.

DISHING EFFECTS

Equation (1) gives the conditions that are required to extract the copper over barrier layer sheet resistance but this assumes a track with a rectangular cross section. Unfortunately, the CMP process also affects the sheet resistance of conducting tracks through dishing and it is important to quantify the effect of this on the extraction of R,. The dishing model used in this study is a function of the polishing time and parameters have been determined for two endpoint conditions [ 3 ] . These are for the nominal polishing time:

(2) a = 0. 32e4.008W + 0.65

a = 0. 68e0.00SW + 0.22

and for a 25% overpolish:

(3)

In these equations a is the the ratio of the metal thickness

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197

at the centre of the dished line to the ideal thickness and w is the linewidth as shown in figure 6.

0 0 3 9 1

Figure 6. Cross section through a dished damascene track. 0 034 4

The following simulations approximate dishing as a stepped conducting track rather than a smooth curve, as illustrated in figure 7.

W l l O

Figure 7. Cross section through a dished damascene track showing the stepped approximation of dishing used for the simulations.

This model was first simulated in two dimensions to deter- mine the effect of dishing, for a 25% overpolish, on the extracted values of sheet resistance. The change in the metal thickness due to dishing is modelled in two dimen- sions as a change in the sheet resistance of the conducting area as is shown in Figure 8. The simulation results are presented in figure 9.

37.12 m W 0

38.49 mR, 0

0.033 1 I I I I I 2 3 4 5

Llnewldth (um)

Figure 9. Sheet resistance against linewidth for 2D simulations of copper damascene Greek crosses with 25% overpolish. The values of R, for the dished line were calculated using the equations for the cross sectional area

given in figure 6.

taps because the dishing of the box is constant. The differ- ence between the sheet resistance extracted from the box cross structure and the equivalent sheet resistance of the dished lines is greater (4% - 5%) simply because the larger dimensions of the box cross leads to more severe dishing.

However, this 2D approximation does not necessarily reflect the actual current flow in the test structures and so 3D simulations were also performed. The dishing model was changed slightly for the 3D simulations in order to achieve a more accurate model of dishing in the centre of the Greek cross. Because the amount of dishing is depen- dent on the linewidth it would be expected that the depth of copper removed in the centre would be more than in the arms of the cross. Using the model described above a new depth of dishing was calculated for the centre of the cross. The value of linewidth (w) used in equations ( 2 ) and (3) is the diagonal width of the cross measured between opposite internal corners. In order to achieve the correct profile across the centre of the cross in the simulated structure, cylindrical sections of the conducting track were removed. This is illustrated in Figure 10.

Figure 8. Plan view of a Greek cross with a linewidth of 5 pm showing how the dishing model is simulated in 2D. The sheet resistance of each

part of the cross depends on the amount of dishing in that area.

For the 25% overpolish it can be observed that there is an offset of about 3% between the sheet resistance extracted from the Greek cross structures and that derived from the cross section of the line. The values of R, extracted from the box cross do not increase with the width of the voltage

Figure 10. Plan view of a Greek cross with a linewidth of 5 p showing the three dimensional dishing model.

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0034-

0 033

For these simulations both the nominal and the 25% polish endpoint models were used and the results are presented in figure 11.

...................................................................................... B I I I I

X 5.000 w / d i v 2 100.000 n d d i v

Figure 12. 20 x 20 p n AFh4 scan of a copper damascene Greek cross test structure. The arms of the cross are 1 p n wide.

It is not possible to tell from figure 12 if there is more dish- ing in the centre of the cross but figure 13 shows AFM pro- files taken across the centre and arms of the same cross. The CMP process employed is a two stage process with the first polish stopping on the tantalum barrier layer. The

sample tested here was stopped at that stage of the process to eliminate the effects of dielectric erosion which could swamp any dishing effects from the measurement. It can be seen that the results of the two profiles taken across the centre of the cross agree quite well. The average depth of the copper dishing in the centre of the cross is greater than the depth measured in the arm of the cross by between 2 and 3 nm. This difference in depth is similar to those mod- elled for the 3D simulations described above.

LINEWIDTH MEASUREMENTS

Any error in the measurement of the sheet resistance is directly translated into an error in the linewidth extracted. The previous discussions have indicated that this can come from either the barrier layer or from dishing.

Barrier layers

Provided equation (1) is satisfied and there is no dishing then the resistance of the measured layer is the parallel combination of the copper and the underlying barrier layer. However, the parameters associated with the contribution of the sidewall barriers to resistance are also required and reference [2] gives a methodology to obtain them. It should be noted that barrier sidewall thickness will be less than the thickness on a flat surface for narrow lines (Wcu < 4WB) due to a shadowing effect during deposition [2]. The narrower tracks will also have a higher resistance due to a reduction in copper grain size [7]. For the pur- poses of the simulations both copper sheet resistance and sidewall barrier thickness have been assumed to be con- stant. The resistances of 100 pm long copper damascene lines have been calculated with the same parameters as those used in the Greek cross simulations. The effects of the sidewall barrier layers have been subtracted and Rline used to calculate the linewidth using the sheet resistances obtained from simulations.

L . R , Wlim = - (4)

Rlitle

The percentage errors between the extracted linewidths and the "drawn" linewidths were calculated and are presented in figure 14. It can be observed that as the barrier width increases, the errors at low values of drawn linewidth also increase. It should be noted that the box cross is insensi- tive to sidewall barrier layer thickness and, assuming there is no dishing, should be used in preference to a Greek cross.

Dishing

Dishing makes the extraction of sheet resistance using a Van der Pauw measurement problematic because the layer thickness is no longer constant. Figure 15 shows the linewidth error caused by dishing for the 3D Greek cross and 2D box cross structure. The linewidth errors for the Greek crosses do not vary with tap width staying at about

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199

nM -

J 1-

0 v11 I I I

' 0 5 . 0 10.0 15.0 LJM

-a

Figure 13. On the left is a set of three AFM surface profiles from a CMP copper structure. On the right is a 256 x 256 AFM scan showing where the profiles have been taken from.

i b x c m Wb-5onm) OWk100nm XWtd5nm +Wk5onm U Wk75"nl

- 1 - 7 1 I I I I I I I I

Drawn Llnewldth (um) 0 0 5 1 1 5 2 2 5 3 3 5 4 4 5 5

Figure 14. Linewidth error versus designed linewidth for the simulations of barrier layer effects.

3% for the 25% overpolish condition and about 0.7% for the nominal polish. The box cross results are different because the amount of dishing in the box does not change with the tapwidth. This means the error will depend upon the drawn width of the the line. These results indicate that, provided equation (1) is not violated and instrumentation and Joule heating are not issues [2] then sheet resistance measurements should be made on Greek cross structures with track widths the same as those used on the linewidth structures being tested.

CONCLUSIONS AND FURTHER WORK

This work has quantified the effect of barrier layers and dishing on the measurement of the sheet resistance and linewidth of copper interconnect. A Greek cross structure can be used to measure the sheet resistance of the copper

?dl ; EA

; ..................................................... *..-.-----..--- ...------..-.--.--.............----

a 5 2

Figure 15. Linewidth error versus designed linewidth for the simulations of CMP dishing.

and underlying barrier with an error less than 1% provided

W,, > 43.4 - WB. The effect of dishing on the extrac-

tion of sheet resistance from Greek crosses has been evalu- ated and for a nominal dishing has been shown to con- tribute an error of less than 1%. For a 25% overpolish this rises to about 3%. Because of its larger dimensions the dishing associated with a box cross is considerably enhanced and hence a larger error in sheet resistance results. All of these errors are directly transferred into electrical based linewidth measurements.

RCU

RB

Measurements of a copper CMP structure using an AFM appear to validate the 3D model of dishing in a Greek cross. Future work will involve fabricating more test struc- tures with a range of different linewidths. These will be tested both electrically and with the AFM to further con- firm the simulation results presented in this paper.

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ACKNOWLEDGEMENTS

The authors would like to acknowledge the financial sup- port of EPSRC (GRL81000 and GRM41070) and Avant!.

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W. Versnel, “Analysis of the Greek cross, a Van der Pauw struc- ture with finite contacts”, Solid State Electronics, vol. 22, no. 11, pp. 91 1-914, Pergamon Press Ltd, Great Britain, 1979.

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X.W. Lin and D. Pramanik, “Future Interconnect Technologies and Copper Metallization”, Solid State Technology, vol. 41, no. 10, pp. 63-79, October 1998.