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IEEE Circuits and Systems Society Analog Signal Processing Technical Committee
(ASPTC) Annual Activity Report 2016 – 2017
A total of 33 ASPTC members contributed to this annual report. The list is attached as Appendix 1. This report is compiled by George Yuan, Chair-Elect, ASPTC.
1. Introduction The ASPTC is one of the largest technical committees in the IEEE CAS Society. More information about ASPTC can be found at http://ieee-as.org/community/technical-committees/asptc. This report aims to summarize some highlighted activities for members in the ASPTC in the past year.
2. IEEE ISCAS 2017, Baltimore, USA In ISCAS 2017, the ASPTC is the most active track. A total 279 papers were submitted, ~25% more compared to last year (224) and 25% more compared to the second most active rack (VLSI) in ISCAS 2017. Of the 279 papers, 139 were accepted (an acceptance rate of 49.1%) – 83 and 54 were accepted as lectures and as posters respectively. The Track co-Chairs were Joseph Chang, George Yuan Nathan Neihart, Shahriar Mirabassi. 46 TC members served as Review Committee Members. The RCM list is tabulated in Table I in Appendix 2. A total 1218 reviewers were assigned (average of 4.4 reviewers/paper) and total 1098 reviews (average 3.9 reviews/paper) were received. The review statistics are tabulated in Table II. The accepted papers are arranged in 21 lecture sessions and 3 poster sessions. The sessions will be chaired by 17 ASPTC members; the details are tabulated in Table III. This summary is compiled by George Yuan.
3. Invited Talks There were 101 invited talks as listed in Appendix 3.
4. Conference Organization Members were actively involved in 42 conference organizations, and these are listed in Appendix 4.
5. Editorial Boards Members served as editors in 42 journals, and these are listed Appendix 5.
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6. Other IEEE Services and Professional Activities Members were also actively involved in other 60 activities in IEEE, these are listed in Appendix 6.
7. Awards, Honors, Patents
Members had received 48 items of awards and patent allowances, these are listed in Appendix 7.
8. Selected Journal Publications
Members reported 76 journal papers. This selected list of papers and their significance are listed in Appendix 8.
9. Selected Conference Publications Members reported 67 conference papers. This selected list of papers and their significance are listed in Appendix 9.
10. Books and Book Chapters. Members have contributed to 13 books, these are listed in Appendix 10.
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Appendix 1 : List of Contributors
1. Maysam Ghovanloo 2. Filippo Neri 3. Igor Filanovsky 4. Tong Ge 5. Yichuang Sun 6. Gaetano Palumbo 7. Jose M. de la Rosa 8. Tertulien Ndjountche 9. Ayman Fayed 10. Luis Hernandez 11. Nathan Neihart 12. Paul P. Sotiriadis 13. Shahriar Mirabbasi 14. Salvatore Pennisi 15. Joseph S Chang 16. Luis Oliveira 17. Roberto Gómez-García 18. Wouter A. Serdijn 19. Robert Bogdan Staszewski 20. George Yuan 21. D. Brian Ma 22. Jose Silva-Martinez 23. Thierry Taris 24. Gordon Roberts 25. Pak Kwong Chan 26. Laleh Najafizadeh 27. Yannis Syllaios 28. Andreas Demosthenous 29. Lei Zhang 30. Gert Cauwenberghs 31. Deukhyoun Heo 32. Mohamad Sawan 33. Jorge Fernandes
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Appendix 2 : Summary of ISCAS2017 Review
Table I: RCM list
Number Name Email 1 Shahriar Mirabbasi [email protected]
2 Roberto Gomez-Garcia [email protected]
3 Thierry Taris [email protected]
4 Ayman Fayed [email protected]
5 Robert Sobot [email protected]
6 Filippo Neri [email protected]
7 Mohamad Sawan [email protected]
8 Pak Kwong Chan [email protected]
9 Sameer Sonkusale [email protected]
10 Igor Filanovsky [email protected]
11 Dag T. Wisland [email protected]
12 Paul Sotiriadis [email protected]
13 Julius Georgiou [email protected]
14 Lei Zhang [email protected]
15 Jose M. de la Rosa [email protected]
16 Apisak Worapishet [email protected]
17 Ma, Dongsheng Brian [email protected]
18 Gert Cauwenberghs [email protected]
19 Shanthi Pavan [email protected]
20 Laleh [email protected]
21 Joao Goes [email protected]
22 Wiliam Eisenstadt [email protected]
23 Luis Hernandez [email protected]
24 Gabriele Manganaro [email protected]
25 Luis Bica Oliveira [email protected]
26 Ge Tong [email protected]
27 Manu Rastogi [email protected]
28 Joseph Chang [email protected]
29 Jorge Fernandes [email protected]
30 Gaetano Palumbo [email protected]
31 Jerald Yoo [email protected]
32 Jeremy Holleman [email protected]
33 Rob Fox [email protected]
34 Jin Liu [email protected]
35 Shu-Chuan Huang [email protected]
36 R. Bogdan Staszewski [email protected]
37 Yi Xiang [email protected]
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38 Shu Wei [email protected]
39 Zhiming Chen [email protected]
40 Guo Linfei [email protected]
41 Salvatore Pennisi [email protected]
42 Meng Fanyi [email protected]
43 Valencia Joyner Koomson [email protected]
44 Nathan Neihart [email protected]
45 Deukhyoun Heo [email protected]
46 George Yuan [email protected]
Table II: Review Statistics of Sub-tracks
Sub-track
ID Name Submission Accepted
Lecture Accepted
Poster Acceptance
Rate
1.1 Amplifiers 17 2 7 52.9% 1.2 Analog Filtering 11 3 3 54.5% 1.3 RF Circuits 36 14 3 47.2% 1.4 Data Converters 73 22 11 45.2% 1.5 Interface Circuits 19 7 5 63.2% 1.6 Regulators & References 26 10 5 57.7% 1.7 Analog Signal Processing 15 4 2 40.0% 1.8 Testing and Verification 9 2 3 55.6% 1.9 Design Tools 9 3 2 55.6%
1.11 Oscillators and Phase-locked loops 38 11 8 50.0%
1.12 Other Areas in Analog and Mixed Signal Circuits and Systems 26 5 5 38.5%
279 83 54 49.1%
Table III: List of the Sessions
Lecture Sessions
Number Session ID Session Name Co-chair Co-chair Paper
Number
1 A1L-F Interface Circuits Shahriar Mirabbasi
Degang Chen 5
2 A1L-K ADC Circuit Techniques Jose Silva-Martinez
George Yuan 5
3 A2L-E Oscillators, Phase-locked Loops & Others I Jorge Fernandes
Shahriar Mirabbasi 5
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4 A2L-F Temperature Compensated Circuits Degang Chen
Shahriar Mirabbasi 5
5 A2L-K SAR ADCs Mohamad Sawan
Jose Silva-Martinez 5
6 A3L-A Testing & Verification Degang Chen
Igor Filanvosky 5
7 A3L-E Oscillators, Phase-locked Loops & Others III
Nathan Neihart
Ayman Fayed 5
8 A3L-K Sigma-Delta Converters George Yuan
Jose Silva-Martinez 5
9 B1L-A Radar Circuits and Systems Ioannis Syllaios
Joseph Chang 5
10 B1L-K ADCs for wireless communication Thierry Taris
Joseph Chang 5
11 B2L-E RF Circuits I Joseph Chang
Ioannis Syllainos 5
12 B2L-K Data Converters I Ioannis Syllainos
George Yuan 5
13 B3L-E RF Circuits II Thierry Taris
Ioannis Syllainos 5
14 B3L-G Amplifiers & Analog Filtering Joseph Chang
Nuno Paulino 5
15 B3L-K Digital to Analog Conversion Randall Geiger Tong Ge 4
16 C1L-E RF Circuits III Nathan Neihart
Ayman Fayed 5
17 C1L-K Filter Design Igor Filanvosky
Nuno Paulino 4
18 C2L-G Analog Signal Processing Filippo Neri
Nuno Paulino 5
19 C2L-K Regulators & References Ayman Fayed
Nathan Neihart 5
20 C3L-F Oscillators, Phase-locked Loops & Others II Igor Filanvosky
Degang Chen 5
21 C3L-K Modeling and Design Tools Filippo Neri
Nuno Paulino 5
Poster Sessions
Number Session ID Session Name Co-chair Co-chair Paper
Number
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1 A5P-U Data Converters II Shahriar Mirabbasi
George Yuan 16
2 A5P-V Amplifiers, Analog Filtering, RF Circuits & Interface Circuits
Mohamad Sawan
Nuno Paulino 18
3 B5P-P Other areas in Analog & Mixed Signal Circuits & Systems Tong Ge Igor
Filanvosky 25
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Appendix 3: Short Courses, Plenary Sessions, Keynote Speakers, Invited Lectures
Maysam Ghovanloo 1. Invited talk on “A Wirelessly-Powered Experimental Arena for Electrophysiology and Behavioral
Neuroscience Research on Small Freely Behaving Animals,” UCLA, Los Angeles, CA, May 1, 2017. 2. Invited talk on “Implantable and Wearable Microelectronic Devices to Improve Quality of Life for
People with Disabilities,” Michigan Technological University, Houghton, MI, Apr. 7, 2017. 3. Invited talk on “Implantable and Wearable Microelectronic Devices to Improve Quality of Life for
People with Disabilities,” City University of Hong Kong, Hong Kong, Dec. 23, 2016. 4. Invited talk on “Implantable and Wearable Microelectronic Devices to Improve Quality of Life for
People with Disabilities,” Hong Kong University of Science and Technology, Hong Kong, Dec. 23, 2016.
5. Invited talk on “Efficient Power and Wideband Data Transmission in Near Field,” Singapore Institute for Neurotechnology, National University of Singapore, Singapore, Dec. 21, 2016.
6. Invited talk on “Implantable and Wearable Microelectronic Devices to Improve Quality of Life for People with Disabilities,” Singapore Institute for Neurotechnology, National University of Singapore, Singapore, Dec. 20, 2016.
7. Invited talk on “Efficient Power and Wideband Data Transmission in Near Field,” University of Macau, Macau, Dec. 19, 2016.
8. Keynote speech on “Fundamental Building Blocks for Efficient Power and Wideband Data Transmission to mm-Sized Implantable Microelectronic Devices,” Dallas Circuits and Systems Conference, UT-Arlington, Arlington, TX, Oct. 10, 2016.
9. Invited talk on “Implantable Devices for the Brain: Efficient Power and Wideband Data Transmission in Near Field,” IEEE Sensors Council Summer School, EPFL, Lausanne, Switzerland, July 12, 2016.
10. Keynote speech on “Implantable and Wearable Microelectronic Devices to Improve Quality of Life for People with Disabilities,” Keynote Speech, PhD Research in Microelectronics and Electronics (PRIME) Conference, Lisbon, Portugal, June 28, 2016.
11. Invited talk on “Efficient Power and Wideband Data Transmission in Near Field,” Instituto Superior Técnico, Universidade de Lisboa, Lisbon, Portugal, June 27, 2016.
12. Invited talk on “Implantable and Wearable Microelectronic Devices to Improve Quality of Life for People with Disabilities,” Stanford University, Mountain View, CA, May 10, 2016.
13. Invited talk on “Implantable and Wearable Microelectronic Devices to Improve Quality of Life for People with Disabilities,” University of Los Angeles, CA, May 9, 2016.
Igor Filanovsky 14. Tutorial: Design Methodology and Circuit Techniques for Any-Load Stable LDOs with Instant Load
Regulation, 59th MWSCAS, Abu Dhabi, October 2016.
Jose M. de la Rosa 15. J.M. de la Rosa, S. Pavan, N. Maghari, Stacy Ho: Designing High-Performance ΣΔ Converters –
All You Need to Know and Nobody Told You, Tutorial at IEEE ISCAS, May 2016 16. J.M. de la Rosa: Intensive Course on Sigma-Delta Converters. University of Zaragoza, Zaragoza,
Spain, January 2017.
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Ayman Fayed 17. Power Management for VLSI Systems, a 5-day short course, Qualcomm Inc., San Diego. Jan.
2017, and Mar. 2017. 18. Power Management for VLSI Systems, a 5-day short course, Texas Instruments Inc., Dallas. May
2017. 19. Introduction to Data Converters, 3-day short course, Qualcomm Inc., San Diego. Dec. 2016. 20. Fundamentals of Battery Chargers, half-day tutorial, IEEE Midwest Symp. on Circuits and Systems,
Abu Dhabi, UAE, Oct. 2016. 21. Power Management Research Overview, Invited Speaker, Ford Motor Company, Dearborn, MI,
June 2016. 22. Emerging Topics in Integrated Power Management for VLSI Systems, Invited Lecture, Department
of Electrical and Computer Engineering, Wayne State University, Detroit, Michigan, April 2017.
Paul P. Sotiriadis 23. 2016 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, May 22-24, San Francisco,
California, USA, 24. Digital Signal Generation With Focus on Direct Digital Synthesis DDS workshop. 25. Paul Sotiriadis “All Digital Frequency Synthesis Based on New Sigma Delta Architectures”.
Joseph S Chang
26. KEYNOTE Speaker IEEE Midwest Symposium Conference on Electronics, Circuits and Systems, Aug 2016
27. Invited Speaker, FLEX SEA, Oct 2016
28. Invited Speaker, Semicon West, July 2016
29. Invited Speaker, CMOSET, May 2016
Luis Oliveira
30. Chair of the IEEE Portugal CAS chapter, which have organized in November 2016: the Seasonal School in “Circuits and Systems for the Internet-of-Things” (CAS4IoT).
31. This event was joint academia-industry program ensuring a good balance between academia and industry, combined with a judicious selection of worldwide distinguished Lecturers in the field of IoT.
Wouter A. Serdijn
32. Wouter A. Serdijn: Electroceuticals -- bio-electronic medicine as an alternative to drugs, IMDI NeuroControl Symposium 2017, Woudschoten, the Netherlands, May 15-16, 2017
33. Wouter A. Serdijn: BETER WORDEN MET ELEKTROCEUTICA -- Elektronische medicijnen reiken de helpende hand, invited lecture, ProBus, Schoonhoven, the Netherlands, April 28, 2017
34. Wouter A. Serdijn: Injectable Neurostimulators -- tiny electroceuticals to the rescue, SRC/NSF Workshop on Microsystems for Bioelectronic Medicine, Washington, DC, USA, April 12-13
35. Wouter A. Serdijn: Bioelektronica -- Beter worden door middel van elektriciteit en elektronica, invited talk, Professoren in de theater arena | De Bionische Mens, Theater de Veste, Delft, March 28, 2017
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36. Wouter A. Serdijn: Getting Better with Electroceuticals – electronic medicine to the rescue, invited talk, University of Porto, Portugal, March 3, 2017
37. Wouter A. Serdijn: Bioelektronica –- beter worden door middel van elektriciteit en elektronica, invited talk, Nationale Wiskunde Dagen (NWD) 2017, Noordwijkerhout, the Netherlands, Febr. 3, 2017
38. Wouter A. Serdijn: Getting Better with Electroceuticals – electronic medicine to the rescue, invited talk, University of Newcastle, UK, Dec. 5, 2016
39. Wouter A. Serdijn: Reaching Learning Objectives Better by Doing … Less, invited talk, Centre of Advanced Learning and Teaching (CALT), University College London, UK, Nov. 29, 2016
40. Wouter A. Serdijn: Getting Better with Electricity -- bioelectronic medicine to the rescue, invited talk, Middlesex University London, UK, Nov. 24, 2016
41. Wouter A. Serdijn: Electroceuticals -- getting better with electricity, keynote address, Bioelectronics and Biosensors Congress, London, UK, Nov. 17-18, 2016
42. Wouter A. Serdijn: Getting Better with Electroceuticals – electronic medicine to the rescue, invited talk, City University London, UK, Nov. 16, 2016
43. Wouter A. Serdijn: Getting Better with Electroceuticals – electronic medicine to the rescue, invited talk, University of Southampton, UK, Nov. 15, 2016
44. Wouter A. Serdijn: Electroceuticals -- getting better with electricity, pre-congress webinar on Bioelectronics and Biosensors, Oxford Global, Sept. 7, 2016
45. Wouter A. Serdijn: Getting better with electroceuticals: implantable and injectable electronics to the rescue, plenary talk, Imperial Neurotechnology 2016, by: Imperial College Centre for Neurotechnology, London, UK, July 20, 2016
46. Wouter A. Serdijn: Getting better with electroceuticals: implantable and injectable electronics to the rescue, invited talk, Hearme meeting, Leiden University Medical Center, Leiden, 23 June, 2016
47. Wouter A. Serdijn: Hoe kun je een dove weer laten horen en een blinde weer laten zien? Invited lecture, Universiteit van Nederland, AIR, Amsterdam, Nederland, 31 May, 2016
Robert Bogdan Staszewski
48. M. Babaie, S. Binsfeld Ferreira, F.-W. Kuo, and B. Staszewski, “A 4.4mW-TX, 3.6mW-RX Fully Integrated Bluetooth Low-Energy Transceiver for IoT Applications," Seminar (45-min) presented at 26th Workshop on Advances in Analog Circuit Design (AACD), Eindhoven, Netherlands, 30 Mar. 2017.
49. R. B. Staszewski, “Recent advancements in ultra-low power RF circuits and Wave-shaping in RF oscillators," Invited lecture (2-hrs) presented at IEEE Circuits and Systems 2-day Workshop on microelectronics and its applications, Almo Collegio Borromeo, Pavia, Italy, 20 Mar. 2017.
50. R. B. Staszewski, Advanced Short Course on “All-digital Phase-Locked Loops (ADPLL);" IEEE SSCS lectures (2 days, 6×90-min lectures) at AGH University of Science and Technology, Krakow, Poland, 8–9 Dec. 2016.
51. R. B. Staszewski, “Ultra-Low Power and Ultra-Low Voltage Wireless Transceivers for IoT," Workshop WW02 “Trends in CMOS RF ICs" (1-hr) presented at IEEE European Microwave Conference (EuMIC), London, UK, 05 Oct. 2016.
52. R. B. Staszewski, “Digital Frequency Synthesis: Journey towards Spectral Purity, Ultra-Low Power and Millimeter-Wave Operation" Lecture sponsored by IEEE SSCS (1-hr) at Peking University, Shenzhen Graduate School, Shenzhen, Guandong, China, 29 July 2016. DOI: 10.1109/MSSC.2016.2623040.
53. R. B. Staszewski, Advanced Short Course on “All-digital Phase-Locked Loops (ADPLL);" International Summer School sponsored by IEEE SSCS (4 days, 20×45-min lectures) at University of Electronic Science and Technology of China (UESTC), Chengdu, Sichuan, China, 19–22 July 2016. DOI: 10.1109/MSSC.2016.2601527.
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54. R. B. Staszewski, “All-Digital PLL Architecture and Implementation; Digitally Controlled Oscillator (DCO); Time-to-Digital Converter (TDC);" MEAD Microelectronics 3 classes (4.5-hr) on “Practical PLL Design for Frequency Synthesis and Clocking", presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 22–23 June 2016. (scheduled)
55. R. B. Staszewski, “It is Time to use Time (for Digital RF Clock Generation)," Keynote speech (1-hr) presented at the Second IEEE International Conference on Event-Based Control, Communication, and Signal Processing (EBCCSP), AGH University of Science and Technology, Krakow, Poland, 15 June 2016.
56. R. B. Staszewski, “Patents? The Good, the Bad and the Ugly – A perspective from an industrial inventor turned academic," Panel presentation and discussion (1-hr) at IEEE Radio Frequency Integrated Circuits Symp. (RFIC), San Francisco, California, USA, 24 May 2016.
57. R. B. Staszewski, “Designing RF Frequency Synthesizers Robust to Interference," Tutorial (45-min) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC), Workshop WSG: “Frequency synthesizers of multi-band, multi-standard radios and Internet of Things (IoT)", San Francisco, California, USA, 22 May 2016.
D. Brian Ma 58. “Design of High Accuracy High Conversion Ratio Single-Stage Switching Power Converter for
Modern FPGAs at 10MHz”, IEEE International Conference on Solid-State and Integrated Circuit Technology, Hangzhou, China, Oct. 2016 (invited talk).
59. Driving GaN Power Devices: Design Strategies and Circuit Techniques”, PowerSoC Workshop 2016, Madrid, Spain, Oct. 4, 2016 (invited talk).
Jose Silva-Martinez
60. “Power management: Circuits and Systems”, Jose Silva-Martinez and Edgar Sanchez-Sinencio, IEEE 2017-ISCAS Baltimore, 2017.
61. “High-Performance Broadband Analog-to-Digital Converters,” Jose Silva-Martinez, Singapore Army, Nanyang Technological University, Singapore, August 11, 2016.
62. “Highly Efficient High-Performance Modulators,” Jose Silva-Martinez, invited speaker, Media-Tek Corporation Workshop, Nanyang Technological University, Singapore, August 10, 2016.
63. “Blocker Resilient Transceivers for Cognitive Radio Architectures,” Jose Silva-Martinez, Aydin Karsilayan and Christopher Rodenbek, DARPA, Washington, July 29, 2016
64. “Design of Highly Efficinet High-Performance Broadband Analog-to-Digital Converters,” Jose Silva-Martinez, Aydin Karsilayan and Christopher Rodenbek, NRL, Washington, July 28, 2016
65. “High Performance Broadband Modulators,” Jose Silva-Martinez, Cirrus Logic, June 17, 2016. 66. “Recent Advances at TAMU on Oversampled and Nyquist ADCs,” Jose Silva-Martinez, Taiwan
Semiconductor Manufacturing Corporation, May 27, 2016. Thierry Taris
67. Invited Lecture “RF CMOS Design with the Inversion Coefficient”, T. Taris, IEEE CAS Rio Grande do Sul Workshop 2016, Porto Alegre, Brazil, Oct. 2016
Gordon Roberts 68. Principles of subsampling and it’s application to low-cost mixed-signal testing, Invited Tutorial,
Ciena Corporation, Ottawa, Canada, June 2016.
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Laleh Najafizadeh 69. Tutorial Session Co-Organizer with Professor Gang Qu: “Securing Hardware Through Its Lifetime,”
IEEE International Symposium on Circuits and Systems (ISCAS’16), May 2016. 70. Invited Guest Speaker: “Variability in Connectivity: Challenges and Opportunities,” Department of
Electrical and Computer Engineering, University of Pittsburgh, PA, Nov. 2016. 71. Invited Guest Speaker: “Data-Driven Frameworks for Understanding the Dynamics of Brain
Function from Non-Invasive NeuroImaging Techniques”, Department of Electrical and Computer Engineering, University of Maryland, College Park, Mar. 2017.
72. Invited Talk and Paper: Ali Haddad and Laleh Najafizadeh, “Source-Informed Segmentation: Towards Capturing the Dynamics of Brain Functional Networks through EEG,” in Proc. of 50th IEEE Asilomar Conference on Signals, Systems, and Computers (Asilomar’16), Pacific Grove, CA, Nov. 2016,
Gert Cauwenberghs 73. “Advances in Multiscale Integrated Neural Interfaces,” Keynote, Annual Retreat, IGERT
Neuroengineering Training Program, University of Minnesota, Bakken Museum, Minneapolis, May 16, 2017.
74. “Neuromorphic Silicon Learning Machines,” NSCI Seminar, NIST, Boulder CO, April 11, 2017. 75. “Silicon Integrated High-Density Neural Interfaces,” Global Healthcare Forum, Harvard University,
Cambridge MA, March 25 -26, 2017. 76. “Reverse Engineering the Cognitive Brain in Silicon,” Frontier Tech Formum: RoboUniverse, San
Diego, Dec. 14, 2016. 77. “Advances in Unobtrusive Brain-Machine-Body Interfaces,” Fujitsu Laboratories of America,
Sunnyvale CA, Dec. 5, 2016. 78. “Silicon Integrated High-Density Neural Interfaces,” International IEEE EMBS Workshop on
Advanced NeuroTechnologies for BRAIN Initiatives (ANTBI), Nov. 10-11, San Diego, 2016. 79. “Towards High-Resolution Retinal Neural Interfaces,” UCSD-UST Bilateral Symposium, San Diego
CA, Nov. 18, 2016. 80. “Neuromorphic Silicon Learning Machines,” IRDS NanoCrossbar Workshop, Sunnyvale CA, July
15, 2016. “Reverse Engineering the Cognitive Brain in Silicon,” VLSI Summer School, IIT Kharagpur, May 27, 2016.
Deukhyoun Heo
81. Invited Talk at UKC 2016: Mm-Wave Transceiver for Multi-Band Wireless Network-on-Chip
Mohamad Sawan 82. Sawan, M., “Smart Medical Devices for the Discovery and Treatment of Neurodegenerative
Diseases ”, Keynote, IEEE-European Test Symposium, Limassol, Cyprus, May 2017. 83. Sawan, M., “Are Brain-microsystems Interfaces Ready for Efficient Diagnosis and Treatment of
Neurodegenerative Diseases?”, Keynote, IEEE-Canadian Conference on Electrical and Computer Engineering Workshop, Windsor, Canada, May 2017.
84. Sawan, M., “Smart Medical Devices: Industrial opportunities and Rewarding Researches”, Keynote, Microelectronics Industrial Alliance, Montreal, Canada, March 2017.
85. Sawan, M., “Multichannel Neural Sensing and Microstimulation Devices: Design and Implementation Challenges”, Keynote, U-MediaTek Workshop, Singapore, Jan 2017.
86. Sawan, M., “Circuits, Microsystems and Packaging Techniques Intended for Autonomous Brain-Machine Interfaces”, Intensive Course, GIAN Program, NewDelhi, India, Dec 2016.
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87. Sawan, M., “Smart Brain-Bioelectronic Interfaces for Understanding and Subsequent Treatment of Numerous Neurodegenerative Diseases”, Keynote, JDSI, Casablanca, Dec 2016.
88. Sawan, M., “Toward Brain-Area Networks for the Diagnostic and Treatment of Neurodegenerative Diseases”, Keynote, IMAPS, Lyon, France, Dec 2016.
89. Sawan, M., “Wearable and Implantable Bioelectronics for the Diagnostic and Treatment of Neurodegenerative Diseases”, Invited Seminar, NCKU, Tainan, Taiwan, Nov 2016.
90. Sawan, M., “Wearable and Implantable Devices for Sensing and Treatment of Neurodegenerative Diseases”, Keynote, MicroDSD, Korea, Oct 2016.
91. Sawan, M., “Implantable Bioelectronics for the Diagnostic and Treatment of Neurodegenerative Diseases”, Keynote, Bernstein Sparks Workshop, Delmenhorst, Germany, Oct 2016.
92. Sawan, M., “Toward Multimodal Massively Parallel Multichannel Brain-Sensing Interfaces”, Invited Talk, IEEE SMC, Budapest, Hungary, Oct 2016.
93. Sawan, M., “Lab-on-Chip Based Biosensors for Diagnostic and Treatment of Neurodegenerative Diseases”, Keynote, IEEE-MECBME, Beirut, Oct 2016.
94. Sawan, M., “Toward an Implantable Intracortical Microsystem for the Recovery of Vision for the Blind”, Keynote, The Eye and the Chip, Detroit, USA, Sept 2016.
95. Sawan, M., “Connecting Wearable and Implantable Medical Devices to Internet for Remote Sensing and Treatment”, Keynote, IEEE-HealthCom, Munich, Germany, Sept 2016.
96. Sawan, M., “Wearable and Implantable Medical Devices for Diagnostic and Treatment of Neuro-degenerative Diseases”, Invited Seminar, Shanghai Mental Health center, China, July 2016.
97. Sawan, M., “Biosensors and Bioactuators for Diagnostic and Treatment of Neurodegenerative Diseases”, Invited Seminar, SoME, SJTU, China, July 2016.
98. Sawan, M., “Engineering Practice to Help Human Recover Vital Neural Functions”, Invited Seminar, Summer School, SJTU, China, July 2016.
99. Sawan, M., “Implantable Bioelectronics for the Diagnostic and Treatment of Neurodegenerative Diseases”, Invited Seminar, Changsha, China, July 2016.
100. Sawan, M., “Lab-on-CMOS-Chip based Cell Manipulation and Monitoring for Diagnostic and Treatment of Neurodegenerative Diseases”, Keynote, CASFEST, Montreal, May 2016.
101. Sawan, M., “Implantable Neurotechnologies: from Circuits and Signals to Systems and Applications: BMI Case studies”, Tutorial, IEEE-ISCAS, Montreal, May 2016.
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Appendix 4: Conferences Organization
Maysam Ghovanloo 1. Tutorials Co-Chair, IEEE BioCAS 2017, Torino, Italy 2. Technical Program Committee Co-Chair, IEEE BioCAS 2016, Shanghai, China
Igor Filanovsky 3. Conferences chairs: Chairing four sessions on ISCAS’2017, Baltimore, May 2017. 4. Chairing one session on 59th MWSCAS, Abu Dhabi, October 2016.
Gaetano Palumbo 5. Conference co-chair: PRIME 2017
Jose M. de la Rosa
6. Session Chair at IEEE ISCAS in 2016 7. Member of the Steering Committee of the Int. Midwest Symposium on Circuits and Systems
(MWSCAS) from 2012 to present 8. Review Committee Member at IEEE ISCAS (2016, 2017) 9. Organizer of the Second IEEE-CASS Workshop on Micro/Nanoelectronic Circuits and Systems.
Sponsored by the Spain Chapter of IEEE-CASS and locally organized by the University Carlos III. Madrid, Spain, January 2017
10. TPC Member of the 8th IEEE Latin American Symposium on Circuits and Systems (LASCAS), February 2017
Tertulien Ndjountche
11. International Program Committee Member, ICSSC 2017 - The 4th International Conference on Smart and Sustainable City,Shanghai, China
Ayman Fayed 12. Chair of Tutorials and Special Sessions, IEEE MWSCAS 2016. 13. Member of the Technical Program Committee, Analog Baseband Circuits Sub-Committee, IEEE
RFIC Symposium. 14. Member of the Technical Program Committee, Analog Signal Processing Sub-Committee, IEEE
ISCAS. 15. Member of the Steering Committee, IEEE MWSCAS. 16. Session Chair, “Invited Papers”, IEEE MWSCAS 2016, Abu Dhabi, UAE, Oct. 2016. 17. Session Chair, “Tutorial Papers”, IEEE MWSCAS 2016, Abu Dhabi, UAE, Oct. 2016. 18. Session Chair, “Regulators”, IEEE ISCAS 2016, Montreal, Canada, May 2016.
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Luis Hernandez 19. Organizer of the 2nd Spain IEEE-CASS Workshop on Micro/Nanoelectronic Circuits and Systems,
Carlos III University, January 27, 2017
Paul P. Sotiriadis 20. ISCAS 2017, Special Session “Digitally Intensive Frequency Synthesis for Internet of Things
applications”
Shahriar Mirabbasi 21. General Co-Chair, IEEE International NEWCAS Conference, June 2016 22. Technical Program Co-Chair, IEEE Canadian Conference on Electrical and Computer Engineering
(CCECE), May 2016 23. Track Co-Chair, IEEE Canadian Conference on Electrical and Computer Engineering (CCECE),
April 2017
Joseph S Chang 24. J.S. Chang and T. Ge,Tutorial: ‘Class D Amplifiers’, The 15th International Symposium on
Integrated Circuits, Singapore, Dec 2016
Wouter A. Serdijn 25. CASS Transactions Track Co-Chair for ISCAS 2017
George Yuan 26. Track Co-Chair, IEEE Symposium on Circuits and Systems, 2016, 2017
Laleh Najafizadeh 27. Local Chair: IEEE Bipolar/BiCmos Circuits and Technology Meeting (BCTM’16), Sept. 2016 28. Tutorial Co-Chair: 2017 IEEE Bipolar/BiCmos Circuits and Technology Meeting (BCTM’17) 29. Tutorial Co-Chair: 2017 IEEE Midwest Symposium on Circuits and Systems (MWSCAS’17) 30. Technical Program Committee Member: ASPTC-IEEE CASS 31. Technical Program Committee Member: IEEE BCTM 32. Technical Program Committee Member: CLEO-Application and Technology, Biomedical
Applications 33. Session Chair: IEEE BCTM’1
Andreas Demosthenous 34. IEEE 2017 Neural Engineering Conference TPC 35. IEEE 2016 European Solid-State Circuits TPC
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Gert Cauwenberghs 36. Program Committee, IEEE International Solid-State Circuits Conference (ISSCC 2017); IEEE
Engineering in Medicine and Biology Conference (EMBC 2017); IEEE Neural Engineering Conference (NER 2017).
37. International Liaison, IEEE Biomedical Circuits and Systems Conference (BioCAS 2016), Shanghai, Oct. 17-19, 2016.
Deukhyoun Heo 38. TPRC and TC of IEEE International Microwave Symposium 2016, TPC of IEEE ISCAS 2016
Mohamad Sawan 39. IEEE International Symposium on Circuits and systems (ISCAS), General Chair, May 2016,
Montreal, Canada 40. IEEE International NEWCAS conference, General co-Chair, June 2016, Vancouver, Canada 41. IEEE International Conference on Microelectronics (ICM), General co-Chair, December 2016,
Cairo Egypt
Jorge Fernandes 42. Technical Program chair IEEE PRIME 2016 (Conference on PhD Research in Microelectronics and
Electronics), Lisboa, June 2016
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Appendix 5: Editorial Boards
Maysam Ghovanloo 1. Associate Editor, IEEE Transactions on Biomedical Circuits and Systems (TBioCAS) 2. Associate Editor, IEEE Transactions on Biomedical Engineering (TBME)
Filippo Neri 3. TCAS 1 – Guest Editor for Special Number on ISCAS 2016 (December 2016)
Igor Filanovsky
4. Associated Editor, International Journal of Circuit Theory and Applications.
Yichuang Sun 5. Associate Editor of IEEE Transactions on Circuits and Systems-I: Regular Papers, 2016-2017 6. Editor of ETRI Journal (South Korea, on Info, Telecom and Electronics). 7. Editor of Journal of Semiconductors (China, including Integrated Circuits and Systems). 8. Editorial Board of Active and Passive Electronic Components. 9. Guest Editor of Special Issue on 2016 IEEE International Symposium on Circuits and Systems,
IEEE Transactions on Circuits and Systems-I, December 2016. 10. Scientific Committee and TPC, European Conference on Circuit Theory and Design, 2017 TPC 11. Member of IEEE Global Communications Conference (GLOBECOM) - Cognitive Radio and
Networks, 2016, 2017 TPC 12. Member of IEEE International Conference on Personal, Indoor and Mobile Communications, 2016,
2017 TPC IARIA International Conference on Wireless and Mobile Communications, 2016 13. Member of IEEE Circuits and Systems Society Technical Committees on: ASP, CASCOM
Jose M. de la Rosa 14. Deputy Editor in Chief of the IEEE Transactions on Circuits and Systems – II: Express Briefs
Ayman Fayed 15. Member of the Editorial Board, Associate Editor, IEEE Tran. on Circuits & Systems I.
Luis Hernandez 16. Transactions on Circuits and Systems II – January to April 17. Transactions on circuits and systems I – May till today
18
Nathan Neihart 18. TCAS-II
Paul P. Sotiriadis
19. Associate Editor, IEEE Circuits and Systems I 20. Associate Editor, IEEE Sensors Journal
Shahriar Mirabbasi
21. Associate Editor, IEEE Transactions on Circuits and Systems II: Express Briefs
Salvatore Pennisi
22. International Journal of Circuit Theory and Applications (Wiley)
Joseph S Chang 23. Guest Editor (Corresponding Editor), Organic/Printed Electronics: A Circuits and Systems
Perspective, IEEE Journal of Emerging Technology and Selected Topics in Circuits and Systems Mar 2017
24. SENIOR Editor, IEEE Journal of Emerging and Selected Topics in Circuits and Systems
Roberto Gómez-García 25. IEEE Journal on Emerging and Selected Topis in Circuits and Systems (Senior Editor). 26. IEEE Transactions on Microwave Theory and Techniques (Associate Editor). 27. IET Microwaves, Antennas, and Propagation (Associate Editor).
Wouter A. Serdijn 28. AE T-BioCAS
Robert Bogdan Staszewski 29. Guest Editor, R. B. Staszewski, Journal of Solid-State Circuits (JSSC) on European Solid-State
Circuit Conference (ESSCIRC), RF section, July 2017.
George Yuan 30. Associate Editor, IEEE Transaction on Biomedical Circuits and Systems
Pak Kwong Chan 31. Guest Editor for Sensors for Special Issue on Smart Sensor Circuits and Systems
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Andreas Demosthenous 32. Editor in Chief of the IEEE Transactions on Circuits and Systems I: Regular Papers 33. Associate Editor for the IEEE Transactions on Biomedical Circuits and Systems
Gert Cauwenberghs 34. IEEE Transactions on Biomedical Circuits and Systems 35. IEEE Transactions on Biomedical Engineering 36. Frontiers in Neuromorphic Engineering
Mohamad Sawan 37. Editor-in-Chief, IEEE Transactions on Biomedical Circuits and Systems 38. Associate Editor, IEEE Transactions on Biomedical Engineering 39. Associate Editor, International Journal on Circuit Theory and Applications 40. Associate Editor, ETRI Journal
Jorge Fernandes 41. Associate Editor of IEEE journal “IEEE Transactions on Circuits and Systems-II: Express Briefs”. 42. Associate Editor of “IEEE Journal of Radio Frequency Identification (RFID)”.
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Appendix 6: Other IEEE Service and Professional Activities
Igor Filanovsky 1. Committee Member, IEEE CCECE 2016 Technical Program Committee: Devices, Circuits and
Systems Stream, IEEE Canada, Vancouver, May 2016
Tong Ge 2. Reviewer of IEEE International Symposium on Circuits and Systems(ISCAS) 2017
Gaetano Palumbo 3. 2016 Chair of the IEEE CASS Committee for evaluation of the Fellow Nomination.
Jose M. de la Rosa 4. Chair of the Spain Chapter of the IEEE Circuits and Systems Society 5. IEEE Spain Section Membership Development Officer 6. Member of the IEEE Spain Section Executive Committee
Shahriar Mirabbasi 7. Member of Technical Program Committee of IEEE Custom Integrated Circuit Conference (CICC)
2017 8. Member of Technical Program Committee of IEEE International Solid-State Circuits Conference
(ISSCC) 2017 9. Vice President of Publications, IEEE Council on Radio Frequency Identification (CRFID) 10. Joint Chapter Chair, IEEE Vancouver Section
Salvatore Pennisi 11. IEEE Fellow (nominated by CAS Society) for contributions to multistage CMOS operational
amplifiers
Joseph S Chang 12. Founder and Chairperson, CASS Flexible (Flexible Hybrid and Printed Electronics Special Interest
Group) IEEE Circuits and Systems Society 13. Chair, Analog Signal Processing Technical Committee 14. Judge, IEEE Circuits and Systems Society Student Design Competition, IEEE International
Symposium on Circuits and Systems, Baltimore, USA 15. Judge, MIT Technology Review’s TR35
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16. Judge, Best Paper Award, 58th IEEE Midwest Symposium on Circuits and Systems 17. External assessor UniSIM course on Essentials of Bioelectronics 18. Breaking News Program Committee for ‘Emergent ICs’, IEEE Symposium on Circuits and
Systems 19. Technical Program Committee, 12th International Conference on Natural Computation, Fuzzy
Systems and Knowledge Discovery (ICNC-FSKD) 20. Technical Program Committee, 28th International Conference on Microelectronics (ICM 2016),
Egypt 21. International Program Committee, IEEE EMBS International Conference on Biomedical and Health
Informatics (BHI-2016)
Luis Oliveira
22. Chair of the IEEE Portugal Circuits and Systems, Broadcast Technology and Consumer Electronics Joint ChapterIEEE
Roberto Gómez-García
23. IEEE International Symposium on Circuits and Systems (ISCAS), IEEE International New Circuits and Systems Conference (NEWCAS), IEEE MTT-S International Microwave Symposium (IMS), IEEE Radio and Wireless Symposium (RWS), IEEE MTT-S International Wireless Symposium (IWS), IEEE AP-S International Symposium on Antennas and Propagation (APS).
24. Reviewer of several IEEE journals, including: IEEE Trans. Circuits Syst. I, Reg. Papers, IEEE Trans. Circuits Syst. II, Exp. Briefs, IEEE Trans. Industrial Electron., IEEE Trans. Antennas Propag., IEEE Sens. J., IEEE Microw. Mag., IEEE Trans. Microw. Theory Techn., and IEEE Microw. Wireless Compon. Lett.
Wouter A. Serdijn 25. CASS Plagiarism Committee
Robert Bogdan Staszewski
26. Organizers: R. B. Staszewski and G. Hueber, “Trends in CMOS RF ICs,” Workshop WW02 (8-hr, 8 speakers) organized at IEEE European Microwave Conference (EuMIC), London, UK, 05 Oct. 2016.
27. Technical Program Committee (TPC) member, track: “Frequency Generation,” R. B. Staszewski; IEEE European Solid-State Circuits Conf. (ESSCIRC); Lausanne, Switzerland, 12–15 Sept. 2016.
28. IEEE Fellow Committee (at large) - three years 2015-2017
George Yuan
29. Session Chairs, IEEE Symposium on Circuits and Systems, 2016 30. Chair-elect, Analog Signal Processing Technical Committee, IEEE CAS
22
D. Brian Ma 31. IEEE Power Systems and Power Electronic Circuits Technical Committee (Circuits & Systems
Society) 32. IEEE Analog Signal Processing Technical Committee (Circuits & Systems Society) 33. Technical Program Committee, IEEE International Symposium on Circuits and Systems (ISCAS)
Jose Silva-Martinez 34. Elected 2017-2019 Member of the Board of Governors, IEEE Circuits and Systems Society. 35. Lead Guest Editor of the special issue based on papers of the 57th International Midwest
Symposium on Circuits and Systems, Analog Integrated Circuits and Signal Processing, 2016. 36. Member of the 2016 IEEE CASS Fellow Evaluation Committee.
Gordon Roberts 37. Member of the steering committee for the IEEE International Test Conference, 2016. 38. Chair of the Planning and Future Sites subcommittee, IEEE International Test Conference, 2016. 39. Member of the technical program committee for the IEEE International Test Conference, 2016 40. Member of the analog signal processing committee for the IEEE Circuits and Systems Society,
2016
Pak Kwong Chan 41. IEEE ISCAS Review Committee Member
Laleh Najafizadeh 42. Reviewer for IEEE Journal on Emerging and Selected Topics in Circuits and Systems, IEEE Journal
of Solid-State Circuits, PLOS One, IEEE International Symposium on Circuits and Systems (ISCAS), IEEE BiCMOS Technological Meeting (BCTM)
Andreas Demosthenous 43. Chair of subcommittee for Darlington and Guillemin-Cauerd paper awards
Lei Zhang 44. IEEE Member, IEEE SSCS Member, IEEE CASS Member, IEEE MTTS Member. 45. IEEE CASS ASPTC Member. 46. Peer reviewer for major journals and conferences including IEEE T-CAS I/II, IEEE T-MTT, IEEE
MWCL, IEEE T-VLSI, IEEE EDL, ISSCC, ISCAS, ASSCC, etc. 47. Member of IMT-2020 (5G) high frequency communication technology and wireless standard
society in China.
23
Gert Cauwenberghs 48. Chair, Scientific Advisory Board, and co-founder, Cognionics Inc., San Diego CA. 49. Scientific Advisory Board, BrainChip Inc., Irvine CA.
Deukhyoun Heo 50. Session Vice Chair of IEEE IMS 2016
Mohamad Sawan 51. IEEE International Symposium on Circuits and systems (ISCAS), Steering Committee Member 52. Board of Governors, IEEE CAS Society, Member 53. IEEE Biomedical Award Committee, Chair 54. IEEE Life-Science Technical Community CASS Representative 55. IEEE Life-Science Technical Conference Committee Chair
Jorge Fernandes 56. CASS representative on IEEE Technical Committee of the Council on RFID (CRFID). 57. Coordinator of the Distinguished Lecturer Program of the IEEE Council on RFID (CRFID). 58. Chair IEEE Portugal Broadcast Technology Society/Circuits and Systems Society/Consumer
Electronics Society (BT02/CAS04/CE08) Joint Chapter (Awarded Best CASS Chapter in Region 8 in 2016)
59. Secretary IEEE Portugal Broadcast Technology Society/Circuits and Systems Society/Consumer Electronics Society (BT02/CAS04/CE08) Joint Chapter
60. Technical Program Committee (“Analog/Mixed-Signal Circuits” track) IEEE NEWCAS 2016 , Vancouver, Canada, June 2016
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Appendix 7: Awards, Honors, Patents
Maysam Ghovanloo 1. L. Degertekin and M. Ghovanloo, “CMUT-on-CMOS based guidewire intravascular imaging,” U.S.
patent 9,259,206, Applied: Feb. 20, 2013, Granted: Feb. 16, 2016. 2. M. Ghovanloo and M. Kiani, “Wideband data and power transmission using pulse delay
modulation,” U.S. patent 9,094,913, Applied: Nov. 20, 2012, Granted: July 28, 2015.
Filippo Neri 3. Efficient state machine for SIMO DCDC converters (u-blox, 2016, under filing) 4. High-Voltage Backup Battery Switch Using Low Voltage Devices (u-blox, 2016, under filing)
Igor Filanovsky 5. IEEE Circuits and Systems Society Best TVLSI Reviewer Award, July 2016.
Tong Ge 6. Finalist, L’Oréal Singapore Awards 2016 For Women In Science National Fellowships 7. J. Chang, T. Ge and L. Guo “An Amplifier Circuit for a Parametric Transducer and a Related Audio
Device” US Patent Application No. 15/506,849, Feb 2017 8. J. S. Chang, T. Ge, and L. Guo “A Novel Low-Power High-Efficiency 3-State Filterless Bang-Bang
Class D Amplifier” PCT Application No.: PCT/SG2016/050585, Nov 2016
Jose M. de la Rosa 9. Distinguished Lecturer of the IEEE Circuits and Systems (CAS) Society (term 2017-18).
Joseph S Chang
10. J. Chang, T. Ge and L. Guo “An Amplifier Circuit for a Parametric Transducer and a Related Audio Device”US Patent Application No. 15/506,849, Feb 2017
11. J. S. Chang, T. Ge, and L. Guo “A Novel Low-Power High-Efficiency 3-State Filterless Bang-Bang Class D Amplifier” PCT Application No.: PCT/SG2016/050585, Nov 2016
12. J. S. Chang, C.T. Lee and T. Ge “A Communications Device” China Patent 201280025067.X, Nov 2016
13. J.S. Chang, Lee C.L. and Ge Tong, “A Communications Apparatus”, Japanese Patent No., JP 2016-78637 A , Oct 6, 2016
14. Joseph S. Chang, Chai Lung Lee, Yin Sun and Sebastian Chang Bucca, “Under-Chin Microphone for High Speech Intelligibility in Noisy Environments”, Singapore Patent Application No. 10201703312R, 23 April 2017
15. Joseph S Chang, Shu Wei, Qu Yong, Eugene Fitzgerald, Kenneth Lee Eng Kian, Chua Soo Jin, and Chiah Siau Ben“Fully Digital Driving Methodology For Integrated Displays” US Provisional Patent Ppplication No. 62/458,775 NTU Ref: PAT/038/17/17/US PRV, 14 Jan 2017
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16. Zhang Li, Kenneth Lee, Chua Soo Jin, Eugene Fitzgerald, Chiah Siau Ben, Joseph Chang, Qu Yong, and Shu Wei “Method of Forming CMOS Integrated Light Emitting Device Array” US Provisional Patent Ppplication No. 62/445,877, Jan 2017
17. J.S. Chang, L.F. Guo and T. Ge “Voltage Reference and Self-Oscillating Amplifier Circuit” PCT/SG2016/050585,Nov 2016
18. J.S. Chang, Ge Tong, Lin Tong and Zhou Jia “Printed Electronics: Effects Of Bending And A Self-Compensation Means” Singapore provisional patent application number 10201605592QPAT/036/13/16/SG PRV 8 July 2016
19. J.S. Chang , T. Ge and C.L. Lee Smart Packaging Film US National Phase: US Patent Application No. 15/314,501 Nov 2016
20. J.S. Chang, G.S. Lim, L. Zhang, Z.P Wang, W. Ru, S.T. Wong and K. Cui "Lab-In-A-Needle" Device For Point-Of-Care Testing, And A Method Of Using Microfluidic Nucleic Acid Testing For Tissue Assessment PCT/SG2016/050116
21. J.S. Chang, W. Shu and J.Z. Jiang A Method For Providing A Voltage Reference At A Present Operating Temperature In A Circuit US Application No.: 15/328,300, Filing Date: 23 January 2017
Wouter A. Serdijn 22. Honorary Visiting Professor, University College London, 2016-2017
Robert Bogdan Staszewski Issued US patents:
23 9,590,646 Frequency synthesizers with adjustable delays 24 9,584,141 All digital phase-locked loop 25 9,473,155 Software reconfigurable digital phase lock loop architecture
26 9,455,667 Fractional-N all digital phase locked loop incorporating look ahead time to digital converter
27 9,444,433 Wideband FM demodulation by injection-locked division of frequency deviation
28 9,419,635 Time-to-digital converter and method therefor 29 9,401,724 Frequency synthesizers with amplitude control
30 9,401,677 Split transformer based digitally controlled oscillator and DC-coupled buffer circuit therefor
31 9,397,613 Switching current source radio frequency oscillator 32 9,385,731 Phase-locked loop (PLL)
33 9,385,651 60 GHz frequency generator incorporating third harmonic boost and extraction
34 9,374,036 Split transformer based LC-tank digitally controlled oscillator 34 9,369,085 Oscillator with favorable startup 35 9,356,557 Capacitor arrangement for oscillator 36 9,337,847 Oscillator
D. Brian Ma 37. Distinguished Chair in Microelectronics, The University of Texas at Dallas, 2017-present. 38. Special Feature Award, IEEE/ACM Asia & South Pacific Design Automation Conference (ASP-
DAC) University LSI Design Contest, 2016.
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Thierry Taris 39. Head of Circuit Design Group in ST Microelectronics-IMS joined Lab 40. Member of Strategic Airspace Consortium (AESE Pole)
Gordon Roberts 41. Education Award, bourse d’enseignment en genie, Ministére do l’Éducation, du Loisir et du Sport,
Quebec Government, 2016.
Laleh Najafizadeh 42. Selected as Rutgers’ Nominee for Takeda Early Career Innovator in Science Award, April 2017
Yannis Syllaios
43. Principal R&D Engineer within the IoT Group of Cypress Semiconductor Corp 44. I.L. Syllaios, H.T. Jensen, "Digital PLL with Hybrid Phase/Frequency Detector and Digital Noise
Cancellation”, US 9,319,051 B2 (issued)
Lei Zhang 45. Major Research Achievement of National Basic Research Program of China.
We achieved the first CMOS 60GHz transceiver front-end chip and the first Gbps millimeter-wave high throughput wireless communication demo system in China, which has been selected as the Major Research Achievement of National Basic Research Program of China.
Gert Cauwenberghs 46. “Ultra-High Photosensitivity Vertical Nanowire Arrays for Retinal Prosthesis,” M. Khraiche, G. Silva,
G. Cauwenberghs, Y. Lo, D. Wang, and W. Freeman, United States Patent 9,381,355, July 5, 2016. 47. “Integrated Electric Field Sensor,” Y.M. Chi, G. Cauwenberghs, and C. Maier, United States Patent
9,360,501, June 7, 2016.
Deukhyoun Heo 48. US Patent No. 9,589,719 that issued on March 7, 2017 for invention “Switchable Patterned Metal
Shield Inductance Structure for Wideband Integrated Systems”
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Appendix 8: Selected Journal Publications (up to three)
Maysam Ghovanloo 1. J. Lim, C. Tekes, F. Levent Degertekin, and M. Ghovanloo, “Towards a reduced-wire interface for
CMUT-based intravascular ultrasound imaging systems,” IEEE Trans. on Biomed. Circuits and Systems, vol. 11, no. 2, pp. 400-410, Apr. 2017.
2. Y. Cheng, G. Wang, and M. Ghovanloo, “Analytical modeling and optimization of small solenoid coils for mm-sized biomedical implants,” IEEE Transactions on Microwave Theory and Technology, vol. 65, no. 3, pp. 1024 - 1035, Mar. 2017.
3. S. Ostadabbas, S.N. Housley, N. Sebkhi, K. Richards, D. Wu, Z. Zhang, M. Garcia-Rodriguez, L. Warthen, C. Yarbrough, S. Balagaje, A.J. Butler, and M. Ghovanloo, “A tongue-controlled robotic rehabilitation: preliminary evidence for function and quality of life improvement in stroke survivors,” J. Rehabilitation Research and Development, vol. 53, no. 6, pp. 989-1006, Nov. 2016.
Igor Filanovsky 4. I. Filanovsky, “Property of Rational Functions Related to Band-Pass Transformation with
Applications to Symmetric Filter Design”, IEEE Transactions on Circuits and Systems, Part I, vol. 63, no. 12, pp. 2112-2119, 2016.
5. J. Casaleiro, L.B. Oliveira, and I.M. Filanovsky, “A quadrature RC-oscillator with capacitive coupling”, INTEGRATION, the VLSI Journal, vol. 52, pp. 260-271, 2016.
Tong Ge 6. Invited T. Ge, and J. Zhou “An Open Platform for Fully-Additive Printed Electronics” IEEE Journal
on Emerging and Selected Topics in Circuits and Systems, March 2017 Despite the gargantuan market potential, Printed Electronics-only (PE-only) circuits and systems on flexible substrate remain nascent. There are a number of reasons for this, including the unavailability of Process Development Kits (PDKs) to facilitate PE circuits and systems design and to predict manufacturability (due to the innately high process variations of PE). In this paper, we describe an ‘Open-Platform’ PDK for our Fully-Additive Low-Temperature All-Air printing process with Very Low Process Variations. Our PDK embodies a novel simple yet accurate transistor model that can not only accurately model the printed transistors depending on their layout and when they are flat (unbent substrate) but also accurately model the process variations when they are bent (bent substrate). The proposed PDK is compatible with commercial computer aided design simulation tools.
7. J. Zhou, T. Ge, and J. S. Chang “Printed Electronics: Effects of Bending and a Self-Compensation
Means” IEEE Trans. Circuits Syst. I, Reg. Papers, Oct 2016
A highly-worthy attribute of Printed-Electronics is its possible realization on flexible-substrates that can be molded/bent. We present a comprehensive investigation into the effects of concave/convex bending to printed circuit-elements and basic-circuits. We propose a novel localized self-compensation means involving the partition of a given circuit-element/circuit into two-halves, each placed on the top/bottom of the flexible-substrate surface. The proposed means is highly efficacious –the reduction of variations ranges from ~2x to >100x, yet without power, hardware or substrate-area overheads.
8. H. He, T. Ge, L. Guo, and J. S. Chang“3-state BTL Closed-loop PWM Class D Amplifiers” Analog
Integrated Circuits and Signal Processing, pp. 255–266, Aug 2016
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One of the shortcomings of a number of Class D amplifiers (CDAs) designs is their susceptibility to supply noise, quantified by Power Supply Rejection Ratio (PSRR). Reported investigations to-date remain incomplete/over-simplified. In this paper, the effect of supply noise in the AC ground to PSRR is analytically investigated, and the associated analytical expressions derived. Of specific interest, the analysis is applied to the ubiquitous 3-state Bridge-tied-load (BTL) closed-loop PWM CDA, taking into consideration not only the effect of the non-ideal AC ground, but also the effect of the resistor and capacitor mismatch based on a realistic fully-differential integrator model.
Yichuang Sun 9. D.-W. Yue and Y. Sun, "Transmit Power Minimization for MIMO Systems of Exponential Average
BER with Fixed Outage Probability", Wireless Personal Communications, Vol.90, No.4, October 2016.
10. X. Chen, W. Ni, X. Wang and Y. Sun, "Optimal Quality-of-Service Scheduling for Energy-Harvesting Powered Wireless Communications," IEEE Transactions on Wireless Communications, Vol.15, No.5, 2016.
11. J. Zhang, Y. Xu, Z. Zhang, Y. Sun, Z. Wang, and B. Chi, "A 10-bit 4th-order Quadrature Bandpass Continuous-time ΣΔ Modulator with 33-MHz Bandwidth for a Dual-channel GNSS Receiver", IEEE Transactions on Microwave Theory and Techniques, accepted on 17th December 2016.
Gaetano Palumbo 12. G. Giustolisi, G. Palumbo, "New compensation strategy for high-speed three-stage switched-
capacitor amplifiers", Electronics Letters, Vol. 52, No. 14, pp. 1202-1204, July 2016. 13. D. Marano, A. D. Grasso, G. Palumbo, S. Pennisi, "Optimized Active Single-Miller Capacitor
Compensation with Inner Half-Feedforward Stage for Very High-Load Three-Stage OTAs", IEEE Trans. on CAS part I, Vol. 63, No. 9, pp. 1349-1359, September 2016.
Jose M. de la Rosa 14. G. Molina-Salgado, G. Jovanovic-Dolecek and J.M. de la Rosa: “Low Power Two-Stage Comb
Decimation Structures for High Decimation Factors.” Springer Analog Integrated Circuits and Signal Processing, vol. 88, pp. 245-254, August 2016. This paper proposes a novel topology of decimators for ∑∆ ADCs which allows to reduce the power and area as compared with conventional CIC decimation structures.
15. M. Honarparvar, J.M. de la Rosa, F. Nabki and M. Sawan: “SMASH ∑∆ Modulator with Adderless Feed-forward Loop Filter.” IET Electronics Letters, vol. 53, pp. 532-534, April 2017. This paper presents a new topology of SMASH ∑∆ modulators, which solves the problem of power-hungry adders in conventional feed-forward loop filters, leading to more efficient analog-to-digital converters based on cascade ∑∆ modulators.
16. G. Jovanovic-Dolecek, R. García Baez, G. Molina Salgado and J.M. de la Rosa: “Novel Multiplierless Wideband Comb Compensator with High Compensation Capability.” Springer Circuits, Systems and Signal Processing, vol. 36, pp. 2031-2049, May 2017.
29
This paper proposes a new decimation filter topology for ∑∆ converters that reduces the passband deviation as compared with previous approaches and its performance is not affected by the decimation factor.
Ayman Fayed 17. Mina Nashed and Ayman Fayed, “A Current-Mode Hysteretic Buck Converter with Spur-Free
Control for Variable Switching Noise Mitigation,” IEEE Tran. on Power Electronics. In press. Available for early access on IEEE Xplore.
This work presents a hysteretic buck converter with spur-free spectrum to mitigate the challenge of switching noise variability in hysteretic converters.
18. Ahmed Abdelmoaty, Mohammad Al. Shyoukh, Y.C. Hsu, and Ayman Fayed, “A MPPT Circuit with 25 μW Power Consumption and 98.7% Tracking Efficiency for PV Systems,” IEEE Tran. on Circuits & Systems I, vol. 64, no. 2, pp. 272-282, Feb. 2017. This work presents a maximum power point tracking circuit with ultra-low power consumption.
19. Y. Jiang and Ayman Fayed, “A 1A, Dual-Inductor 4-Output Buck Converter with 20-MHz/100-MHz Dual-Frequency Switching and Integrated Output Filters in 65nm CMOS,” IEEE J. of Solid-State Circuits, vol. 51, no. 10, pp. 2485-2500, Oct. 2016.16. This work presents a switching power converter with four fully-integrated outputs for SoC applications in 65nm CMOS.
Luis Hernandez
20. E. Gutierrez, L. Hernandez and F. Cardes, "VCO-based sturdy MASH ADC architecture," in Electronics Letters, vol. 53, no. 1, pp. 14-16, 1 5 2017.
Nathan Neihart 21. Y. Li, Z. Zhang, and N. M. Neihart, “Switchless compact dual-band matching networks for class-E
power amplifiers,” Analog Integrated Circuit and Signal Processing, vol. 88, pp. 207-221, No. 2, Aug. 2016.
Paul P. Sotiriadis 22. P. Sotiriadis, “Spurs-Free Single-Bit-Output All-Digital Frequency Synthesizers With Forward and
Feedback Spurs and Noise Cancelation”, IEEE Trans. on Circuits and Systems-I, Vol. 63, No. 5, May 2016, pp. 567-576.
This work introduces the concepts of phase and polar Σ-Δ modulation. Both of them are used to create all-digital frequency synthesis architectures with 1-bit digital output and noise shaping. A brief analysis is provided and their output spectra are compared to those of the forward-dithered all-digital 1-bit-output frequency synthesizers, which are also analyzed.
30
23. C. Basetas, P. Sotiriadis, “A Class of 1-Bit Multi-Step Look-Ahead Σ-Δ Modulators”, IEEE Trans. on Circuits and Systems-I, Vol. 64, Νο. 1, Jan. 2017, pp. 24-37. Multi-Step Look-Ahead (MSLA) 1-bit Σ-Δ modulators are introduced demonstrating an improvement on stability and noise shaping characteristics compared to conventional 1-bit Σ-Δ modulators. They are analyzed mathematically and are shown to be equivalent to a system of conventional Σ-Δ modulators in parallel, but with a common multi-input 1-bit quantizer instead of a typical one.
24. P. Sotiriadis, “Single-Bit All Digital Frequency Synthesis Using Homodyne Sigma-Delta Modulation”, IEEE Trans. on Ultrasonics, Ferroelectrics, and Frequency Control, Vol. 64, No. 2, Feb. 2017, pp. 463 – 474. The homodyne filter architecture is introduced and is used in bandpass sigma-delta modulators resulting in efficient implementations of carrier-frequency-centered bandpass filters. A multiplier-free version of the homodyne filter is also introduced. Detailed mathematical analysis of the general class of 1-bit sigma-delta modulators is provided based on quasi-linearization modeling.
Shahriar Mirabbasi 25. M.S. Sarwar, Y. Dobashi, C. Preston, J. Wyss, S. Mirabbasi, and J.D.W. Madden, “Bend, Stretch
and Touch: Locating a Finger on an Actively Deformed Transparent Sensor Array,” Science Advances, vol.3, no. 3, e1602200, March, 2017, DOI: 10.1126/sciadv.1602200
The development of bendable, stretchable, and transparent touch sensors is an emerging technological goal in a variety of fields, including electronic skin, wearables, and flexible handheld devices. Although transparent tactile sensors based on metal mesh, carbon nanotubes, and silver nanowires demonstrate operation in bent configurations, we present a technology that extends the operation modes to the sensing of finger proximity including light touch during active bending and even stretching. In the proposed sensor, touch is detectable during bending and stretch, an important feature of any wearable device. Ultimately, the approach is adaptable to the detection of proximity, touch, pressure, and even the conformation of the sensor surface.
26. A.H. Ahmed, A. Sharkia, B. Casper, S. Mirabbasi, and S. Shekhar, “Silicon-Photonics Microring Links for Data Centers – Challenges and Opportunities,” IEEE Journal of Selected Topics in Quantum Electronics, vol. 22, no. 6, pp. 194–203, Nov.–Dec. 2016.
This paper presents an analysis of microring-based links from the holistic perspective of optical devices, CMOS circuits, and system-level link budget and energy-efficiency simulations. Design considerations and tradeoffs for the receiver, transmitter, and the overall link are presented, and comparisons are made to the mainstream multimode vertical-cavity surface-emitting laser-based links with multi-mode fibers. Also, Research opportunities are highlighted for further improving the energy efficiency of single channel and wavelength division multiplexing-based silicon-photonics links.
27. P. Agarwal, S.P. Sah, Reza Molavi, S. Mirabbasi, P.P. Pande, S.E. Oh, J.-H. Kim, and D. Heo, “Switched Substrate-Shield Based Low Loss CMOS Inductors for Wide Tuning Range VCOs,” IEEE Transactions in Microwave Theory and Techniques, DOI: 10.1109/TMTT.2017.2675423
A switched substrate-shield inductor (SSI) topology in bulk CMOS is proposed which minimizes parasitic capacitance and substrate losses, while tuned magnetically induced currents facilitate inductor tunability. The high frequency behavior of the induced current is analyzed, resulting in intuitive insights and design guidelines for a high-performance SSI.
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Salvatore Pennisi 28. Davide Marano, Alfio D. Grasso, Gaetano Palumbo, Salvatore Pennisi" Optimized Active Single-
Miller Capacitor Compensation with Inner Half-Feedforward Stage for Very High-Load Three-Stage OTAs," IEEE Transactions on Circuits and Systems I: Regular Papers, Volume: 63, Issue: 9, Sept. 2016.
This paper introduces a new effective single-Miller capacitor compensation topology for three-stage amplifiers with very large capacitive loads, realized through an active-feedback capacitor together with an inner half-feedforward stage.. To validate the solutions presented, a three-stage OTA driving a 10-nF load has been designed and implemented in a standard 0.35-μm CMOS technology. The amplifier occupies less than 0.003-mm2 of die area, provides 2.7-MHz gain-bandwidth product and 0.55-V/μs average slew-rate, while consuming only 25-μA quiescent current.
29. Elena Cabrera-Bernal, Salvatore Pennisi, Alfio Dario Grasso, Antonio Torralba, Ramón Gonzalez Carvajal, "0.7-V Three-Stage Class-AB CMOS Operational Transconductance Amplifier," IEEE Transactions on Circuits and Systems I: Regular Papers, Volume: 63, Issue: 11, Nov. 2016.
This paper presents a simple high-performance architecture for bulk-driven operational transconductance amplifiers (OTAs) suitable for operation under sub 1-V single supply. The solution is made up of three gain stages and, as an additional feature, provides inherent class-AB behavior with accurate and robust standby current control. The OTA is fabricated in a 180-nm standard CMOS technology, is powered from 0.7 V with a standby current consumption of around 36 μA. DC gain and unity gain frequency are 57 dB and 3 MHz, respectively, under a capacitive load of 20 pF. Overall good large-signal and small-signal performances are achieved, making the solution extremely competitive in comparison to the state of the art.
Joseph S Chang
30. J. Zhou, T. Ge, and J. S. Chang“Printed Electronics: Effects of Bending and a Self-Compensation Means” IEEE Trans. Circuits Syst. I, Reg. Papers, Oct 2016
A highly-worthy attribute of Printed-Electronics is its possible realization on flexible-substrates that can be molded/bent. We present a comprehensive investigation into the effects of concave/convex bending to printed circuit-elements and basic-circuits. We propose a novel localized self-compensation means involving the partition of a given circuit-element/circuit into two-halves, each placed on the top/bottom of the flexible-substrate surface. The proposed means is highly efficacious – the reduction of variations ranges from ~2x to >100x, yet without power, hardware or substrate-area overheads.
31. J.S. Chang, A. Facchetti and R. Reuss Editorial Paper ‘Organic Electronics: A Circuits and Systems Perspective’ IEEE J. Emerging and Selected Topics, Mar 2017
32. J.S. Chang, A. Facchetti and R. Reuss‘A Circuits and Systems Perspective of Organic/Printed Electronics: Review, Challenges, and Contemporary and Emerging Design Approaches’ IEEE J. Emerging and Selected Topics, Mar 2017
Luis Oliveira
33. A. Francesco, R. Bugalho, L. B. Oliveira, A. Rivetti, M. Rolo, J. Silva and J. Varela, “TOFPET 2: A High-Performance Circuit for PET Time-of-Flight”, Nuclear Instruments and Methods in Physics
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Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, vol. 824, pp. 194-195, July 2016.
34. L. B. Oliveira, N. Paulino, J. Oliveira, R. Santos-Tavares, N. Pereira, and J. Goes, “Undergraduate Electronics Projects Based on the Design of an Optical Wireless Audio Transmission System”, IEEE Transactions on Education, Volume: 60, Issue: 2, May 2017.
Roberto Gómez-García 35. D. Psychogiou, R. Gómez-García, A. C. Guyette, and D. Peroulis, “Reconfigurable single-/multi-
band filtering power divider based on quasi-bandpass sections,” IEEE Microw. Wireless Compon. Lett., vol. 26, no. 3, pp. 684-686, Sep. 2016.
Demonstration of the first multi-function RF device with simultaneous power-division and multi-band filtering operation. Moreover, the frequency bands can be switched on/off and spectrally reconfigured in frequency. This situates this RF components among the most flexible ones of its class.
36. D. Psychogiou, R. Gómez-García, and D. Peroulis,“Single- and multi-band acoustic-wave lumped-element resonator (AWLR) bandpass filters with reconfigurable transfer function,” IEEE Trans. Microw. Theory Techn., vol. 64, no. 12, pp. 4394-4404, Dec. 2016.
Demonstration of the first acoustic-wave-lumped-element-technology-based reconfigurable multi-band filter. It features state-of-the-art figures of merit in terms of simultaneous compact size and high effective quality factor with added reconfiguration capability for its transfer function.
37. D. Psychogiou, R. Gómez-García, and D. Peroulis, “Fully-adaptive multi-band bandstop filtering sections and their application to multi-functional components,” IEEE Trans. Microw. Theory Techn., vol. 64, no. 12, pp. 4405-4418, Dec. 2016.
Demonstration of ultra-adaptive multi-notch RF devices (in terms of frequency, bandwidth, and number of notches) for interference mitigation in wireless systems. Their integration with other RF devices, such as reconfigurable wide-band bandpass filters and power dividers, is also approached.
Wouter A. Serdijn 38. Leila Rajabi, Mehdi Saberi, Yao Liu, Reza Lotfi and Wouter A. Serdijn: A Charge-Redistribution
Phase-Domain ADC Using an IQ-Assisted Binary-Search Algorithm, IEEE Transactions on Circuits and Systems I: Regular Papers, Date of Publication: 28 March 2017, DOI: 10.1109/TCSI.2017.2681461
This paper explains how the system architecture improves and the complexity reduces when replacing two carthesian ADCs in the receiver chain by a single phase-domain ADC in case of phase-only modulation. A convincing circuit design and its measurement results are given.
39. Mark Stoopman, Kathleen Philips and Wouter A. Serdijn: An RF-Powered DLL-Based 2.4-GHz Transmitter for Autonomous Wireless Sensor Nodes, IEEE Transactions on Microwave Theory and Techniques, Date of Publication: 02 February 2017, DOI: 10.1109/TMTT.2017.2651817.
This paper describes the design of an autonomous, i.e., battery-less, wireless transmitter that can be used, e.g., in IoT applications.
40. Emil Totev, Cong Huang, Leo C. N. de Vreede, John R. Long, Wouter A. Serdijn and Chris Verhoeven: Out-of-Band Immunity to Interference of Single-Ended Baseband Amplifiers Through
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IM2 Cancellation, IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 63, No. 11, Nov. 2016, pp. 1785 - 1793, DOI: 10.1109/TCSI.2016.2593341
This paper presents a new circuit technique that allows for the reduction of the EMI susceptibility of amplifiers in case of out of band interference.
Robert Bogdan Staszewski
41. Y.-H. Liu, J. vd Heuvel, T. Kuramochi, B. Busze, P. Mateman, V. K. Chillara, B. Wang, R. B. Staszewski, and K. Philips, “An ultra-low power 1.7-2.7 GHz fractional-N sub-sampling digital frequency synthesizer and modulator for IoT applications in 40 nm CMOS," IEEE Trans. on Circuits and Systems I (TCAS-I), vol. 64, iss. 5, pp. 1094–1105, May. 2017. DOI: 10.1109/TCSI.2016.2625462. The first ever journal publication of a PLL for a standard-compliant wireless system (i.e., Bluetooth low energy). The all-digital PLL consumes less than 1mW while providing excellent phase noise and spurious performance.
42. M. Shahmohammadi, M. Babaie, and R. B. Staszewski, “Tuning range extension of a transformer-based oscillator through common-mode Colpitts resonance," IEEE Trans. on Circuits and Systems I (TCAS-I), vol. 64, iss. 4, pp. 836–846, Apr. 2017. DOI: 10.1109/TCSI.2016.2625199.
The paper proposing the widest tuning range of an LC-tank oscillator that reaches almost an octave. Detailed phase noise analysis is provided.
43. M. Tohidian, I. Madadi, and R. B. Staszewski, “A fully integrated discrete-time superheterodyne receiver,” IEEE Trans. on VLSI Systems (TVLSI), vol. 25, no. 2, pp. 635–647, Feb. 2017. DOI: 10.1109/TVLSI.2016.2598857.
George Yuan 44. J. Guo, W. Ng, J. Yuan, S. Li, and M. Chan, “A 200-channel area-power-efficient chemical and
electrical dual-mode acquisition IC for the study of neurodegenerative diseases”, IEEE Trans. Biomedical Circuits and Systems, Vol. 10, pp. 567-578, Mar. 2016 This paper introduced one of the most power efficient designs for bio-potential and bio-current detection circuits reported so far.
D. Brian Ma 45. Y. Lu, D. Ma, “Wireless Power Transfer System Architectures for Portable or Implantable
Applications”, Energies, pp.1-16, Vol. 9, No. 12, doi:10.3390/en9121087, Dec. 2016. 46. R. Bondade, Y. Zhang, B. Wei, T, Gu, H. Chen, D. Ma, “Integrated Auto-Reconfigurable Power
Supply Network with Multi-Directional Energy Transfer for Self-Reliant Energy Harvesting Applications”, IEEE Trans. on Industrial Electronics, pp. 2850-2861, Vol. 63, No. 5, May 2016.
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Jose Silva-Martinez 47. "A Wideband 22-35 GHz Active Balun-LNA for Low Power Millimeter-Wave Applications with IM2
Cancellation” C. Geha, C. Nguyen, J. Silva-Martinez, IEEE-Transactions on Microwave Theory and Techniques, pp 536 – 547, February 2017. Top 24 most downloaded paper of the MTT in February.
48. “A 43.0 mW MASH 2-2 CT Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50.3 MHz of BW in 40 nm CMOS,” Alexander Edward, Qiyuan Liu, Carlos Briseno-Vidrios, Martin Kinyua, Eric Soenen, Aydin Ilker Karsilayan and Jose Silva-Martinez and Eric Soenen, IEEE Journal of Solid-State Circuits, pp 448 – 459, February 2017. Top 21 most downloaded paper of the JSSC in February. Top 41 most downloaded paper of the JSSC in March.
49. “A 75 MHz Continuous-time Sigma-Delta Modulator Employing A Broadband Low-power Highly Efficient Common-gate Summing Stage,” C. Briseno-Vidrios, A. Edward, A. Shafik, S. Palermo, and J. Silva-Martinez, IEEE Journal of Solid-State Circuits, pp. 657–668, March 2017. Top 25 most downloaded paper of the JSSC in January. Top 8 most downloaded paper of the JSSC in March.
Thierry Taris
50. M. De Souza, A. Mariano, T. Taris, “Reconfigurable Inductorless Wideband CMOS LNA for Wireless Communications”, IEEE Transactions on Circuits and Systems I, Oct. 2016, pp. 34-47, ref MEJ4059doi information: 10.1016/j.mejo.2016.07.013- IF:3.27 State of the art inductorless wideband LNA including feedback linearisation.
51. A. H. Masnadi, H. Rashtian, R. Molavi, T. Taris, S. Mirabbasi, “On the Design of Combined LNA-VCO-Mixer for Low-Power Low-Voltage CMOS Receiver Front-Ends ”, Microelectronics Journal, Oct. 2016, pp. 34-47, ref MEJ4059doi information: 10.1016/j.mejo.2016.07.013- IF:0.88 A genuine combination of LNA, Mixer and VCO to improve power consumption and still maintaining good performances.
52. L. Fadel, L. Oyhenart, R. Berges, V. Vigneras and T. Taris “A dual band 900MHz/2.4GHz RF Harvester”, International Journal on Microwaves and Wireless Technologies (IJMWT), Cambridge University Press and the European Microwave Association, March. 2016, online Library, doi:10.1017/S1759078716000179,- IF:0.46 Improved efficiency of rectenna based on COTS Schottky diodes
Gordon Roberts 53. M. Mahani and G. W. Roberts, “A mmWave Folded Substrate Integrated Waveguide in a 130 nm
CMOS Process,” IEEE Transactions on Microwave Theory and Techniques, Feb 2017.
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A miniaturized millimeter-wave substrate integrated waveguide (SIW) in IBM 130-nm digital CMOS process is presented in this paper. The footprint of the interconnect is reduced compared with previous works using the folding technique. A current-loop transition structure is proposed in this paper that is built inside the SIW interconnect and excites its TE10 mode with minimal area overhead. A simulationbased comparison of T-FSIW and other planar transmission line structures reveals that the T-FSIW interconnect shows a much higher resonant quality factor. A prototype waveguide is designed and fabricated to operate with a cutoff frequency of 175 GHz. Furthermore, the current-loop excitation is optimized for the frequency range of 180–220 GHz. Simulation and experimental data are used to confirm the proposed interconnect approach.
54. M. Abdelfattah and G. W. Roberts, “All-Digital Time-Mode Direct-Form All-Pole Biquadratic Filter Realization,” IEEE Transactions on Circuits and Systems II: Express Briefs, Dec. 2016. In this work, the design of time-mode signal processing (TMSP) circuits having an all-digital advantage is introduced and experimental data covering all necessary aspects of operation such as frequency response are presented. TMSP building blocks were used to design two second-order filter prototypes having Butterworth and Chebychev I responses demonstrating peak SNDR values of 47 dB and 37 dB, respectively, making it a good candidate for data conversion applications.
55. M. Yang and G. W. Roberts, “Synthesis of Ultra-High Gain Operational Transconductance Amplifiers Using A State-Space Controller-Based Compensation Method,“ IEEE Transactions on Circuits and Systems--I: Regular Papers, Volume: 63 Issue: 11, pp. 1-13, Nov. 2016. This paper presents a systematic procedure that can be used to create operational transconductance amplifiers (OTAs) for closed-loop operation using multiple low-gain stages to realize extremely high DC gain. Such devices are necessary to realize analog functions with demanding absolute accuracy requirements, e.g., high-resolution ADCs and DACs. The principle is based on the cascade of undamped integrators to realize large DC gains and a state-space derived controller to stabilize its operation in a closed-loop configuration. A programmable OTA fabricated in the IBM130 nm CMOS process is used as a test vehicle to prove the design principle through its 2 to 5th-order realization. Measured data reveals DC gains ranging from 50 to 150 dB with a 3-dB bandwidth of 10 kHz and a unity gain frequency of 10 MHz. While this paper demonstrates the design principles using CMOS integrated circuits, the principle is general and can be applied to any type of circuit technology in integrated or discrete implementation. Moreover, the methods are easily automated as the principles are based on closed-form
Pak Kwong Chan 56. F. Xiao and P.K. Chan, “A Performance-Aware Low-Quiescent Quiescent Headphone Amplifier in
65nm CMOS”, IEEE Journal of Solid-State Circuits, vol. 52, no. 2, pp. 505-516, Feb. 2017. The paper presents the start-of-art headphone amplifier with low quiescent power dedicated to portable applications whilst providing good performance metrics in audio specifications. It demonstrates the best FOMs in the field.
57. K. C. Koay and P. K. Chan, “A Low Energy-Noise 65nm CMOS Switched-Capacitor Resistive Bridge Sensor Interface”, IEEE Trans. on Circuits & Systems, Part I, vol. 64, no. 4, pp. 799-810, April 2017.
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The paper presents the bridge sensor interface circuit architecture and techniques on the basis of switched-capacitor design approach to attain low-noise performance under low-energy constraint. It is particular suitable for portable or Internet-of-Things (IoT) applications.
Laleh Najafizadeh 58. Yi Huang and Laleh Najafizadeh, “A Precision SiGe Reference Circuit Utilizing Si and SiGe
Bandgap Voltage Differences,” IEEE Transactions on Electron Devices, Vol. 64 (2), pp. 392-399, 2017. Significance: This paper, by taking advantage of the presence of two types of pn junctions in SiGe technology, presents a novel approach for curvature compensation of SiGe reference circuits.
59. Tuan Le, Gabriel Salles-Loustau, P. Xie, Z. Lin, Laleh Najafizadeh, Mehdi Javanmard and Saman Zonouz, “Trusted Sensor Signal Protection for Confidential Point-of-Care Medical Diagnostic,” Accepted with Minor Revisions-IEEE Sensors Journal. Significance: This paper presents a new data protection scheme for cytometry-based point-of-care (POC) systems.
Andreas Demosthenous 60. D. Jiang, D. Cirmirakis, M. Schormans, T. Perkins, N. Donaldson, and A. Demosthenous (2016)
“An integrated passive phase-shift keying modulator for biomedical implants with power telemetry over a single inductive link,” IEEE Transactions on Biomedical Circuits and Systems, vol. 11, no. 1, pp. 64–77, Feb. 2017.
61. S. X. Wang, D. Acha, A.J. Shah, F. Hills, I. Roitt, A. Demosthenous, and R.H. Bayford, (2016) “Detection of the tau protein in human serum by a sensitive four-electrode electrochemical biosensor,” Biosensors and Bioelectronics, doi:10.1016/j.bios.2016.10.077
62. X. Liu, V. Valente, Z. Zong, D. Jiang, N. Donaldson, and A. Demosthenous, “An implantable stimulator with safety sensors in standard CMOS process for Active Books,” IEEE Sensors Journal, vol. 16, no. 19, pp. 7161-72, Oct. 2016.
Lei Zhang 63. Chuan Qin, Lei Zhang, Chunyuan Zhou, Li Zhang, Yan Wang, and Zhiping Yu, “Dual AC Boosting
Compensation Scheme for Multi-Stage Amplifiers,” IEEE Trans. Circuits Syst. II: Exp. Briefs, in press. Abstract: In this paper, a dual AC boosting compensation (DACBC) scheme is presented for multi-stage amplifiers with low power and large capacitive load. Dual AC boosting paths are introduced to move the zero from the right-half-plane to the left-half-plane as compared with conventional AC boosting (ACBC) scheme, which helps to improve the phase margin and gain bandwidth product (GBW) of the amplifier. Two three-stage amplifiers with DACBC and ACBC, respectively, are both fabricated in 65-nm CMOS technology for comparison. The amplifier with proposed DACBC drives a 3200pF——25kΩ load and achieves a GBW of 0.52MHz with 58◦ phase margin, consuming only
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60W of power from a 0.8V supply, while ACBC achieves 0.26MHz GBW with the same load, power consumption and phase margin. These results imply a doubled figure-of-merit (FoM) of DACBC versus its ACBC counterpart without extra power penalty, while the core chip area of DACBC is reduced by a half of that of ACBC due to a smaller compensation capacitance.
64. Dong Huang, Lei Zhang, Di Li, Li Zhang, Yan Wang and Zhiping Yu, “A 60 GHz 360° 5-bit Phase Shifter with Constant IL Compensation Followed by a Generic Amplifier with ±1 dB Gain Variation and 0.6 dBm OP-1dB,” IEEE Trans. Circuits Syst. II: Exp. Briefs, in press. Abstract: In this paper, a concise compensation technique to obtain constant insertion loss (IL) among different phase shifting states of mm-wave switch-type phase shifter (PS) is developed. The main idea is to introduce switches into the PS to align ILs of all phase states to the maximum, which hardly introduces additional phase variation, degrades IL flatness or deteriorates maximum IL. A 60 GHz 360° 5-bit switch-type phase shifter is designed with the proposed technique in a 65 nm CMOS technology. Measured results show that the IL variation among all 32 phase shifting states is within ±0.8 dB over 57-66 GHz, with a maximum RMS phase error of 8°, a gain tuning range of 8 dB and an input 1 dB power compression point (IP-1dB) of 13 dBm. The proposed phase shifter followed by a 60 GHz normal amplifier with invariable gain is also designed and verified. A maximum gain of 4 dB is achieved with a gain variation within ±1 dB over a 9 GHz bandwidth, an output 1 dB power compression point (OP-1dB) of 0.6 dBm, a maximum RMS phase error of 11.3° and a dc power consumption of 30 mW.
65. Jinwen Geng, Lei Zhang, Cheng Zhu, and He Qian, “An Oscillator-based CMOS Magneto-Sensitive Biosensor with In-Situ Switched Capacitor Calibration Scheme,” IEEE Microw. Wireless Compon. Lett., vol. 26, no. 8, pp. 640-642, Aug. 2016. Abstract: This letter presents a high sensitivity oscillator-based magneto-sensitive biosensor. To suppress the environmental variations, e.g., voltage vibration, temperature drift, and lower the noise floor, an in-situ switched capacitor (ISSC) based calibration scheme is proposed with little cost on on-chip area and complexity. As an implementation example, a biosensor cell is designed in a standard 180-nm CMOS process. The ISSC scheme achieves an extra 13.2 dB suppression on the effective noise floor. The magnetic sensing capability of the presented biosensor is verified, indicating the frequency shift from one single magnetic nano-particle (MNP) with 500 nm diameter is 138.5 Hz and the dynamic range of detection is at least 80 dB.
Gert Cauwenberghs 66. “Silicon-Integrated High-Density Electrocortical Interfaces,” S. Ha, A. Akinin, J. Park, C. Kim, H.
Wang, C. Maier, P. P. Mercier, and G. Cauwenberghs, Proceedings of the IEEE, vol. 105 (1), pp. 11-33, 2017.
67. “Energy Recycling Telemetry IC With Simultaneous 11.5 mW Power and 6.78 Mb/s Backward Data Delivery Over a Single 13.56 MHz Inductive Link,” S. Ha, C. Kim, J. Park, S. Joshi and G. Cauwenberghs, IEEE Journal of Solid-State Circuits, vol. 51 (11), pp. 2664-2678, 2016.
68. “Towards High-Resolution Retinal Prostheses with Direct Optical Addressing and Inductive Telemetry,” S. Ha, M.L. Khraiche, A. Akinin, Y. Jing, S. Damle, Y. Kuang, S. Bauchner, Y.-H. Lo, W.R. Freeman, G.A. Silva, and G. Cauwenberghs, Journal of Neural Engineering, vol. 13 (5), pp. 056008:1-19, 2016.
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Deukhyoun Heo 69. N. Tang; B. Nguyen; R. Molavi; S. Mirabbasi; Y. Tang; P. Zhang; J. H. Kim; P. Pande; D. Heo,
"Fully Integrated Buck Converter with Fourth-Order Low-Pass Filter," in IEEE Transactions on Power Electronics , no.99, pp.1-1, July 2016
70. P. Agarwal, S. P. Sah, R. Molavi, S. Mirabbasi, P. P. Pande, J.-H. Kim, and D. Heo, "Switched Substrate-Shield Based Low Loss CMOS Inductors for Wide Tuning Range VCOs", accepted, IEEE Transactions on Microwave Theory and Techniques, 2017.
71. Y. Tang, N. Tang, Z. Zhou, D. Heo, X. Wang, P. Liu and P. Zhang, “PWM-Skipping Technique for Overshoot and Undershoot Mitigation,” International Journal of Electronics Letters, pp. 1-7, Nov. 2016.
Mohamad Sawan 72. WATSON, M., SAWAN, M., DANCAUSE N., “The duration of Motor Responses Evoked with
Intracortical Microstimulation in Rats is Primarily Modulated by Stimulus Amplitude and Train Duration”, PLOS One, Vol. 11, No. 7, 2016. The effects of brain stimulation parameters on the responses they evoke remain widely unknown. Our findings suggest that motor cortex intracortical microstimulations are often conducted at a higher frequency rate and longer train duration than necessary to evoke maximal response duration. We demonstrated that the temporal properties of the evoked response can be both predicted by certain response metrics and modulated via alterations to the stimulation signal parameters.
73. MAGHAMI, M.H., SODAGAR, A., SAWAN, M., "Versatile Stimulation Back-End with Programmable Exponential Current Pulse Shapes for a Retinal Visual Prosthesis", IEEE Trans. on Neural Signals and Rehabilitation Engineering, Vol. 21, No. 11, 2016, pp.1243-1253. The traditional rectangular pulse shapes to drive massively parallel stimulation sites requires large power budget. We report in this paper Programmable Exponential Current Pulse Shapes to evoke responses. Duration of the generated current pulses is programmable within the range of 100 μs to 3 ms. Experimental results indicate that the stimuli generator meets expected requirements when connected to electrode-tissue impedance of as high as 25 kΩ.
74. NABOVATI, G., GHAFAR-ZADEH, E., LETOURNEAU, E., SAWAN, M., "Towards High Throughput Cell Growth Screening: A New CMOS 8x8 Biosensor Array for Life Science Applications", To appear in The IEEE Transactions on Biomedical Circuits and Systems, 2016. Monitoring cell growth viability remain a challenging task to achieve in point-of-care testing. We describe in this paper a low-cost platform for high-throughput cell growth monitoring. The proposed device consists of an array of 8 × 8 CMOS fully differential charge-based capacitive measurement sensors. We validate the chip functionality using various organic solvents with different dielectric constants. The experimental from H1299 (human lung carcinoma) cell line where we show that the chip successfully allows the detection of cell attachment and growth over capacitive electrodes.The capability of proposed device for label-free and real-time detection of cell growth opens up the opportunity for utilizing the device in rapid screening of living cells.
Jorge Fernandes 75. T. Rabuske, J. Fernandes, “A SAR ADC with a MOSCAP-DAC", IEEE Journal of Solid-State
Circuits, Vol:51 , N.6, pp. 1410 – 1422, June 2016 DOI: 10.1109/JSSC.2016.2548486
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76. F. Rabuske, T. Rabuske, J. Fernandes, “A 5-bit 300–900-MSps 0.8–1.2-V Supply Voltage ADC with Background Self-Calibration", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol: 64, N.1, pp 1-5, January 2017 (online March 2016) DOI: 10.1109/TCSII.2016.2547741
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Appendix 9: Selected Conference Publications (up to three)
Filippo Neri 1. IEEE SOCC conference 2016, (September 2016, Seattle, USA): “High-Voltage Low-Power Startup Backup
Battery Switch Using Low Voltage Devices in 28nm CMOS”, F. Neri, C. Keogh, T. Brauner, E. De Mey, C. Schippel.
2. IEEE SOCC conference 2016, (September 2016, Seattle, USA): “Design Challenges in a Low-Power Management Unit for a GNSS Receiver System in 28nm CMOS”, F. Neri, T.Brauner, E. De Mey, C. Schippel.Books and Book Chapters
Igor Filanovsky 3. I.M. Filanovsky, J. Jarvenhaara, and N.T. Tchamov, “On Moderate Inversion/Saturation Regions
as Approximations to ‘Reconciliation’ Model”, The 29th Annual IEEE Canadian Conference on Electrical and Computer Engineering, CCECE’2016, Vancouver, Canada, May 2016. A new transistor model is introduced.
4. Fouladi, J. Jarvenhaara, I. M. Filanovsky, and N.T. Tchamov, “A Variable Battery Supply DC-DC Buck Converter Designed for 45nm CMOS Technology”, The 29th Annual IEEE Canadian Conference on Electrical and Computer Engineering, CCECE’2016, Vancouver, Canada, May 2016. DC-DC converter for low-voltage transistors is proposed.
5. I. M. Filanovsky, L.B. Oliveira, V. Ivanov, “On Design of Memory Retention LDO Regulator”, The 14th International NEWCAS Conference, Vancouver, Canada, June 2016.
LDO regulator operating in subthreshold currents regime is proposed.
Tong Ge 6. T. Ge, J. Zhou and J. Chang, “Fully Additive Printed Electronics: A Localized Self-Compensation
Means to Compensate for Bending” International Symposium on Flexible and Stretchable Devices, May 2017
7. J. Zhou, T. Ge, and J. Chang, “Printed Electronics: Effects of Bending and a Self-Compensation Means” IEEE International Symposium on Circuits and Systems, US, May 2017
8. T. Ge, J. Zhou and J. Chang, “Review: a Fully-Additive Printed Electronics Process with Very-Low Process Variations (Bent and Unbent Substrates) and PDK” IEEE International Symposium on Circuits and Systems, US, May 2017
Jose M. de la Rosa 9. Morgado, R. del Rı́o and J.M. de la Rosa: “Design of a Power-Efficient Widely-Programmable Gm-
LC Band-Pass Sigma-Delta Modulator for SDR.” Proceeding of the 2016 International Symposium on Circuits and Systems (ISCAS), Montreal, May 2016.
This paper presents a widely-programmable Σ∆ modulator for RF-to-digital conversion implemented in 65-nm CMOS. The proposed loop-filter synthesis methodology and the use of inverter-based switchable transconductors allow to optimize the circuit performance in terms of robustness to circuit errors, stability and power consumption.
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10. M. Velasco-Jiménez, R. Castro-López and J.M. de la Rosa: “High-Level Optimization of Sigma-Delta Modulators Using Multi-Objective Evolutionary Algorithms.” Proceeding of the 2016 International Symposium on Circuits and Systems (ISCAS), Montreal, May 2016.
This paper presents a new synthesis methodology based on multi-objective evolutionary algorithms for the optimization of ΣΔ modulators. Compared to conventional approaches, it allows to explore a number of different design objectives simultaneously, thus leading to more efficient designs than conventional synthesis methods.
11. J.M. de la Rosa: “Design Guidelines of ∑∆ Modulators: From System to Chip and Application to Reconfigurable ADCs”. Proceeding of the 2016 IEEE Int. Conf. on Electron Devices and Solid-State Circuits (EDSSC), Hong Kong, August 2016.
This paper presents a tutorial guide for the design of reconfigurable ΣΔ converters intended for multi-standard wireless systems and software-defined-radio applications.
Ayman Fayed 12. Mina Mina Nashed and Ayman Fayed, “Spur-Free Current-Mode Hysteretic Boost Converter for
Noise-Sensitive Loads,” 2016 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi, UAE, Oct. 2016, pp. 93-96. This work presents a hysteretic boost converter with spur-free spectrum, thus enabling powering noise-sensitive loads.
13. Ahmed Abdelmoaty and Ayman Fayed, “Power Loss Analysis in Single-Step, Single-Inductor Energy-Harvesting-based Power Supplies,” 2016 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi, UAE, Oct. 2016, pp. 297-300. This work presents the analysis of losses in energy-harvesting platforms, thus enabling efficiency optimization.
14. Ahmed Abdelmoaty, Mohammad Al-Shyoukh, and Ayman Fayed, “A High-Voltage Level Shifter with Sub-Nano-Second Propagation Delay for Switching Power Converters,” 2016 IEEE Applied Power Electronics Conference (APEC), Long Beach, California, Mar. 2016, pp. 2437-2440. This works presents a technique for minimizing the delay of gate-drive signals in switching power converters to enable maximizing conversion efficiency.
Luis Hernandez 15. A. Quintero, F. Cardes, L. Hernandez, C. Buffa and A. Wiesbauer, "A Capacitance-to-Digital
Converter Based on a Ring Oscillator with Flicker Noise Reduction," 2016 Austrochip Workshop on Microelectronics (Austrochip), Villach, 2016, pp. 40-44.
Nathan Neihart 16. B. Montgomery, Y. Li, and N. M. Neihart, “Analysis and utilization of planar baluns for dual-band
push-pull power amplifiers,” ISCAS 2017
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17. S. Oren, et al., “Tracking of water movement dynamics inside plants using leaf surface humidity sensors,” IEEE Intl. Conference on Nano/Micro Engineered and Molecular Systems, 2017.
18. Y. Li, B. Montgomery, and N. M. Neihart, “Development of a concurrent dual-band switch-mode power amplifier based on current-switching class-D configurations,” IEEE Wireless and Microwave Technology Conference, pp, 1-4m 2016.
Paul P. Sotiriadis 19. C. Basetas, P. P. Sotiriadis, “The Class of 1-bit Multi-Step Look-Ahead SD Modulators and Their
Applications”, ΙΕΕΕ Int. Conf. on Modern Circuits and Systems Technologies 2017. The class of 1-bit Multi-Step Look-Ahead (MSLA) Sigma-Delta modulators is presented improving upon the stability and noise shaping characteristics of conventional 1-bit SD modulators. The performance of MSLA modulators for various design parameter values is investigated, highlighting their advantages in a multitude of applications like digital transmitters, class-D power amplifiers and DACs.
20. D. Baxevanakis, P. P. Sotiriadis, “A 1.8V CMOS Chopper Four-Quadrant Analog Multiplier”, ΙΕΕΕ Int. Conf. on Modern Circuits and Systems Technologies 2017. An integrated, low-noise, chopper-stabilized, four-quadrant analog multiplier, intending to serve as an autonomous IC block for low frequency signal processing, is presented. It is designed in TSMC 0.18 μm CMOS technology.
21. C. Dimas, P. Tsampas, N. Ouzounoglou, P. P. Sotiriadis, “Development of a Modular 64-Electrodes Electrical Impedance Tomography System”, ΙΕΕΕ Int. Conf. on Modern Circuits and Systems Technologies 2017. A modular Electrical Impedance Tomography system with 64 electrodes was built for biomedical applications. An E/M solver was developed in MATLAB to derive the conductivity pattern of the measured 2D circular object.
Shahriar Mirabbasi 22. A., Masnadi, H.Lavasani, M. Sharifzadeh, Y. Rajavi, S.Mirabbasi, and M. Taghivand, “A 980μW
5.2dB-NF Current-Reused Fully Integrated Direct-Conversion Bluetooth-Low-Energy Receiver in 40nm CMOS,” IEEE Custom Integrated Circuits Conference, Austin, TX, April 31–May 3, 2017.
This paper presents several circuit- and system-level techniques for implementing fully integrated direct-conversion receivers for Bluetooth low energy in CMOS.
23. Y. Luo and S. Mirabbasi, “A CMOS Pixel Design with Binary Space-time Exposure Encoding for Computational Imaging,” IEEE Custom Integrated Circuits Conference, Austin, TX, April 31–May 3, 2017.
A CMOS pixel design targeting to spatial-temporal exposure encoding based computational imaging is presented. By integration of selective charge storage units and exposure code memories to an APS structure, the pixel design performs intermittent exposure according to the received binary exposure codes. This pixel design provides a promising path to achieve focal-plane space-time exposure encoding in CMOS image sensors for the needs of computational imaging applications.
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24. A.H. Masnadi Shirazi, A. Nikpaik, S. Mirabbasi, and S. Shekhar, “A Quad-Core-Coupled Triple-Push 295-to-301GHz Source with 1.25mW Peak Output Power in 65nm CMOS Using Slow-Wave Effect,” IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, San Francisco, CA, May 22–18, 2016.
In this work, an architecture for coupled terahertz (THz) VCOs is presented. The architecture utilizes four coupled triple-push VCOs and combines the generated third harmonic currents using slow-wave coplanar waveguide (S-CPW) at 300 GHz. Coupling four cores increases output power, and use of S-CPW reduces the loss and increases the quality factor of the VCO tank. It is shown that using S-CPW results in ~2.6 dB of lower loss as compared to the conventional CPW or grounded-CPW (GCPW) structures. The VCO is tuned using parasitic tuning technique and achieves 1.7% frequency tuning range (FTR).
Joseph S Chang 25. Q Liu, V. Adrian, BH Gwee and J. Chang‘A Class-E RF Power Amplifier with a Novel Matching
Network for High-Efficiency Dynamic Load Modulation’ IEEE International Symposium on Circuits and Systems, Baltimore, USA May 2017
26. Y. Sun, V. Adrian and J. Chang A Novel High-Rate Hybrid Window ADC Design for Monolithic Digitally-Controlled DC-DC Converters IEEE International Symposium on Circuits and Systems, Baltimore, USA May 2017
27. K.S. Chong, W.G. Ho, B.H. Gwee and J. Chang ‘Sense Amplifier Half-Buffer (SAHB): a Low-Power High-Performance Asynchronous Logic QDI Cell Template’ IEEE International Symposium on Circuits and Systems, Baltimore, USA, May 2017
Luis Oliveira 28. M. D. Fernandes, L. B. Oliveira and J. Goes, "Wideband Noise Cancelling Balun LNA with
Feedback Biasing," IEEE International Symposium on Circuits and Systems (ISCAS’16), May 2016. 29. I.M. Filanovsky, L.B. Oliveira, “Using “Reconciliation” Model for Calculation of Harmonics in a MOS
Transistor Stage Operating in Moderate Inversion”, IEEE Symposium on Circuits and Systems, ISCAS’2016, Montreal, Canada, May 2016.
30. I.M. Filanovsky, L.B. Oliveira, V. Ivanov, “On design of Memory Retention LDO Regulator”, The 14th IEEE International NEWCAS Conference, Vancouver, June, 2016
Roberto Gómez-García 31. R. Gómez-García, D. Psychogiou, and D. Peroulis, “Reconfigurable single/multi-band planar
impedance transformers with incorporated bandpass filtering functionality,” in 2016 IEEE MTT-S Int. Microw. Symp., San Francisco, CA, USA, May 22-77, 2016.
Demonstration of the first multi-function RF device with simultaneous impedance transformation and multi-band filtering operation. Furthermore, the filtering power-matching bands can be tuned and spectrally merged to control the number of them being active. This results in a state-of-the-art multi-function device with high levels of spectral adaptivity.
32. R. Gómez-García and A. C. Guyette, “Two-branch channelized passive filters for lowpass and bandpass applications,” in 2016 IEEE MTT-S Int. Microw. Symp., San Francisco, CA, USA, May 22-77, 2016.
Design of frequency-static and reconfigurable filtering devices with the congregation of lower-order channels. It allows more compact implementations and added functionalities (in-band and out-of-band adaptive-notch creation for interference mitigation) than other solutions.
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33. M. Addou, R. Hijazi, R. Gómez-García, B. Barelaud, B. Jarry, and J. Lintignat, “Two-branch channelized N-path filter for reconfigurable receiver,” in 2016 IEEE Int. Electron., Circuits Syst. Conf., Monte Carlo, Monaco, Dec. 11-14, 2016.
Design of N-path channelized filters for higher-selectivity realizations and reconfigurable integrated receivers. It can result in a considerable reduction in terms of size and power consumption when compared to current solutions based on integrated filter banks.
Wouter A. Serdijn 34. Gustavo Campos Martins and Wouter A. Serdijn: Adaptive Buck-Boost Converter for RF Energy
Harvesting and Transfer in Biomedical Applications, proc. 2016 IEEE Biomedical Circuits and Systems Symposium (BioCAS'2016), Shanghai, China, Oct. 17-19, 2016. Optimizing of an RF energy harvester requires proper loading of the (single-stage) rectifier and accommodating a large range of input power levels. This paper shows how this can be done and how a high power efficiency can be maintained of a 3-decade input power range.
35. Athanasios Karapatis, Robert Mark Seepers, Marijn van Dongen, Wouter A. Serdijn, Christos Strydis: Balancing Accuracy, Delay and Battery Autonomy for Pervasive Seizure Detection, proc. 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC 2016), Orlando, Florida, USA, August 16-20, 2016. Real-time wavelet-based signal detection trades power consumption and detection delay for detection accuracy. The joint optimization is discussed in this paper and a working example is presented.
Robert Bogdan Staszewski 36. E. Charbon, F. Sebastiano, M. Babaie, A. Vladimirescu, M. Shahmohammadi, R. B. Staszewski, H.
A.R. Homulle, B. Patra, J. P.G. van Dijk, R. M. Incandela, L. Song, and B. Valizadehpasha, “Cryo-CMOS circuits and systems for scalable quantum computing,” Proc. of IEEE Solid-State Circuits Conf. (ISSCC), 7 Feb. 2017, sec. 15.5, pp. 264–265, San Francisco, CA, USA. DOI: 10.1109/ISSCC.2017.7870362.
Proposed and demonstrated CMOS circuitry operating at cryogenic temperatures (4K) for a quantum computer. Specific circuits include an LNA, oscillator, single-photon avalanche diode.
37. Y. Wu, M. Shahmohammadi, Y. Chen, P. Lu, and R. B. Staszewski, “A 3.5–6.8GHz wide-bandwidth DTC-assisted fractional-N all-digital PLL with a MASH ΔΣ TDC for low in-band phase noise,” Proc. of IEEE European Solid-State Circuits Conf. (ESSCIRC), 13 Sept. 2016, sec. A3L-J4, pp. 356–359, Lausanne, Switzerland. DOI: 10.1109/ESSCIRC.2016.7598279.
Proposed and demonstrated a wideband frequency synthesizer for wireless cellular applications with almost an octave tuning range.
38. C.-C. Li, T.-H. Tsai, M.-S. Yuan, C.-C. Liao, C.-H. Chang, T.-C. Huang, H.-Y. Liao, C.-T. Lu, H.-Y. Kuo, K. Hsieh, M. Chen, A. Ximenes, and R. B. Staszewski, “A 0.034mm, 725fs rms jitter, 1.8%/V frequency-pushing, 10.8–19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS,” Proc. of IEEE Symp. on VLSI Circuits (VLSI), 17 June 2016, sec. 22.5, pp. 240–241, Honolulu, HI, USA. DOI: 10.1109/VLSIC.2016.7573551.
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The first ever publication of electronic circuits in 10nm FinFET CMOS technology.
George Yuan 39. Chao WU, and Jie YUAN, “A 7bit 800MS/s SAR ADC with background offset calibration”, IEEE
International Symposium on Circuits and Systems , pp. 1038-1041, Montreal, May, 2016 This paper introduced a new technique to enable high speed mid-resolution ADC.
40. Yaguang ZHU, and Jie YUAN, “An on-chip Para-C calibration architecture for successive approximation ADC”, IEEE International Symposium on Circuits and Systems, pp. 1478-1481, Montreal, May, 2016 This paper introduced a new technique to escape the capacitor matching requirement for high resolution SAR ADC array.
D. Brian Ma 41. X. Ke, K. Wei, D. Ma, “A 10MHz, 40V-to-5V Clock-Synchronized AOT Hysteretic Buck Converter
with Programmable Soft Start Technique for Automotive USB Chargers”, IEEE Applied Power Electronics Conference & Exposition (APEC), pp. 2146-2149, Tampa, FL, Mar. 2017.
42. Y. Chen, X. Ke, D. Ma, “Integrated Isolated Power Converter Using Active Rectification and Closed-Loop CRM Control for Secondary Side Regulation in E-Meters”, IEEE Applied Power Electronics Conference & Exposition (APEC), pp. 3432-3435, Tampa, FL, Mar. 2017.
43. B. Lee, M. Song, D. Ma, “On-Chip On-Chip Inductor DCR Self-Calibration Technique for High Frequency Integrated Multiphase Switching Converters”, IEEE Applied Power Electronics Conference & Exposition (APEC), pp. 2449-2452, Tampa, FL, Mar. 2017.
Thierry Taris
44. J. Zaini, F. Hameau, T. Taris, P. Audebert, D. Morche, E. Mercier, “Channel Aware Receiver Front End For Low Power Low Range 2.4 GHz Applications”, IEEE Northeast Workshop on Circuits and Systems (NEWCAS2016), Vancouver, Canada, June 2016, pp. 77-80 This paper estimates the improvement of power consumption in a sensor node featuring an adaptive RF Front End in the Rx module.
45. J. Nicot, T. Taris “RF Remote Powering of Ambient Sensors”, IEEE International Conference on Electronics, Circuits and Systems (ICECS2016), Monte-Carlo, Monaco, Dec. 2016, pp. 818-821 Demonstration of a RF remote powered sensor node for ambient sensing. The circuit is developed on COTS devices only combined with customized rectenna and radio.
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Gordon Roberts 46. G. W. Roberts, “Mixed-Signal ATE Technology and its Impact on Today’s Electronic System
Platform” 2016 IEEE International Test Conference, Fort Worth, TX, Nov. 2016. Analog/Mixed-Signal test is usually thought of as a quality control step in the manufacture of electronic devices – largely to separate good devices from bad. In this paper, the case is made that analog/mixed-signal semiconductor test technology has been at the forefront of many of today’s analog SOC design approaches. This is most likely quite opposite to what most engineers think about test. The reason is quite simple – analog test engineers are concerned with a multitude of design issues that span across many different engineering domains such as mechanical, electrical, electronic, firmware and software. Moreover, they have always been pressed to achieve accurate measurements in near minimum time. As a result, analog test engineers have always had their eye on the big picture and created test solutions decades ago that would rival any analog system platform today. This paper will take a look to the past and see how test technology has impacted present-day system approaches such as those used in data communications, general purpose analog signal processing, etc..
47. A. Gordon, C. Fayomi and G. W. Roberts, “Low-Cost Trimmable Manufacturing Methods for Printable Electronics,” 2016 IEEE International Circuits and Systems Conference, Montreal, Canada, May 2016. While printable electronics (PE) has the potential to provide a low cost means to manufacture electronic solutions, it suffers serious levels of component variations. While many of the problems facing PE are early technological development yield-related problems, some are more fundamental to its manufacturing nature. In this work, methods to construct PE circuits that compensate for these variations will be described. These methods include a combination of printing, severing, and ink deposition techniques that are performed both during and after manufacturing. Data obtained from working prototypes made using the PE technology at the National Research Council (NRC) of Canada will be described.
48. Y. Li and G. W. Roberts, “Design of High-Order Type-II Delay-Locked Loops Using A Gaussian Transfer Function Approach,” 2016 IEEE International Circuits and Systems Conference, Montreal, Canada, May 2016. In this paper, a method of designing high-order DLLs is presented and verified through both simulations and physical experiments. The general approach is based on selecting the transfer function of the closed-loop DLL and deriving the loop filter behavior based on the gain of the phase-detector and voltage-controlled delay line. The proposed approach does not rely on the principle of design based on achieving a desired phase margin specifications but rather is based on selecting a closed-loop DLL behavior based on a desired Gaussian transfer function. Experimental results are provided to support the claims.
Yannis Syllaios
49. I.L. Syllaios, ”Hybrid-DPLL-based Constant-Envelope Modulator for Internet-of-Things Chipsets", in Proc. IEEE International Symposium on Circuits and Systems (ISCAS): Special session on Digitally Intensive Frequency Synthesis for Internet of Things Applications, May 2017 (to appear).
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Laleh Najafizadeh 50. Yi Huang and Laleh Najafizadeh, “A Wirelessly Tunable Low Drop-out Regulator for Subcutaneous
Muscle Prosthesis,” in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS’16), Montreal, Canada, May 2016, pp. 850-853. Significance: This paper presents a new design technique to implement wirelessly tunable low-dropout regulators (LDOs) for electrical stimulation of ionic electroactive polymers (iEAPs).
51. Ali Haddad and Laleh Najafizadeh, “Multi-scale analysis of the dynamics of brain functional connectivity using EEG,” in Proc. of The IEEE International Conference on Biomedical Circuits and Systems (BioCAS’16), Shanghai, China, Oct. 2016, pp. 240-243. Significance: This paper presents a new approach to investigate the dynamics of functional connectivity at multiple temporal scales from the recordings obtained through electroencephalography (EEG).
52. Yi Huang, Daniel Browe, Sanjeevi Thirumurugesan, Joseph Freeman, and Laleh Najafizadeh, “In vitro characterization of electronically stimulated ionic electroactive polymers with application to muscle prosthesis,” in Proc. of The IEEE International Conference on Biomedical Circuits and Systems (BioCAS’16), Shanghai, China, Oct. 2016, pp. 428-431. Significance: This paper presents measured results of in vitro characterization of biocompatible ionic electro-active polymers (iEAPs) under different electrical stimulation scenarios.
Andreas Demosthenous 53. E. Pilavaki, C. Parolo, R. McKendry, and A. Demosthenous, “Wireless paper-based biosensor
reader for the detection of infectious diseases at the point of care,” 2016 IEEE SENSORS
54. V. Valente, D. Jiang, and A. Demosthenous, “Dual-mode CMOS analog front-end (AFE) for electrical impedance spectroscopy (EIS) systems,” 2016 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC)
55. V. Kitsos, S. West, A. Demosthenous, and X. Liu, “Design considerations and optimization of calorimetric flow sensor for respiratory monitoring,” 2016 IEEE Biomedical Circuits and Systems Conference (BioCAS)
Lei Zhang 56. Chuan Qin, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu, “An 5-GHz Inductor-Noise Cancelling
Receiver with 1.8 dB Noise Figure in 65nm LP CMOS,” IEEE Radio-Frequency Integr. Circuits Symp. (RFIC), San Francisco, CA, U.S.A., May 2016. Abstract: In this paper, a novel receiver architecture with inductor-noise cancellation technique is presented. The proposed receiver employs two separate down-conversion paths driven by I/Q LOs respectively, and the noise of on-chip gate inductor of common-source LNA is cancelled at the baseband output, without additional penalty on power consumption, while the signal is in-phase and strengthened. The noise figure is therefore significantly improved versus prior arts. A demo 5-GHz receiver employing the proposed architecture is designed and implemented in a 65-nm low power CMOS process. Measured result shows a noise figure of 1.8 dB at 5 GHz band, while consuming only 95 mW of power from a 1.2 V supply.
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57. Dongyang Yan, Lei Zhang, Li Zhang, and Yan Wang, “A 3.1-4.2GHz Automatic Amplitude Control
Loop VCO with Constant KVCO and <10mV Amplitude Variation,” IEEE Int. Symp. Circuits Syst. (ISCAS), Montreal, Canada, May 2016. Abstract: This paper presents an automatic amplitude control (AAC) loop voltage controlled oscillator (VCO) with a constant VCO gain (Kvco) for fractional-N frequency synthesizers in WLAN application in 65nm CMOS process. A novel AAC scheme based on a mixed-signal feedback loop has been proposed to minimize the amplitude variation. In order to achieve a low Kvco variation, an extra switched varactor array is also introduced to the LC tank together with the conventional switched capacitor array. The VCO achieves a tuning range of 23.7% from 3.1 to 4.2GHz, while consuming 4.6mA of quiescent current from a 1.2V power supply. The peak amplitude variation over the entire frequency range is less than 10mV, which can be otherwise as large as 100mV, or 22.2% without the AAC loop. The VCO shows a nearly constant Kvco of 60MHz/V, a low phase noise of -123.3dBc/Hz at 1 MHz offset, and a superior FoM of -187dBc/Hz from a 3.6 GHz carrier.
58. Xinxin Zhu, Lei Zhang, Yan Wang, and Zhiping Yu, “A 66-to-76GHz E-band QPLL with Amplifier Feedback QVCO in 65-nm CMOS,” IEEE Int. Conf. Electron Devices Solid-State Circuits (EDSSC), Hong Kong, China, Aug. 2016. Abstract: A fully integrated 66-76GHz E-band low phase noise quadrature phase-locked loop (QPLL) is proposed. The quadrature voltage-controlled oscillator (QVCO) with a symmetrical coupling network formed by diode-connected transistors is used to reduce the phase error. In order to improve the oscillation frequency and reduced the phase noise, a feedback network composed of buffer amplifiers and capacitors is introduced to the QVCO. The wide locking-range divider chain of PLL consists of an injection-locked frequency divider (ILFD) with a 3-bit binary-weighted switch-capacitor bank, current mode logic (CML) dividers, and a multiple modulus divider (MMD). The proposed circuit was designed in a 65-nm CMOS process, and the QVCO achieves a tuning range of 16.4% from 66GHz to 76GHz with a phase noise of -97dBc/Hz at 1MHz offset while consuming only 12.5mW. The QPLL achieves an excellent phase noise of -93.2 dBc/Hz at 1MHz offset, consuming 37.1mW of power and with a FoM of -174.4dBc/Hz.
Deukhyoun Heo 59. S. N. Ali, P. Agarwal, S. Mirabbasi and D. Heo, "A 42-46.4% PAE Continuous Class-F Power
Amplifier with Cgd Neutralization at 26-34 GHz in 65 nm CMOS for 5G Applications" in IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Honolulu, Hawaii, USA, 4-6 June 2017. [accepted]
60. S. N. Ali, P. Agarwal and D. Heo, "Reconfigurable High Efficiency Power Amplifier with Tunable Coupling Coefficient Based Transformer for 5G Applications", in IEEE MTT-S International Microwave Symposium, Honolulu, Hawaii, USA, 4-9 June 2017. [accepted]
61. J. Baylon, S. N. Ali, P. Agarwal, S. Gopal, D. Heo, "Current Reuse Triple-Band Signal Source for Multi-Band Wireless Network-on-Chip" in IEEE MTT-S International Microwave Symposium, Honolulu, Hawaii, USA, 4-9 June 2017 [accepted].
Mohamad Sawan 62. CHAMPAGNE PO., NGUYEN DK., CARMANT L., BOUTHILLIER A., SANON NT., SAWAN M.,
“Behavior of Superparamagnetic Nanoparticles in Regard of Brain Activity – a Proof of Concept”, IEEE-EMBC, Orlando, USA, August 2016.
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In order to locate Epileptic seizure foci, we proposed in this paper a novel method based on nanoparticles which can be manipulated by the Superparamagnetic forces delivered by the seizure.
63. SAHA, S., LESAGE, F., SAWAN, M., “High-Voltage Pulse Generator with Variable Delay for Ultrafast Gating of Single Photon Detector”, IEEE - Latin American Symposium on Circuits and Systems (LASCAS), Florianopolis, Brazil, February 2016. In order to improve clinical neuroimaging using fNIRS, we proposed novel protocol and corresponding system design to collect photons received from deeper side of the brain and count them to convert the readings to images.
64. LI, N., OSBORN, M., FANG, L., SAWAN, M., “Using Template Matching and Compressed Sensing Techniques to Enhance Performance of Neural Spike Detection and Data Compression Systems”, IEEE-ISCAS, Montreal, Canada, May 2016. In order to increase the channel number and the data rate per channel, we reported in this paper novel compressive sampling technique.
Jorge Fernandes 65. G. Nogueira, J. Fernandes, G. Tavares,”A Reconfigurable Calibration Method for Current-Steering
DACs”, IEEE Conference on PhD Research in Microelectronics and Electronics, June 2016.
66. H. Gonçalves, F. Rabuske, D. Santos, J. Fernandes, “A 4-nW Voltage Sensor with Configurable Hysteresis for RF Harvesters”, IEEE Conference on PhD Research in Microelectronics and Electronics, June 2016.
67. D. Caetano, J. Fernandes, M. Piedade, “A Multibias DAC for a Cortical Microelectrode Stimulator”, IEEE Conference on PhD Research in Microelectronics and Electronics, June 2016.
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Appendix 10: Books and Book Chapters
Tertulien Ndjountche 1. Tertulien Ndjountche, Digital Electronics 1: Combinational Logic Circuits, ISTE-John Wiley,
Hoboken, NJ, USA, 2016, ISBN: 978-1-11931-864-4. 2. Tertulien Ndjountche, Digital Electronics 2: Sequential and Arithmetic Logic Circuits, ISTE-John
Wiley, Hoboken, NJ, USA, 2016, ISBN: 978-1-84821-985-4. 3. Tertulien Ndjountche, Digital Electronics 3: Finite-state Machines, ISTE-John Wiley, Hoboken, NJ,
USA, 2016, ISBN: 978-1-11937-114-4.
Help understand various digital building blocks used in mixed-signal integrated-circuit design.
Roberto Gómez-García
4. J.-M. Muñoz-Ferreras, R. Gómez-García, and C. Li, “Human-aware localization using linear-frequency-modulated continuous-wave radars,'' in Principles and Applications of RF/Microwave in Healthcare and Biosensing, edited by C. Li, M.-R. Tofighi, D. Schreurs, and T.-S. J. Horng, Elsevier, 2016, pp. 191-239. Significance: Detailed review of the application of linear-frequency-modulated continuous-wave radars to biomedical applications, such as tracking of vital signs (breathing and heartbeat). It contributes to the area of non-contact sensors for healthcare scenarios.
Wouter A. Serdijn
5. Chutham Sawigun and Wouter A. Serdijn: Analog IC Design Techniques for Nanopower Biomedical Signal Processing, The River Publishers Series in Biomedical Engineering, ISBN: 9788793379299, May 2016. There is no reason to be afraid of weak-inversion analog integrated circuits. This book discusses several ultra low-power circuit techniques that can be used in the signal chain of various types of biomedical analog and mixed mode circuits and systems.
Robert Bogdan Staszewski
6. M. Alavi, J. Mehta, and R. B. Staszewski, Radio-Frequency Digital-to-Analog Converters – Implementation in Nanoscale CMOS, Elsevier / Academic Press, 302 pages, ISBN: 978-0-12-802263-4 (eBook: 978-0-12-802503-1), 26 Oct. 2016. Radio-frequency digital-to-analog converter (RFDAC) is becoming a hot topic for efficiently implementing a transmitter in nanoscale CMOS.
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D. Brian Ma
7. D. Ma, L. Chen, “Control of Integrated Switched-Capacitor Power Converters”, Control Circuits in Power Electronics: Practical Issues in Design and Implementation (Editor: M. Castilla), IET Press, 2016.
8. D. Ma, Y. Lu, “Power Management Circuit Design for IoT Nodes”, Enabling the Internet of Things – from Circuits to Networks (Editor: M. Alioto), Springer, 2017.
Jose Silva-Martinez
9. “Introduction to Electronic Circuits-A Design Oriented Approach,” (Textbook for Undergraduates) Jose Silva-Martinez and Marvin Onabajo, Contract has been signed with World Scientific Publishing Company; to be published, Fall 2017.
10. Qiyuan Liu, Alexander Edward, Carlos Briseno-Vidrios and Jose Silva-Martinez, Design Techniques for MASH Continuous-Time Delta-Sigma Modulators," Springer, New York, NY. Book, 250 pages, To be published August 2017.
11. Haoyu Qian, Suraj Prakash and Jose Silva-Martinez, "Power Efficient CMOS Power Amplifiers for Wireless Applications," CRC Press, Book Chapter of book entitled: "wireless circuits and systems," to be published Summer 2017.
Lei Zhang
12. Lei Zhang and Zhiping Yu, RF Microelectronics, 2nd Edition (Translation of Behzad Razavi, RF Microelectronics, 2nd Edition, Prentice Hall, in Chinese), Electronic Industry Press, Beijing, in press.
13. Prof. Lei Zhang accomplished the translation of the classic textbook “RF Microelectronics, 2nd Edition” by Prof. Behzad Razavi in Chinese, to spread the recent RFIC knowledge and design technologies to students and technical readers in China
