Design of 5.8 GHz Dielectric Resonator Oscillator Applied in Electronic Toll Collection

Bing Sun1,Yiqiang Wu1,Bin Luo1,Guoping Du2 Institute of Information Engineering

Nanchang University Nanchang 330031, China

sunbing2007@hotmail.com

Abstract—In the Electronic Toll Collection (ETC) application, the Dielectric Resonator Oscillator (DRO) must exhibit low phase noise in order to meet Bit Error Rate requirements. It also should provide enough output power to directly drive the mixer. This paper designs the DRO in the 5.8GHz by Negative Resistance theory and Harmonic Balance theory with use of Agilent Advance Design System (ADS) tool. The dielectric resonator is modeled as a package of cResP in ADS. After the simulation and optimization of the nonlinear models of the DRO, the satisfying result was found. At @5.8GHz, the output power was exhibited exceed 10dBm, Phase noise was less than -95dBc.

Keywords-dielectric resonator oscillator; negative resistance; Agilent advance design system (ADS)

I. INTRODUCTION Dielectric Resonator Oscillator (DRO) has potential

advantages for integrated oscillators in microwave frequencies. Today, millimeter-wave and microwave systems require oscillators with low phase noise and excellent frequency stability. Low phase noise and excellent frequency stability resonator have been used as the frequency stability element of communication system. DRO has essentially advantages compared with other resonators, because of good temperature stability and assembling.

Many new ways to improve Dielectric Resonator Oscillator phase noise have been proposed [1-3]. There were the new developments using dielectric resonators assembled on monolithic microwave integrated circuits. They represent a good compared to alternative signal sources such as cavity oscillators, microstrip oscillators or multiplied crystal oscillators.

In this paper, a 5.8GHz DRO is presented. It has a common-source topology with a dielectric resonator (DR) puck and the parallel microstrip lines are represented in the form of double coil transformer. With the use of high Q dielectric resonator, excellent phase noise and temperature stability can be achieved. The DR puck is activated at its

01TE δ resonant mode. Compared with the other DRO

design [2], the cavity effect on the unloaded Q factor of the

DR puck has been considered and simulated by cResP package, with the accuracy of the resonant frequency being improved. The soft of Advanced Design System of the Agilent will be used in the nonlinear analyses and the optimization design of the DRO (5.8GHz). A prototype DRO is constructed and the measurement results are given.

II. DIELECTRIC RSEONATOR OSCILLATOR DESIGN PROCESS A feedback type oscillator circuit was used in order to

miniaturize the middle power oscillator. It was easy to debug the circuit of oscillator to proper results. The block diagrams of the oscillator show in Fig.1 and Fig.2. The active component is GaAs MESFET. It consists of a resonator network, a feedback element, a bias, and a matching network [4, 5]. The matching circuit was used to minimize the frequency fluctuation by change of the load impedance.

Figure 1. Block diagram of the FET DRO

Project supported by National Natural Science Foundation of China (Grant No. 60661001)

U.S. Government work not protected by U.S. copyright

Figure 2. Block diagram of the negative resistance DRO

Process shown:

• Choose the appropriate GaAs MESFET and circuit such as common drain or common source circuit. Negative feedback network was up to gate

in 1Γ > in GaAs MESFET, FET is instability states.

• Debug output matching circuit for the stability state:

0in LR R+ = , (1)

0in LX X+ = , (2)

• DR simulate by cResP package.

• Big signal simulated and optimized by ADS.

III. DIELECTRIC RESONATOR CONSTRUCTION DR is the frequency-determining element of the DRO [6].

It is made of the material with high dielectric constant, high Q factor, and low temperature coefficient. The most frequently used DR shapes are disc and puck since they can be easily manufactured than other shapes.

A DR puck with diameter of 9.02mm, thickness of 5.29 mm, and dielectric constant of 36 is used in current design. It is housed in a copper cavity. The DR puck is closely positioned to two 50Ohm-straight-microstrip lines which is terminated with a resistor to avoid spurious oscillation. The coupling between the DR and the microstrip line can be electrical modeled into parallel RLC circuit. The values of the RLC circuit are calculated using ADS, which are R=700Ohm, L=0.003314nH, and C=226.154428pF; R, L, and C are the parallel resistance, inductance and capacitance of the equivalent circuit, respectively. The resonant frequency 0f :

01fLC

= (3)

The coupling coefficient between the resonator and the microstrip lines is represented by the turn-ratio, which made up the dielectric resonator simulated in ADS.

IV. DIELECTRIC RESONATOR OSCILLATOR DESIGN

A. Analysis on Start-up Condition for the DRO On the basis of negative resistance theory, the DRO is

designed to make the resistance generated by the feedback element negative enough to compensate the loss generated by the resistance. As a rule of thumb, at least 1.2 times of the load resistance is required by the negative resistance in a negative circuit in order to satisfy the start-up condition for the oscillator [5].

The super low noise Agilent-ATF13786, is employed here as the active device for the present DRO. The bias point is set at DSV 3V= and DSI 40mA= with the passive self-bias circuit, and the matching network is implemented with single stub line circuit. The design is realized by the DC simulator and the impedance matching modules in ADS.

It is simulated and optimized by simulator ADS with feedback element add [6]. A portion of open stub line with electrical length of 126°is attached to the source port. The simulation results show that the magnitudes of 11S and 22S have been increased to 1.65 and 1.67, respectively, which are larger than 1, and the stability factor has been decreased to 0.99, which is less than 1, indicating potentially unstable performance. The electrical length of the open stub line is optimized to 145°, to ensure the magnitudes of 11S and 22S being at least 1.2 to generate adequate negative resistance and the locus being symmetrically centered on the oscillating frequency, as shown in Fig.3.

3 4 5 6 7 8 92 10

-0.5

0.0

0.5

1.0

1.5

-1.0

2.0

freq, GHz

mag

(S(1

,1))

m2

mag

(S(2

,2))

Stab

Fact

1

m3

m2freq=mag(S(1,1))=1.654

5.800GHzm3freq=StabFact1=-0.992

5.800GHz

Figure 3. Magnitude of 11S (upper), magnitude of

2 2S (middle) and

stability factor (lower) of Agilent-ATF13786 with 145°open stub line

With the feedback element and matching network added, the constant and maximum power transfer between the source and the load is achieved, and the oscillating condition can be obtained.

B. Nonlinear Analysis After every component in dielectric resonator oscillator

circuit has been calculated and verified, the final design of dielectric resonator oscillator has been constructed as shown in Fig.4.

V_DCSRC2

CC1

MRSTUBStub2

MLINTL8

MTEETee7

MLINTL9MTEE

Tee9

MLOCTL12

MSTEPStep2

OscPortOsc1

Bend2

RR1

MSUBMSub1

MSub

HarmonicBalanceHB1

HARMONIC BALANCE

TFTF2

TFTF3

MLINTL1

MSABND_MDSBend1

MRSTUBStub3

MLINTL10

MTEETee8

MLINTL11

MLINTL3

MTEE_ADSTee2

MLINTL5

MLINTL6

MTEETee10

MLOCTL13

CC4

MLINTL14

RR2

CC2

MLINTL2

cResPRLCp1

MTEE_ADSTee3

CC3

ph_hp_ATF36077_19940627X1

Figure 4. Dielcctiric resonator oscillator’s nonlinear simulation in ADS

Phase noise is an important parameter in oscillator design. Many researches have been done to reduce it [8-10]. According to Lesson’s mode [1], the loaded Q factor LQ is one of the main causes resulting in phase noise. In order to achieve low phase noise, LQ is optimized in our design.

Because LQ is affected by the choice of the active device, the operating bias point, the supporting circuit components, the unloaded Q factor of the resonator, and even the pushing figure, all the related parameters in nonlinear model have to be fine adjusted in order to achieve minimum phase noise, sufficient output power, and good frequency stability.Fig.5 shows the simulation results for the DRO.

1 2 3 4 5 60 7

-200

-150

-100

-50

0

-250

50

harmindex

dBm

(Vou

t)

Power Harmonics from the nonlinear simulation

(a)

1E2 1E3 1E4 1E51E1 1E6

-100

-80

-60

-40

-20

-120

0

noisefreq, Hz

pnm

x, d

Bc

Phase noise from the nonlinear simulation

(b)

Figure 5. Simulation results: (a) output specturm (15.7dB at harmonic index 1) and (b) phase noise (-98.7dBc/Hz @100kHz offset )

From Fig.5, the performance of the nonlinear model simulation is wonderful; it means that the dielectric resonator oscillator is successfully designed.

ACKNOWLEDGMENT We would like to express our thanks to Taiji Dong, we get

his very helpful discussions and suggestions.

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[4] J. Guckenheimer and P. Holmes, Nolinear Oscillations, Dynamical Systems, and Bifurcations of Vector Fields. New York: Springer-Verlag, 1983.

[5] V. Rizzoli, A. Costanzo, and A.Neri, “An advanced empirical MESFET model for use in nolinear simulazion,”in Proc. 22ne Europ. Microwave Conf. Helsinki, Finland, pp. 1103-1108. Aug. 1992.

[6] D. M. Pozar, Microwave Engineering, 2nd ed. Singapore: John Wiley & Sons,2003.

[7] Agilent Technologies, “Microwave Oscillator Design,”Application Note A008, 1999.

[8] R. Navie, T. H. Lee, and R. W. Dutton, “Minimum achievable phase noise of RC oscillators,”IEEE Microw. Antennas Propag, Vol. 40, no.3, pp. 630-637, 2005.

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[10] F. Lenk, M. Schott, J. Hilsenbeck, and W. Heinrich, “A new design approach for low phase-noise reflection-type mmic oscillators,”IEEE Trans on Microwave Theory and Techniques, vol. 52, no.12, pp. 2725-2731, 2004.