Abstract — In this paper we make use of classical numerical optimization methods to design a second order band-pass continuous-time filter at 10.7 MHz in 0.35 μm CMOS technology. Our initial design is obtained using Level 1 MOSFET models whose parameter values are extracted from high-level models by numerical optimization. We then replace all transistors by Level 49 MOSFET models and re-optimize the frequency response of the filter using a multi-objective Euclidean formulation with a penalty function. Our methodology is simple and efficient, and can be implemented using readily available tools.

Index Terms— Continuous-time filter, gm-C filters, numerical optimization, parameter extraction, BSIM3v3, symmetrically compensated fully differential folded cascode OTA.

I. INTRODUCTION N this work we exploit numerical optimization methods to design a second order band-pass continuous-time (CT) filter

implemented in integrated circuit form. CT filters are suitable for a variety of applications, e.g. in disk drivers, in high speed data links, in wireless communication systems, etc. To date, many CT filter architectures have been reported [1-2].

One of the difficulties when CT filters are designed is to ensure the satisfaction of specifications considering the CMOS second-order effects and parasitic elements. For a band-pass filter, re-centering the frequency response to meet the specifications (once the second order effects and parasitic are included), is frequently realized in practice by intuitively changing capacitor values until the response gets sufficiently close to the target. This is done by the designer iterating with the simulator, and depending on the problem and designer’s experience it can be very time consuming. A practical solution for this problem is the use of numerical optimization [3].

The focus of this work is on CAD techniques based on numerical optimization to systematically achieve filter design specifications. The starting point is obtained using Level 1 MOSFET models whose parameters are extracted from high-level models by numerical optimization. We then replace all MOSFETs by Level 49 models and re-optimize the frequency response of the filter using a multi-objective Euclidean formulation with penalty terms, using as starting point the previous design. The methodology is illustrated by designing a second-order band-pass continuous-time filter at 10.7 MHz

This work was supported in part by CONACYT (Consejo Nacional de Ciencia y Tecnología, Mexican Government) under Grant C02-42930A-1. L. N. Pérez-Acosta was originally funded through an ITESO assistantship.

implemented in 0.35 μm CMOS technology (SNC0351).

II. BRIEF DESCRIPTION OF THE FILTER Two common approaches to implement CT filters are by

cascading biquads and by emulating LC ladders [1-2]. The first one is preferred since it is easy and flexible to implement and it is also suitable for relatively high frequency applications.

A Gm-C second order biquad filter is depicted in Fig. 1. It consists of four fully differential OTA cells, and provides band-pass and low-pass responses for the same input signal. Its band-pass transfer function is [4]

2

2122

2

)(

CGs

CGs

sC

G

sHmm

m

+⎟⎠⎞

⎜⎝⎛+

⎟⎠⎞

⎜⎝⎛

= (1)

where Gm is the transconductance of each OTA, C is the value of the capacitors and s is the complex frequency.

III. INITIAL COMPONENT VALUES OF THE FILTER For argument sake, the required filter specifications are

listed in Table I (typically used to obtain the intermediate frequency for an FM radio receiver). We first determine initial values for the active (Gm) and the passive component (C). The generic transfer function of a 2nd order band-pass filter is [5]

22

)(

OO

O

bp

Qss

Qs

KsT

ωω

ω

+⎟⎟⎠

⎞⎜⎜⎝

⎛+

⎟⎟⎠

⎞⎜⎜⎝

⎛

= (2)

where K is the gain factor, ωO is the angular central frequency and Q is the quality factor.

Choosing C = 2 pF and substituting the specifications of Table I in (2), and solving (1) and (2), we obtain the initial component values shown in Table II.

IV. DESIGN AT TRANSISTOR LEVEL Once the main filter components are known, we next design

each OTA at the transistor level. The fully-differential folded-cascode OTA [6] is preferred for high-frequency applications. In this case we use the symmetrically compensated fully-

1 http://www.mosis.com/Technical/Testdata/tsmc-035-prm.html

Design of a CMOS Second Order Band-Pass Continuous Time Filter using Numerical Optimization

Luis Nathán Pérez-Acosta (1) and José Ernesto Rayas-Sánchez (2) (1) Intel - Guadalajara Design Center, Tlaquepaque, Jalisco, 45600 Mexico

e-mail: luis.n.perez.acosta@intel.com (2) Department of Electronics, Systems and Informatics, ITESO (Instituto Tecnológico y de Estudios

Superiores de Occidente), Tlaquepaque, Jalisco, 45604 Mexico http://iteso.mx/~erayas e-mail: erayas@iteso.mx

I

978-1-4244-4480-9/09/$25.00 ©2009 IEEE 204

differential folded-cascade OTA shown in Fig. 2 (along with the biasing voltage source), which improves the phase margin as compared with a typical folded-cascode OTA [7].

If gds1 = gds3, gds5 = gds7, gds12 = gds9, gm1 = gm3, gm5 = gm7, CP1 ≈ CP3 and CP2 ≈ CP4, then the small signal voltage gain is [7]:

⎟⎟⎠

⎞⎜⎜⎝

⎛ ++⎟⎟

⎠

⎞⎜⎜⎝

⎛+

⎟⎟⎠

⎞⎜⎜⎝

⎛+

−=

5

21

1

1

1

12

1

1

m

pp

o

L

m

p

o

m

i

o

gCC

sg

Cs

gC

s

gg

VV

(3)

where CL is the OTA load capacitor and go is the output conductance.

The unitary-gain frequency for the OTA in Fig. 2, fT, is twice that one of the typical folded-cascode,

L

mT C

gf 12= (4)

Therefore, the capacitors have to be increased twice their original values, in this case to C = 4 pF, in order to keep the center frequency of the band-pass filter at 10.7 MHz.

A. Parameter Extraction for Level 1 MOSFETs As a first approach we design the symmetrically

compensated fully-differential folded-cascode OTA by hand, using the Level 1 MOSFET model.

Due to (3), it is required to make equal the output conductance of some MOSFETs, as follows: gds1 = gds3, gds5 = gds7, and gds12 = gds9, which are complementary PMOS and NMOS transistors. From Fig. 2 it is seen that the same current flows for each couple of transistors. Since gds ≈ λID, it is possible to achieve the same output conductance for each couple of transistors if their parameter λ is the same (λN = λP).

Considering that λ depends on the MOSFET channel

length, we find a relationship between the PMOS and NMOS channel lengths such that their λ values are equal. Using the procedure described in [8], we found similar values for λN and λP when the NMOS transistor channel length is L = 0.8 μm while the PMOS channel length is L = 1 μm. In Table III are shown the extracted parameters for each transistor, which are used to make the initial hand calculations.

B. Calculation of the OTA Bias Points Another implicit requirement in (3) is to have the same

transconductances for some of the transistors, as follows: gm1 = gm3, and gm5 = gm7. This can be achieved by using the same over-drive voltage (VOV = VGS − VTh) for these transistors, since gm = 2ID/VOV [9]. Taking VOV = 0.2V for all the transistors used in the OTA and in the biasing voltage source, we estimate the channel width for all the transistors using [9]

( )DSOVox

m

VVCLgW

λμ +⋅⋅⋅

=1

(5)

In the second and third columns of Table IV are listed the channel width for each transistor for OTA1 and OTA2, respectively. For all transistors in this paper the drain and source perimeters are taken as 4L + 2W.

Fig. 3 shows the Bode plot of OTA1, where it is seen an open loop voltage gain magnitude at low frequencies |Av| = 72 dB, with a unitary gain frequency fT = 23 MHz. The phase of OTA1 at fT is 90°, which corresponds to a phase margin, PM, of 90°. Also in Fig. 3 is shown the Bode plot of OTA2, where it is seen a |Av| = 72 dB, with fT = 4.5 MHz and PM = 90°. We used WinSpice2 for all simulations in this work.

Using the previously designed OTAs in the filter shown in Fig. 1, the corresponding frequency response is in Fig. 4, where it is confirmed that all the specifications are achieved.

C. OTAs Simulation using High-Level Transistor Models Our next step is to test each OTA using the SPICE Level 49

2 WinSpice, Ver. 1.05, Dep. Elec. & Comp. Sci., U. of California, Berkeley.

Fig. 1 Second order biquad Gm-C filter.

TABLE I FILTER SPECIFICATIONS

Specifications Value

Central frequency, f0 10.7 MHz

Gain, K 0 dB

Quality factor, Q ≥ 5

TABLE II INITIAL COMPONENT VALUES OF THE FILTER

Component Value

OTA1, Gm1 (μS) 134.46

OTA2, Gm2 (μS) 26.89

Capacitors, C (pF) 2

TABLE III EXTRACTED PARAMETERS FOR LEVEL 1 MODELS

Transistor VTh (V) μCox (μA/V2) λ (V−1)

NMOS 0.51 83 0.1

PMOS −0.72 32 0.1

Fig. 2 Symmetrically compensated fully-differential folded-cascode and corresponding biasing voltage source.

205

MOSFET model (BSIM3v3), to include the second order effects which may cause performance degradation. The corresponding Bode plots for OTA1 and OTA2 are shown in Fig. 5, where it is seen a huge degradation in both of them (in contrast to Fig. 3) and consequently making the filter inoperable. It is at this step of the design where numerical optimization is used instead of intuitive variation of component values.

V. FILTER OPTIMIZATION

A. Optimizing the OTAs with the BSIM3v3 MOSFET Model From Fig. 5 it is seen that the OTAs transconductance must

be adjusted by modifying the transistor dimensions and the biasing resistor. The new component values are obtained by numerical optimization, as is next described.

The optimization variables are assembled in a vector x ∈ ℜ12, where x = [W1…W13, WPS1…WPS3, Rmirr]T (see Table IV). The problem is solved by minimizing the following objective

function [10] 2

2* )(minarg xhxx = (6)

where x* is the vector that contains the optimal solution that makes 2

2)(xh as small as possible and h(x) = [h1, h2, h3]T

[10]. For the OTA1, h1 = gm1 – 134.46 μA/V, h2 = gm3 – 134.46 μA/V and h3 = VOUT – ½ VDD and for the OTA2, h1 = gm1 – 26.89 μA/V, h2 = gm3 – 26.89 μA/V and h3 = VOUT – ½ VDD (see Table II).

We use as starting point the previous hand calculated transistor widths in Tables IV (under “Level 1”). Notice that these values of transistor widths are not permitted to be drawn by the technology. Hence we start the optimization by fixing the width of transistors M1 and M3 of each OTA to the nearest permitted width. By keeping fixed these variables, the dimension of the optimization vector is reduced to x ∈ ℜ10.

After one run of the optimization procedure described in [3] for each OTA we obtained the desired response. Then we fix the width of M5 and M7 to the nearest allowed value using the new widths from the previous optimization, also the starting point for this new run of the optimization is selected from the previously optimized values for each variable. We follow this procedure of rounding and fixing the transistor widths until the last variable is the resistor value.

In the fourth and fifth column of Table IV (under “Level 49”) are the optimized components values for each OTA, which do not deviate much with respect to those under “Level 1”. The Bode plots of the optimized OTA1 and OTA2 are

100 1K 10K 100K 1M 10M 100M-20

0

20

40

60

80| A

v | (d

B)

Frequency (Hz)

80

100

120

140

160

180

Phas

e of

Av (

degr

ees)

80

100

120

140

160

180

Phas

e of

Av (

degr

ees)OTA2

OTA1

Fig. 3 Bode plot of OTA1 (|Av| = 72 dB, fT = 23 MHz and PM = 90°) and OTA2 (|Av| = 72 dB, fT = 4.5 MHz and PM = 90°) using the SPICE Level 1 MOSFET model, with CL = 2 pF.

6 8 9.65 10.7 11.8 14 16-20

-15

-10

-5-3

0

| Av |

(dB

)

Frequency (MHz)

-100

-50

0

50

100

Phas

e of

Av (

degr

ees)

Fig. 4 Frequency response of the filter at the starting point using the SPICE Level 1 MOSFET model. It is seen that K = 0 dB, f0 = 10.7 MHz and Q = 5.

100 1K 10K 100K 1M 10M 100M-20

0

20

40

| Av |

(dB

)

Frequency (Hz)

50

100

150

200

Phas

e of

Av (

degr

ees)OTA2

OTA1

Fig. 5 Bode plot of OTA1 (|Av| = 22 dB, fT = 23 MHz and PM = 90°) and OTA2 (|Av| = 8 dB, fT = 4 MHz and PM = 90°) using the SPICE Level 49MOSFET model, with CL = 2 pF.

TABLE IV OTA COMPONENT VALUES

Level 1 Level 49 After Filter Optimization Comp. OTA1 OTA2 OTA1 OTA2 OTA1 OTA2 OTA3

W1 (μm) 5.57 1.11 5.6 1.2 5.2 1.2 1.2

W3 (μm) 18.06 3.61 17 3.6 17.4 4 3.6

W5 (μm) 19.23 3.84 36.8 4 36.6 4 4

W7 (μm) 6.05 1.21 4.8 1.2 4.8 1.2 1.2

W9 (μm) 39.16 7.83 39.8 8.4 39.6 8 8.4

W10 (μm) 39.16 7.83 39.2 7.8 40.2 8.2 7.6

W12 (μm) 11.84 2.36 12.6 2.4 13.4 2.4 2.6

W13 (μm) 11.84 2.36 10.6 2 10.8 2.2 2.2

WPS1 (μm) 269 269 296 265.6 293.8 270.2 273.8

WPS2 (μm) 73.18 73.18 71.8 79.4 70.4 81.2 76.6

WPS3 (μm) 84.6 84.6 99.6 94.4 97 92 97.6

Rmirr (KΩ) 13.77 13.77 14.62 13.71 14.30 10.78 14.37

100 1K 10K 100K 1M 10M 100M-20

0

20

40

60

80

| Av |

(dB

)

Frequency (Hz)

80

100

120

140

160

180

Phas

e of

Av (

degr

ees)OTA2

OTA1

Fig. 6 Bode plot of OTA1 (|Av| = 76.6 dB, fT = 21 MHz and PM = 85.6°) and OTA2 (|Av| = 75 dB, fT = 4.2 MHz and PM = 89.5°) using the SPICE Level 49MOSFET model after optimization, with CL = 2 pF.

206

shown in Fig. 6 (which are quite similar to those in Fig. 3). Using the new OTAs with the BSIM3v3 MOSFET model

in the filter we obtain the responses in Fig. 7 (solid lines), where it is seen that the filter design specifications are violated.

B. Optimization of the Filter Response There are two violated specifications in Fig. 7 (solid lines),

the band-pass frequency range and the maximum gain. The filter band-pass frequency can be re-centered by modifying the capacitor values and the maximum gain can be lowered by modifying the OTA transconductances.

From Fig. 1, if we make the capacitors at nodes 3 and 4 (C1) different to those at nodes 5 and 6 (C2), and making the OTA at the filter input different than the second OTA, we obtain more flexibility to find the optimum parameter values that satisfies all the specifications (the input OTA is now Gm3).

The optimization procedure described in [3] is also used for this case. This time the objective function will contain equality and inequality conditions. The equality conditions are for the band-pass frequency range and the maximum gain specifications, while the inequality condition is for the quality factor specification. We solve the following optimization problem, 2

2

2

2* )()(minarg xxhxx G+= (7)

The equality conditions in (7) are: h(x) = [h1, h2], where h1 = 10.7 MHz – freq(max(|Av|)), where freq(max(|Av|)) is the frequency at which the filter presents the highest gain and h2 = 0 dB − max(|Av|).

The inequality condition G(x) in (7) is: G(x) = G1, where G1 = max([0, g(x)]), where g(x) = Qmin − Q. Notice that g(x) will be negative for values of the quality factor higher than the minimum quality factor specified. The condition G(x) acts as a penalty function, since it will be transparent for Q values higher than the specified minimum quality factor.

The optimization variables are the capacitors and the components of each OTA. The transistor dimensions and the biasing resistor of the k-th OTA are denoted as OTAk = [W1…W13, WPS1…WPS3, Rmirr]. The variables are assembled in vector x ∈ ℜ38, where x = [C1, C2, OTA1, OTA2, OTA3]T.

The starting point for (7) uses C1 = C2 (the values under the second column of Table V), Gm3 = Gm2 (the values of the fifth

column of Table IV), and for Gm1 it uses the values of the fourth column of Table IV.

After one run of the optimization procedure all the filter specifications are achieved. The resultant transistor widths are not allowed to be drawn, hence we use the same procedure of Section V-A to round the transistor widths the nearest permitted width. The optimized values for the OTAs are in columns six to eight of Table IV, while final values of the capacitors are in the third column of Table V. In Fig. 7 (dashed lines) is the frequency response of the optimized filter, where it is seen that all specifications are satisfied.

VI. CONCLUSIONS We proposed in this work a design procedure based on

classical numerical optimization methods to design a second order band-pass continuous-time filter implemented in CMOS technology. The initial design is obtained using basic MOSFET models whose parameter values are extracted by numerical optimization from high-level MOSFET models. We then replace all MOSFETs by BSIM3v3 models and optimize the frequency response of the filter using a multi-objective formulation implemented in two steps: first each OTA is individually optimized, and second the overall performance of the filter is optimized. At each optimization step we use as starting point the previous solution, avoiding in this manner the problem of poor local minima.

REFERENCES [1] Y. P. Tsividis, “Integrated continuous-time filter design - an overview,”

IEEE J. Solid-State Circuits, vol. 29, pp. 166-176, Mar. 1994. [2] E. Sanchez-Sinencio and J. Silva-Martinez, “CMOS transconductance

amplifiers, architectures and active filters: a tutorial,” IEE Proc. Circuits Devices Syst., vol. 147, pp. 3-12, Feb. 2000.

[3] L. N. Pérez-Acosta, J. E. Rayas-Sánchez and E. Martínez-Guerrero, “Optimal design of a classical CMOS OTA-Miller using numerical methods and SPICE simulations,” in XIII International Workshop Iberchip (IWS2007), Lima, Peru, Mar. 2007, pp. 387-390.

[4] H. Elhallabi, M. Sawan, “High Frequency and High Q CMOS gm-C Bandpass Filter with Automatic On-Chip Tuning,” in the 13th International Conference in Microelectronics, Rabat, Morocco, Oct. 2001, pp. 169-172.

[5] L. P. Huelsman, Active and Passive Analog Filter Design, an Introduction. New York, NY: McGraw Hill, 1993.

[6] S. M. Mallya and J. H. Nevin, “Design procedures for a fully differential folded-cascode CMOS operational amplifier,” IEEE J. Solid-State Circuits, vol. 24, pp. 1737-1740, Dec. 1989.

[7] G. Espinosa-Flores-Verdad and R. Salinas-Cruz, “Symmetrically compensated fully differential folded-cascode OTA,” Electronics Letters, vol. 35, pp. 1603-1604, Sep 1999.

[8] L. N. Pérez-Acosta and J. E. Rayas-Sánchez, “A numerical optimization procedure to obtain SPICE MOSFET model level 1 parameters from model level 49,” in XIV International Workshop Iberchip (IWS2008), Puebla, Mexico, Feb. 2008.

[9] B. Razavi, Design of Analog CMOS Integrated Circuits. New York, NY: McGraw-Hill, 2001.

[10] E. K. P. Chong and S. H. Zak, An Introduction to Optimization. New Jersey, NJ: Wiley-Interscience, 2001.

6 8 9.8 10.7 11.65 14 16-15

-10

-5-3

0

5

| Av |

(dB

)

Frequency (MHz)

-100

-50

0

50

100

Phas

e of

Av (

degr

ees)

-100

-50

0

50

100

Phas

e of

Av (

degr

ees)After Optimization

Before Optimization

6 8 9.8 10.7 11.65 14 16-15

-10

-5-3

0

5

| Av |

(dB

)

Frequency (MHz)

-100

-50

0

50

100

Phas

e of

Av (

degr

ees)

-100

-50

0

50

100

Phas

e of

Av (

degr

ees)After Optimization

Before Optimization

Fig. 7 Filter response before optimization (K = 3 dB, f0 = 9.95 MHz and Q = 7) and after optimization (K = 0 dB, f0 = 10.7 MHz and Q = 5.7) using the SPICE level 49 MOSFET model.

TABLE V CAPACITOR VALUES OF THE FILTER

Capacitor Initial Optimized

C1 (pF) 4 4

C2 (pF) 4 3.7

207