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1
ASSEMBLY LANGUAGE PROGRAMMING FOR
IBM 370
Day 2
(Ref: Michael D. Kudlick)
2
Agenda
Agenda
Day1 – Fundamental Concepts – Assembly Language Basics
Day2 – Instruction Types & Sample Programs
3
Day2 Topics
Topic 1: Summary of Session 1 Topic 2: Standard Programming conventions Topic 3: Save Area Topic 4: Sample Program to add 2 numbers Topic 5: Sample Program to use memory addressing and
indexing Topic 6: Explicit Format Vs Implicit Format Topic 7: Instruction Formats
4
Summary of Session 11. Instruction – converted to m/c lang & executed at run time2. Directives – will not be converted to m/c lang & used by assembler3. Opcode-Operand format – opcode is instr or directives4. & operand is data or addr of data5. B-D format of addressing - 12 bits D and 4 bits reg name6. How assembler gets base address, base register & displacement from
USING statement7. How Assembler converts name fields to memory address in D(,B) format.8. How program gets base address & calculates effective address from BALR
instruction9. Relocation factor – program to use address assigned after loaded instead
of using address assigned by assembler10. 24 bit memory addressing (for 16 MB memory) with 16 bit address
representation using B-D format11. 16 registers and register usage conventions12. How Assembler converts name fields to memory addresses
5
Standard Programming conventions There are conventional programming requirements for writing the
program in IBM 370.
No. Requirement Program statements Comments
1.The first statements (other than comments) for the program should be these:
PGMNAME1 CSECT STM 14,12,12(13) BALR 12,0 USING *,12 ST 13,SAVE+4 LA 13,SAVE
Tells the Program name.
Store regs. 14 thru 12 in save area.
Establish base address in reg. 12.
Tells base address / reg. to assmblr.
Store previous pgm / OS save area.
Load current program’s save area address.
2.The last executable statements of the program should be these:
LABEL001 L 13,SAVE+4 LM 14,12,12(13) BR 14
Restore prev. pgm / OS save area.
Restore prev. pgm / OS registers.
Return to prev. pgm or OS.
3.The last statements of the program should be these:
SAVE DS 18F END
Declare Save area.
Last statement – program end.
6
Complete convention
This is complete convention which includes storing current program’s SAVE area address in previous program’s SAVE area in SAVE+8.
No. Requirement Program statements Comments
1.
The first statements (other than comments) for the program with complete convention:
PGMNAME1 CSECT STM 14,12,12(13) BALR 12,0 USING *,12 ST 13,SAVE+4 LR 2,13 LA 13,SAVE ST 13,8(2)
Tells the Program name.
Store regs. 14 thru 12 in save area.
Establish base address in reg. 12.
Tells base address / reg. to assmblr.
Store previous pgm / OS save area.
Load current program’s save area address.
7
SAVE AREA
1. Save the previous program registers 14 thru 12 in previous program SAVE area in SAVE + 12.2. Save the Previous program SAVE area address in current program SAVE area in SAVE + 4. 3. Save the Current program SAVE area address in previous program SAVE area in SAVE + 8.
Current program’s Save area (P)
Used by PL1 programs saved by
prev pgm(OS) save area addr curr. pgm P
next pgm (Q) save area addr.
saved by
next pgm.
(Q)
store register 14 of curr pgm P
store register 15 of curr pgm P
store register 0 of curr pgm P
store register 1 of curr pgm P
store register 2 of curr pgm P
store register 3 of curr pgm P
store register 4 of curr pgm P
store register 5 of curr pgm P
store register 6 of curr pgm P
store register 7 of curr pgm P
store register 8 of curr pgm P
store register 9 of curr pgm P
store register 10 of curr pgm P
store register 11 of curr pgm P
store register 12 of curr pgm P
OS Save area
1st word SAVE Used by PL1 programs
2 SAVE + 4
3 SAVE + 8 next pgm(P) save area addr
saved
by
next
pgm.
(P)
4 SAVE + 12 store register 14 of OS
5 SAVE + 16 store register 15 of OS
6 SAVE + 20 store register 0 of OS
7 SAVE + 24 store register 1 of OS
8 SAVE + 28 store register 2 of OS
9 SAVE + 32 store register 3 of OS
10 SAVE + 36 store register 4 of OS
11 SAVE + 40 store register 5 of OS
12 SAVE + 44 store register 6 of OS
13 SAVE + 48 store register 7 of OS
14 SAVE + 52 store register 8 of OS
15 SAVE + 56 store register 9 of OS
16 SAVE + 60 store register 10 of OS
17 SAVE + 64 store register 11 of OS
18 SAVE + 68 store register 12 of OS
Next program’s Save area (Q)
Used by PL1 programs
prev. pgm(P) save area addr.
saved by curr. pgm (Q)
8
Sample Program to use name-field symbols - adds 2 numbers PROGRAM1 CSECT CONVENTIONAL REQUIREMENT 1 STM 14,12,12(13) BALR 12,0 USING *,12 ST 13,SAVE+4 LA 13,SAVEADD L 3,FLD1 LOAD FIRST NUMBER A 3,FLD2 ADD SECOND NUMBER ST 3,FLD3 STORE THE RESULT WTO ‘THE RESULT SUM IS ‘ FLD3 DISPLAY RESULTEXIT L 13,SAVE+4 CONVENTIONAL REQUIREMENT 2 LM 14,12,12(13) BR 14 FLD1 DC F‘100’ FIRST NUMBER FLD2 DC F‘300’ SECOND NUMBERFLD3 DS F RESULT FIELDSAVE DS 18F CONVENTIONAL REQUIREMENT 3 END PROGRAM END
9
Sample Program to use memory addressing & indexingPROGRAM1 CSECT CONVENTIONAL REQUIREMENT 1 STM 14,12,12(13) BALR 12,0 USING *,12 ST 13,SAVE+4 LA 13,SAVEGETVAL LA 5,ARRAY01 LOAD ADDRESS OF ARRAY L 7,COUNT1 LOAD ARRAY COUNT L 2,=F’0’ INITIALIZE INDEXING REG TO 0 L 8,=F’0’ INITIALIZE REG 8 FOR STORINGADDLOOP A 8,0(2,5) ADD DATA FROM NEXT MEM LOCATION LA 2,4(2) INC INDEX REG BY 4 (INC QTY) BCT 7,ADDLOOP DCRMNT COUNT AND BRANCH IF NOT 0STORERES ST 8,SUM1 STORE THE RESULT IN SUM1 FIELD WTO ‘THE SUM OF ARRAY OF NOS. IS ‘ SUM1 DISPLAY THE SUMEXIT L 13,SAVE+4 CONVENTIONAL REQUIREMENT 2 LM 14,12,12(13) BR 14 ARRAY01 DC F‘10’ FIRST ARRAY ELEMENT DC F’20’ SECOND DC F’30’ THIRD DC F’40’ FOURTH DC F’50’ FIFTHCOUNT1 DC F‘5’ COUNT OF ARRAYSUM1 DS F RESULT FIELDSAVE DS 18F CONVENTIONAL REQUIREMENT 3 END PROGRAM END
©
10
Explicit format Vs Implicit formatNo. Explicit Format Implicit Format
1. The operands can be kept as it is.The operands need to be converted to base-displacement form for implicit formats.
2.Base-displacement form and register addresses are used to represent address.
Name-field symbol is used to represent address.
3. Not ease of use.Simpler to use, less error prone, greatly facilitate writing and modifying the program.
4.
In the RX explicit base-displacement form there are 3 possibilities X2 and B2 specified, X2 omitted and B2 omitted. X2 omitted or B2 omitted has the same effect at run time. Index register can be used for incrementing the subsequent addresses in looping to operate multiple data. Explicit format RX R1,D2(X2,B2).
Effective address = content of base register +
displacement +
content of index register
= base address +
displacement +
index
In the RX implicit name-field symbol form there are 2 possibilities length specified and length not specified and assumed from first name-field.
Implicit format RX R1,S2(X2)
11
Explicit format Vs Implicit format (continued...)
No. Explicit Format Implicit Format
5.
The effective address is calculated during the run time from base-displacement form of address to operate the data present in that address. Explicit format RX R1,D2(,B2).
Effective address = content of base
register +
displacement
= base address +
displacement
The assembler is required to generate the base-displacement form of address for name-field symbol, say Z in add example shown below. The assembler gets base address and base register from ‘USING’ directive. Thus displacement can be calculated and the format D2(,B2) can be achieved. Implicit format RX R1,S2.
displacement = address of name-field symbol Z –
content of base register +
= address of name-field symbol Z –
base address
6.
In the explicit formats length has to be mentioned explicitly for L and L1, L2 in SS1 D1(L,B1),D2(B2) and SS2 D1(L1,B1),D2(L2,B2) respectively.
In the implicit format length will be assumed by assembler to number of bytes of first name-field symbol if it is not mentioned. Implicit format SS1 S1,S2.
7.
A 3,4(10,11) – RX X2 & B2 SpecifiedA 3,4(,11) – RX X2 omitted A 3,4(11) – RX B2 omittedA 3,4 – RX X2 & B2 omittedCLC 85(5,12),200(12) – SS1 length is 5
A 3,Z - RX name-field symbol A 3,Z(6) - RX name-field symbol with index reg. 6CLC X(5),Z - SS1 length 5 specifiedCLC X,Z - SS1 length of first symbol taken,
hence length of X
12
Instruction Formats
No.Instruction Type
Instruction FormatsInstruction Length
1. RR – EXPLICIT
Assembly Language Instruction Format op R1,R2
Assembly Language Instruction example AR 3,4
Machine Language converted 8 + 4 +4
= 16 bits
= 2 bytesMachine Language Instruction Format
2a.
RX – EXPLICIT
(with both X2 & B2)
Operand 2 Effective address = R10 content + R11 content + 4
Assembly Language Instruction Format op R1,D2(X2,B2)
Assembly Language Instruction example A 3,4(10,11)
Machine Language converted 8 + 4 + 4 +4
+ 12
= 32 bits
= 4 bytesMachine Language Instruction Format
1A 3 4
5A 3 A B 004
op R1 R2
op R1 X2 B2 D2
13
Instruction Formats (continued...)
No.Instruction Type
Instruction FormatsInstruction Length
2b.
RX – EXPLICIT
(X2 omitted) – no indexing -
Operand 2 Effective address = R11 content + 4
Assembly Language Instruction Format op R1,D2(,B2)
Assembly Language Instruction example A 3,4(,11)
Machine Language converted
8 + 4 + 4 +4 + 12
= 32 bits
= 4 bytesMachine Language Instruction Format
2c.
RX – EXPLICIT
(B2 omitted)
Operand 2 Effective address = R11 content + 4
Assembly Language Instruction Format op R1,D2(X2)
Assembly Language Instruction example A 3,4(11)
Machine Language converted 8 + 4 + 4 +4
+ 12
= 32 bits
= 4 bytesMachine Language Instruction Format
5A 3 B 0 004
op R1 X2 B2 D2
5A 3 0 B 004
op R1 X2 B2 D2
14
Instruction Formats (continued...)
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
2d.
RX – EXPLICIT
(both X2 & B2 omitted)
Operand 2 Effective address = 4
Assembly Language Instruction Format op R1,D2
Assembly Language Instruction example A 3,4
Machine Language converted
8 + 4 + 4 +4 + 12
= 32 bits
= 4 bytesMachine Language Instruction Format
2e.
RX – IMPLICIT
Operand 2 Effective address = Address of Z + R5 content
Assembly Language Instruction Format op R1,S2(X2)
Assembly Language Instruction example
A 3,Z(5) replaced by
A 3,2052(5,12)
Z=80A, base register is 12 thus B2=C, base address=6, index register X2=5 (given), index=20, displacement=80A-6=X’804’=2052
Machine Language converted 8 + 4 + 4 +4
+ 12
= 32 bits
= 4 bytesMachine Language Instruction Format
5A 3 5 C 804
op R1 X2 B2 D2
5A 3 0 0 004
op R1 X2 B2 D2
15
Instruction Formats (continued...)
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
2f.
RX – IMPLICIT
Operand 2 Effective address = Address of Z
Assembly Language Instruction Format op R1,S2
Assembly Language Instruction example
A 3,Z replaced by
A 3,2052(,12)Z=80A, base register is 12 thus B2=C, base address=6, displacement=80A-6=X’804’=2052
Machine Language converted
8 + 4 + 4 +4 + 12
= 32 bits
= 4 bytesMachine Language Instruction Format
3a.
RS – EXPLICIT
Operand 3 Effective address = R13 content + 12
Assembly Language Instruction Format op R1,R2,D3(B3)
Assembly Language Instruction example STM 14,12,12(13)
Machine Language converted 8 + 4 + 4 +4
+ 12
= 32 bits
= 4 bytesMachine Language Instruction Format
90 E C D 00C
op R1 R2 B3 D3
5A 3 0 C 804
op R1 X2 B2 D2
16
Instruction Formats (continued...)
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
3b.
RS – IMPLICIT
Operand 3 Effective address = Address of Z
Assembly Language Instruction Format op R1,R2,S3
Assembly Language Instruction example
STM 14,10,Z replaced by
STM 14,10,2052(12)
Z=80A, base register is 12 thus B3=C, base address=6, displacement=80A-6=X’804’ =2052
Machine Language converted
8 + 4 + 4 +4 + 12
= 32 bits
= 4 bytesMachine Language Instruction Format
4a.
SI – EXPLICIT
- 1 byte Immediate data - Operand 1 Effective address = R13 content + 12
Assembly Language Instruction Format op D1(B1),I2
Assembly Language Instruction example CLI 12(13),X’40’
Machine Language converted 8 + 8 + 4 +12
= 32 bits
= 4 bytesMachine Language Instruction Format
95 40 D 00C
op I2 B1 D1
90 E A C 804
op R1 R2 B3 D3
© 2003-2010 GalaxE.Solutions ®Strictly Private and Confidential
17
Instruction Formats (continued...)
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
4b.
SI – IMPLICIT
- 1 byte Immediate data - Operand 1 Effective address = Address of Z
Assembly Language Instruction Format op S1,I2
Assembly Language Instruction example
CLI Z,X’40’ replaced by
CLI 2052(12) ,X’40’
Z=80A, base register is 12 thus B3=C, base address=6, displacement=80A-6=X’804’=2052
Machine Language converted 8 + 8 + 4 +12
= 32 bits
= 4 bytesMachine Language Instruction Format
5a.
S – EXPLICIT
Operand 1 Effective address = R13 content + 12
Assembly Language Instruction Format op D1(B1)
Assembly Language Instruction example TS 12(13)
Machine Language converted 8 + 8 + 4 +12
= 32 bits
= 4 bytesMachine Language Instruction Format
93unused
D 00C
opunused
B1 D1
95 40 C 804
op R1 R2 B3 D3
18
Instruction Formats (continued...)[Note: Length field L is one less in machine language than in assembly language in SS1 type]
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
5b.
S – IMPLICIT
Operand 1 Effective address = Address of Z
Assembly Language Instruction Format op S1
Assembly Language Instruction example
TS Z replaced by
TS 2052(12)
Z=80A, base register is 12 thus B1=C, base address=6, displacement=80A-6=X’804’=2052
Machine Language converted 8 + 8 + 4 +12
= 32 bits
= 4 bytesMachine Language Instruction Format
6a.
SS1 – EXPLICIT
Operand 1 Effective address = R3 content + 12 & operand 2 EA = R4 content + 15
Assembly Language Instruction Format op D1(L,B1),D2(B2)
Assembly Language Instruction example CLC 12(8,3),15(4)
Machine Language converted 8 + 8 + 4 +12
+ 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
D5 07 3 00C 4 00F
op L B1 D1 B2 D2
93unused
C 804
opunused
B1 D1
©
19
Instruction Formats (continued...)[Note: Length field L is one less in machine language than in assembly language in SS1 type]
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
6b.
SS1 – IMPLICIT
Operand 1 Effective address = Address of X & operand 2 EA = Address of Z
Assembly Language Instruction Format op S1,S2
X=700, length of X=8, Z=80A, base register is 12 thus B1=B2=C, base address=6, displacement D1 =700-6=X’6FA’ =1786 and displacement D2 = 80A-6=X’804’ =2052
Assembly Language Instruction example
CLC X,Z replaced by
CLC 1786(8,12),2052(12)
Machine Language converted
8 + 8 + 4 +12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
6c.
SS1 – MIXED
Operand 1 Effective address = R3 content + 12 & operand 2 EA = Address of Z
Assembly Language Instruction Format op D1(L,B1),S2
Assembly Language Instruction example
CLC 12(8,3),Z replaced
CLC 12(8,3),2052(12)
Z=80A, base register is 12 thus B2=C, base address=6, displacement=80A-6=X’804’=2052
Machine Language converted 8 + 8 + 4 +12
+ 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
D5 07 3 00C C 804
op L B1 D1 B2 D2
D5 07 C 6FA C 804
op L B1 D1 B2 D2
20
Instruction Formats (continued...)[Note: Length field L is one less in machine language than in assembly language in SS1 type]
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
6d.
SS1 – MIXED
Operand 1 Effective address = Address of X & operand 2 EA = R4 content + 15
Assembly Language Instruction Format op S1(L),D2(B2)
X=700, base register is 12 thus B1=C, base address=6, displacement D1 =700-6=X’6FA’ =1786
Assembly Language Instruction example
CLC X(8),15(4) replaced
CLC 1786(8,12),15(4)
Machine Language converted
8 + 8 + 4 +12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
6e.
SS1 – MIXED
Operand 1 Effective address = Address of X & operand 2 EA = Address of Z
Assembly Language Instruction Format op S1(L),S2 X=700, Z=80A,
base register is 12 thus B1=B2=C, base address=6, displacement D1 =700-6=X’6FA’ =1786 and displacement D2 = 80A-6=X’804’ =2052
Assembly Language Instruction example
CLC X(8),Z replaced by
CLC 1786(8,12),2052(12)
Machine Language converted 8 + 8 + 4 +12
+ 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
D5 07 C 6FA 4 00F
op L B1 D1 B2 D2
D5 07 C 6FA C 804
op L B1 D1 B2 D2
21
Instruction Formats (continued...)[Note: Length fields L1 & L2 are one less in machine language than in assembly language in SS2 type]
No.
Instruction Type
Instruction FormatsSample Values
Instruction Length
6f.
SS1 – MIXED
Operand 1 Effective address = Address of X & operand 2 EA = R4 content + 15
Assembly Language Instruction Format op S1,D2(B2)
X=700, length of X=8, base register is 12 thus B1=C, base address=6, displacement D1 =700-6=X’6FA’ =1786
Assembly Language Instruction example
CLC X,15(4) replaced
CLC 1786(8,12),15(4)
Machine Language converted
8 + 8 + 4 +12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
7a.
SS2 – EXPLICIT
Operand 1 Effective address = R3 content + 12 & operand 2 EA = R4 content + 15
Assembly Language Instruction Format op D1(L1,B1),D2(L2,B2)
Assembly Language Instruction example CP 12(8,3),15(10,4)
Machine Language converted 8 + 4 + 4 + 4
+ 12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
D5 07 C 6FA 4 00F
op L B1 D1 B2 D2
F9 7 9 3 00C 4 00F
op L1 L2 B1 D1 B2 D2
22
Instruction Formats (continued...)[Note: Length fields L1 & L2 are one less in machine language than in assembly language in SS2 type]
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
7b.
SS2 – IMPLICIT Operand 1 Effective address = Address of X & operand 2 EA = Address of Z
Assembly Language Instruction Format op S1,S2
X=700, length of X=8 & len Z=10, Z=80A, base register is 12 thus B1=B2=C, base address=6, displacement D1 =700-6=X’6FA’ =1786 and displacement D2 = 80A-6=X’804’ =2052
Assembly Language Instruction example
CP X,Z replaced byCP 1786(8,12),2052(10,12)
Machine Language converted
8 + 4 + 4 + 4 + 12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
7c.
SS2 – MIXED
Operand 1 Effective address = R3 content + 12 & operand 2 EA = Address of Z
Assembly Language Instruction Format op D1(L1,B1),S2(L2)
Z=80A, base register is 12 thus B2=C, base address=6, displacement D2 = 80A-6=X’804’ =2052
Assembly Language Instruction example
CP 12(8,3),Z(10) replaced
CP 12(8,3),2052(10,12)
Machine Language converted 8 + 4 + 4 + 4
+ 12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
F9 7 9 3 00C C 804
op L1 L2 B1 D1 B2 D2
F9 7 9 C 6FA C 804
op L1 L2 B1 D1 B2 D2
23
Instruction Formats (continued...)[Note: Length fields L1 & L2 are one less in machine language than in assembly language in SS2 type]
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
7d.
SS2 – MIXED
Operand 1 Effective address = R3 content + 12 & operand 2 EA = Address of Z
Assembly Language Instruction Format op D1(L1,B1),S2
Z=80A, length of Z=10, base register is 12 thus B2=C, base address=6, displacement D2 = 80A-6=X’804’ =2052
Assembly Language Instruction example
CP 12(8,3),Z replaced
CP 12(8,3),2052(10,12)
Machine Language converted
8 + 4 + 4 + 4 + 12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
7e.
SS2 – MIXED
Operand 1 Effective address = Address of X & operand 2 EA = Address of Z
Assembly Language Instruction Format op S1(L1),S2(L2) X=700, Z=80A,
base register is 12 thus B1=B2=C, base address=6, displacement D1 =700-6=X’6FA’ =1786 and displacement D2 = 80A-6=X’804’ =2052
Assembly Language Instruction example
CP X(8),Z(10) replacedCP 1786(8,12),2052(10,12)
Machine Language converted 8 + 4 + 4 + 4
+ 12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
F9 7 9 3 00C C 804
op L1 L2 B1 D1 B2 D2
F9 7 9 C 6FA C 804
op L1 L2 B1 D1 B2 D2
24
Instruction Formats (continued...)[Note: Length fields L1 & L2 are one less in machine language than in assembly language in SS2 type]
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
7f.
SS2 – MIXED
Operand 1 Effective address = Address of X & operand 2 EA = Address of Z
Assembly Language Instruction Format op S1(L1),S2
X=700, Z=80A, length of Z=10, base register is 12 thus B1=B2=C, base address=6, displacement D1 =700-6=X’6FA’ =1786 and displacement D2 = 80A-6=X’804’ =2052
Assembly Language Instruction example
CP X(8),Z replaced byCP 1786(8,12),2052(10,12)
Machine Language converted
8 + 4 + 4 + 4 + 12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
7g.
SS2 – MIXED
Operand 1 Effective address = Address of X & operand 2 EA = Address of Z
Assembly Language Instruction Format op S1,S2(L2)
X=700, length of X=8, Z=80A, base register is 12 thus B1=B2=C, base address=6, displacement D1 =700-6=X’6FA’ =1786 and displacement D2 = 80A-6=X’804’ =2052
Assembly Language Instruction example
CP X,Z(10) replaced byCP 1786(8,12),2052(10,12)
Machine Language converted 8 + 4 + 4 + 4
+ 12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
F9 7 9 C 6FA C 804
op L1 L2 B1 D1 B2 D2
F9 7 9 C 6FA C 804
op L1 L2 B1 D1 B2 D2
25
Instruction Formats (continued...)[Note: Length fields L1 & L2 are one less in machine language than in assembly language in SS2 type]
No.Instruction Type
Instruction FormatsSample Values
Instruction Length
7h.
SS2 – MIXED
Operand 1 Effective address = Address of X & operand 2 EA = R4 content + 15
Assembly Language Instruction Format op S1(L1),D2(L2,B2)
X=700, base register is 12 thus B1=C, base address=6, displacement D1 =700-6=X’6FA’ =1786
Assembly Language Instruction example
CP X(8),15(10,4) replaced
CP 1786(8,12),15(10,4)
Machine Language converted
8 + 4 + 4 + 4 + 12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
7i.
SS2 – MIXED
Operand 1 Effective address = Address of X & operand 2 EA = R4 content + 15
Assembly Language Instruction Format op S1,D2(L2,B2)
X=700, length of X=8, base register is 12 thus B1=C, base address=6, displacement D1 =700-6=X’6FA’ =1786
Assembly Language Instruction example
CP X,15(10,4) replaced
CP 1786(8,12),15(10,4)
Machine Language converted 8 + 4 + 4 + 4
+ 12 + 4 + 12
= 48 bits
= 6 bytesMachine Language Instruction Format
F9 7 9 C 6FA 4 00F
op L1 L2 B1 D1 B2 D2
F9 7 9 C 6FA 4 00F
op L1 L2 B1 D1 B2 D2
26
THANK YOU! Questions?