Http://photonics.intec.UGent.be Photonics Research Group Integration of Photonic Functions in and with Silicon Roel Baets Wim Bogaerts, Pieter Dumon, Günther

http://photonics.intec.UGent.be

Photonics Research Group

Integration of Photonic Functions

in and with Silicon

Roel Baets

Wim Bogaerts, Pieter Dumon, Günther Roelkens, Ilse Christiaens, Kurt De Mesel, Dirk Taillaert, Bert Luyssaert, Joris

Van Campenhout, Peter Bienstman, Dries Van Thourhout, Vincent Wiaux, Johan Wouters, Stephan Beckx

Ghent University and IMEC

http://photonics.intec.UGent.be 2© intec 2004

Outline

• why Silicon photonics?

• sub-micron photonics in Silicon?

• heterogeneous integration of III-V components onto Silicon?


Evolution of electronics...

5 tons of componentscan multiply in 1 sec

42 million transistors2000 000 000 multiplications in 1 sec

(pentium 4)

(IBM, mark1)


Success of electronics?

Integrated circuits

economics of wafer scale integration

performance (smaller is faster!)

miniaturization in its own right

complex function can be made by a limited number of high-yield processes

focus on one production technology few companies in the food chain

all efforts on the same material = Silicon


Should we integrate in photonics?

Yes! there are good reasons to do so

economics of wafer scale integration

performance

miniaturization

integrate with electronics

reduce costly optical packaging!!! optical packaging is expensive! (often requires manual

and/or active alignment at (sub)-micron level) more integration = less packaging


The key bottleneck of photonic integration

(By far too) many degrees of freedom many different materials

many different component types

many different wavelength ranges

Hence: no generic integration technology for many different

applications

no high volume technology platforms

too high cost

Hence:

Integration is not an industrial reality (yet)


The way out - a roadmap1. Use mainstream Silicon(-based) technology

wherever possible, CMOS fab compatible otherwise, use dedicated Silicon fab

2. Add other materials where needed for specialty functions if the added value motivates it

3. By using wherever possible : wafer-scale post-processing

technology (build-up) otherwise, die-scale technology

4. Build a photonic IC industry on this basis


Silicon-based photonic components and ICs

Many examples:

• detector arrays and solar cells

• CCD and CMOS-based image sensors

• micro-displays

• MEMS devices

• LEDs

• Silica-on-Silicon passive photonic ICs


CCD and CMOS-based image sensors

• Several million pixels

• High volume applications


Liquid Crystal microdisplay on CMOS

1.8 cm

1.4 cmdesign by TFCG-IMEC

Mosarel-project


MEMS based microdisplays

Display

www.dlp.com

Digital Light Processing (DLP)

Digital Mirror Device (DMD)


2D Crossconnects


3-D CrossConnect

Lucent Technologies, Bell Labs


Efficient Silicon-based LEDs

• announced October 2002 by Salvo Coffa’s research team at ST Microelectronics

• light emission from: SiO2 layer, between p- and n-type Silicon doped with rare earth ions by standard ion

implantation made conductive by Si nanoscale particles (1-2nm)

• emission wavelength: Cerium: blue Terbium: green Erbium: 1.55 micron

• as efficient as III-V LEDs

• next step: a laser???


Silica on Silicon

Lucent

Si-wafer

doped SiO2 or SiOxNy

SiO2

Arrayed Waveguide Grating-(de)multiplexer(AWG)


“Group IV photonics”

1st International Conference on Group IV Photonics

Hongkong 29 September – 1 October 2004

Organized by IEEE-LEOS


Outline





Scale difference

Electronics

Active opto-electronics

Passive photonics

1cm1mm100m10m1m100nm

AWG in Silica on Silicon

Bend radiuslinewidth in current PIC

VCSELstripe laserLED

detector

gatewidth

transistor

taperspot-sizeconvertor

2R regenerator

fibre core

flip-flop

Wavelength-scale photonics

interconnects

Wavelength-scale photonics


Reduce PIC-size / increase density

WE NEED:

Ultra-compact waveguiding with Sharp bends (Bend radius < 10m)

Compact splitters and combiners

Short mode-conversion distances

Compact wavelength selective functions Highly dispersive element

Small, high-Q resonators

Compact non-linear functions Increase power density by using tight confinement


High refractive index contrast (>2:1)

High refractive index contrast allows for:• very tight bends• compact resonators with low loss• wide angle mirrors• very compact mode size

--> strong field strength--> strong non-linear effects

--> small volume to be pumped in active devices--> faster and/or lower power

• photonic bandgap effects

high refractive index contrast is the key for ultra-compact photonic circuits

air semiconductor

dielectric


Silicon-on-Insulator

Transparent at telecom wavelengths (1.55m and 1.3m)

High refractive index contrast in-plane: 3.45(Si) to 1.0 (air) out-of-plane: 3.45 (Si) to 1.45 (SiO2)

Compatible with CMOS processesSi substrate

silica

Silicon


Ultra-compact waveguide candidatesPhotonic Crystal waveguides:

in-plane: high contrastphotonic crystal defect

out-of-plane: TIR

Photonic Wires:

in-plane: high contrast TIR

out-of-plane: TIR


Guided Bloch mode conditions

x

yz

KM

/a

Brillouin Zone

x

z

y

Radiation

WG mode

PBG

WaveguidePBG

GuidedBlochMode

leak into PhC

guiding by PhC & SWG

Coupling forw/backw

leak into substrate

/a

M K

Lightline


Compact bends

Photonic Crystal Light is confined by the PBG

Photonic Wire Deep etch allows for short

bend radius (a few m)

Corner mirrors


Spectral accuracy and geometrical accuracy

High index contrast components:

- interference based filters,with d the waveguide width ()

- cavity resonance wavelengthwith d the cavity length (a few )

- photonic crystalwith d the hole diameter ()

d

d

if tolerable wavelength error : 1 nm

tolerable length scale error : (of the order of) 1 nm

d

d

d

d


Ultra-compact waveguide candidatesPhotonic Crystal waveguides:

in-plane: high contrastphotonic crystal defect

out-of-plane: TIR

Photonic Wires:

in-plane: high contrast TIR

out-of-plane: TIR

Both cases:• feature size : 50-500 nm

• required accuracy of features: 1-10 nmNANO-PHOTONIC waveguides


Deep UV Lithography for CMOS

248nm excimer laser Lithography ASML PAS 5500/750 Step-and-scan

Automated in-line processing (spin-coating, pre- and post-bake, development)

4X reticles

Standard process

193nm excimer laser Lithography

ASML PAS 5500/1100 Step-and-scan

4X reticles


Si-substrate

SiO2

SiPhotoresist Photoresist

AR-coating

wafer Photoresist(UV3)

Bare Soft bake AR coating Illumination(248nm deep UV)

bakePost Development Resist trim Silicon etch Resist strip

Fabrication with deep UV Litho

W. Bogaerts et al. Opt. Exp. 12(8) p.1583


Fabricated Structures


0

5

10

15

20

25

30

35

40

300 350 400 450 500 550

Wire width (nm)

Lo

sses

(d

B/c

m)

Si substrate

SiO2 1m

Siw

220nm

w400nm440nm450nm500nm

33.89.47.42.4

Propagation losses± 1.7 dB/cm± 1.8 dB/cm± 0.9 dB/cm± 1.6 dB/cm

SOI photonic wires

Shallow etch, TE


Ring resonators in Silicon on Insulator

10m

3m

Return bend±2dB loss

In

Through

Drop

Racetrack resonator

10mPhotonic wire


Racetrack Resonator Wire width = 510nm TE polarisation Q 12000 40% efficiency FSR=16.5nm Finesse=137

-35

-30

-25

-20

-15

-10

-5

0no

rmal

ized

tra

nsfe

r [d

B]

wavelength [nm]

1524 1524.5 1525 1525.5 1526 1526.5

pass port

drop port

4µm

8m

3.14m

PTL 16(5) pp.1328-1330


200µm

AWG

-25

-20

-15

-10

-5

1500 1520 1540 1560 1580 1600

O1O2O3O4O5O6O7O8

5 x 8 AWG, 400GHz spacing, 8 Channels 300µm x 300µm area

-8dB loss in star couplers

- 6-10 dB crosstalk


-25.00

-20.00

-15.00

-10.00

-5.00

0.00

1520.00 1530.00 1540.00 1550.00 1560.00 1570.00

Cascaded MZ Filter

Example: 6 stage CMZ

3.2nm bandwidth

17nm FSR

coupling efficiency ~80%

-10 dB crosstalk

wavelength [nm]no

rmal

ized

ou

tpu

t [d

B] pass

drop

20µm 14µm 20µm 20µm 14µm 20µm

L = 32.8µm

gap width = 220nm

waveguide width= 535nm

waveguide width= 565nm


Outline





Integration of active components

• light emitters with high efficiency and high modulation bandwidth

III-V semiconductors

• compact optical amplifiers III-V semiconductors

• high speed detectors (in particular in IR) III-V semiconductors

• high speed + compact optical modulators and switches

III-V semiconductors


Integration of active + passive photonicsIntegration of active photonics and electronics

The options:

• monolithic in III-Vcomplex and costly

• Silicon-based IC + hybridly mounted III-V components

costly + yield problem


Integrating electronics and photonics

2 4x8 VCSEL arrays2 4x8 Detector arrays

FPGA CMOS circuit + drivers + receivers


Integration of active + passive photonicsIntegration of active photonics and electronics

The options:

• monolithic in III-Vcomplex and costly

• Silicon-based IC + hybridly mounted III-V components

costly + yield problem

• direct epitaxy of III-V on Silicon

low III-V quality (so far)

• bonding of III-V membranes on Silicon wafers (electronic or passive photonic)

infancy stage but looks promising


Bonded InP devices

SOI wafer

InP wafer

SOI wafer

InP wafer

bonding

substrate removal


Bonding technologies

• Direct bonding (e.g. wafer fusion)

• Metallic bonding (e.g. with solder)

• Bonding with intermediate ‘glue’ layer e.g. BCB, SOG

• …


Silica-Silica bonding

Future: automated bonding of multiple InP dies to Silicon and subsequentsubstrate removal


Die-to-wafer bonding

Large size difference between III-V wafers (2-6”) and Silicon-wafers (8-12”)

bonding of III-V islands on processed Silicon-wafer

bonding must be low-temperature process (<450C)

further wafer-scale processing of III-V devices after bonding

Silicon wafer Siliconelectronics

Silicon, passivemicro-optics

III-V die, active micro-optics


InP membrane photonic crystal components

Building blocks for photonic integration

microcavities

low threshold optically pumped photonic crystal microlasers

single line defect waveguide

Lyon- / Viktorovitch-LEOM CNRS/ LEOS 2002-glasgow


InP membrane laser diodeProcessing sequence:

Si substrate

Si substrate

top contact(n-contact)

Si substrate

polyimide

Si substrate

polyimide

Si substrate

p-contact n-contact

Si substrate

BCB

Si substrate

InP substrate

Si substrate

BCB Ti/Aucontact


InP membrane laser diode

SEM photograph:PI curves

0

0.02

0.04

0.06

0.08

0.1

0.12

0 100 200 300 400 500 600

I [mA]

P [

mW

]


InP membrane laser diode

Component 11

0

0.02

0.04

0.06

0.08

0.1

0.12

0 100 200 300 400 500I [mA]

P [

mW

]

ref

48u

100u

250u

500u

Component 5

0

0.2

0.4

0.6

0.8

1

1.2

1.4

0 10 20 30 40 50I [mA]

V [

V] ref

48u

100u

250u

500u

Degradation tests: damp heat testing (85°C, 85% RH) for 48, 100, 250 and 500 hours

No observable degradation

Further indication of bonding quality

Component 5

0

20

40

60

80

100

120

140

0 10 20 30 40 50I [mA]

R [

Oh

m]

ref

48u

100u

250u

500u

PI IV

Rs


Application: FP6-PICMOS projectGOAL: Build Photonic Interconnect Layer on

CMOS by waferscale integration Solve CMOS interconnect bottleneck

Use waferscale technologies, compatible with CMOS

Coordination: Dries Van Thourhout, Ghent University-IMEC, Belgium

CMOS-wafer

Ultra-compact sourcesand detectors coupled to waveguides

Photonic wiring layerbased on high index-contrastSOI or polymer waveguides


PICMOSPhotonic Crystal Sources

Membrane type Photonic Crystal Sources coupled to underlying waveguide

Develop efficient electrical contacting scheme

Footprint < 100m2 – Ith < 1mA – Bandwidth > 10GHz

(C. Seassal – CNRS-FMNT-LEOM)

Si waveguideIII-V PC laser


ConclusionsSilicon-based photonics

The power of Silicon technology brought to the world of photonics

Silicon-based nanophotonicsUltra-compact passive photonic ICs made by

means of CMOS-technology

Active photonic components in III-V membranes bonded to Silicon

Wafer-scale approach to the integration of Electronics Passive (nano)photonics Active (nano)photonics

Documents

Http://photonics.intec.UGent.be Photonics Research Group Integration of Photonic Functions in and with Silicon Roel Baets Wim Bogaerts, Pieter Dumon, Günther