Hardware Slides 10

8/3/2019 Hardware Slides 10

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DOC112: Computer Hardware Lecture 10 Slide 1

Lecture 10:

Traffic Lights

A Design Example




Traffic Light Circuit Design

The problem will be expressed in terms of a synchronous finite

state machine.

The number of required states and the number of flip-flops will

be determined.

The state transition table (with states) will be constructed.

Flip-flop outputs assigned to states and K-maps drawn.

Circuits will be minimised and the system tested.

In this lecture we will work through a design

example from problem statement to digitalcircuit. The design will start with a verbaldescription of the problem, after which:




The ProblemThe traffic department is trying out a new system of

traffic lights. We have to design a synchronous

digital system which operates this new type of traffic light at a road crossing.




The Problem (continued)

When the digital outputs are in the Logic-1 state theyturn their respective lights on.

There is one input which is set to Logic-1 for a quiet

junction and Logic-0 for a busy junction

There are six lights controlled

by 6 outputs:R1, A1, G1 for the North/Southdirection

R2, A2, G2 for the East/West

direction.




http://slidepdf.com/reader/full/hardware-slides-10 6/27DOC112: Computer Hardware Lecture 10 Slide 6

Construct the finite state machine

Problem:

Two states (3 and 6) have exactly the same outputs, can

they be merged as one state?

Junction=0

R1A1 G1 R2A2 G2

1 0 0 0 0 1

1 0 0 0 1 0

1 0 0 1 0 0

0 0 1 1 0 00 1 0 1 0 0

1 0 0 1 0 0

R1A1 G1 R2A2 G2

Junction=1

1 0 0 0 0 1

1 0 0 0 1 0

0 0 1 1 0 00 1 0 1 0 0

1

2

3

45

6

S t a

t e



Construct the finite state machine

Problem:

Two states (3 and 6) have exactly the same outputs, can

they be merged as one state?

Junction=0

R1A1 G1 R2A2 G2

1 0 0 0 0 1

1 0 0 0 1 0

1 0 0 1 0 0

0 0 1 1 0 00 1 0 1 0 0

1 0 0 1 0 0

R1A1 G1 R2A2 G2

Junction=1

1 0 0 0 0 1

1 0 0 0 1 0

0 0 1 1 0 00 1 0 1 0 0

1

2

3

45

6

S t a

t e

NO!!!



Select the type and number of flip-flops for the circuit.

Since the number of states is equal to six, the

minimum number of flip-flops is three.

It would be possible to use is six flip-flops (one flip-flop per state). This might simplify the design of

the circuit but it would be expensive in hardware.

For this design example (as normal) we will usethree D-type flip-flops. There will be two

unused states.



Assign flip-flop outputs to states

and construct the transition table.

There are some heuristic rules for assigning states

to flip-flop outputs, they are difficult to apply anddo not guarantee a minimum circuit (nothing really

does).




Assign flip-flops to states.

where input J = 1

denotes a quiet

junction

State State(now)(next)

0 (1) (2)0 (2) (3)0 (3) (4)0 (4) (5)0 (5) (6)0 (6) (1)0 (7) X0 (8) X1 (1) (2)1 (2) (4)1 (3) (X)1 (4) (5)1 (5) (1)1 (6) (X)1 (7) X1 (8) X

f-flops State

010 (1)

011 (2)

100 (3)

101 (4)

110 (5)

111 (6)000 (7)

001 (8)

J f-flops f-flops

(now) (next)

0 010 011

0 011 100

0 100 101

0 101 110

0 110 111

0 111 010

0 000 XXX

0 001 XXX

1 010 011

1 011 101

1 100 XXX

1 101 110

1 110 010

1 111 XXX

1 000 XXX

1 001 XXX




Find the minimum expressionsJ Q1Q2Q3 D1D2D3

0 0 0 0 X X X

0 0 0 1 X X X0 0 1 1 1 0 0

0 0 1 0 0 1 1

0 1 0 0 1 0 1

0 1 0 1 1 1 0

0 1 1 1 0 1 00 1 1 0 1 1 1

1 1 0 0 X X X

1 1 0 1 1 1 0

1 1 1 1 X X X

1 1 1 0 0 1 0

1 0 0 0 X X X1 0 0 1 X X X

1 0 1 1 1 0 1

1 0 1 0 0 1 1




Find the minimum expressionsJ Q1Q2Q3 D1D2D3

0 0 0 0 X X X

0 0 0 1 X X X0 0 1 1 1 0 0

0 0 1 0 0 1 1

0 1 0 0 1 0 1

0 1 0 1 1 1 0

0 1 1 1 0 1 00 1 1 0 1 1 1

1 1 0 0 X X X

1 1 0 1 1 1 0

1 1 1 1 X X X

1 1 1 0 0 1 0

1 0 0 0 X X X1 0 0 1 X X X

1 0 1 1 1 0 1

1 0 1 0 0 1 1




Check the unused states

Once the circles have

been decided we candeduce whether the don't

cares have been made 1s

or 0s. Any don't care in a

circle becomes a 1 thoseoutside circles are zeros.

All eight states can now

be included in the

transition diagram, andthe complete circuit

behaviour can be found.




Sf-flopsStateStatef-flops (now)(now)(next)

(next) 0 000 (7) (X) XXX

0 001 (8) (X) XXX

0 010 (1) (2) 011 0 011 (2) (3) 100 0 100 (3) (4) 101

0 101 (4) (5) 110 0 110 (5) (6) 111 0 111 (6) (1) 010 1 000 (7) (X) XXX

1 001 (8) (X) XXX

1 010 (1) (2) 011 1 011 (2) (4) 101

1 100 (3) (X) XXX 1 101 (4) (5) 110 1 110 (5) (1) 010 1 111 (6) (X) XXX






(next) 0 000 (7) (X) XXX

0 001 (8) (X) XXX

0 010 (1) (2) 011 0 011 (2) (3) 100 0 100 (3) (4) 101

0 101 (4) (5) 110 0 110 (5) (6) 111 0 111 (6) (1) 010 1 000 (7) (X) XXX

1 001 (8) (X) XXX

1 010 (1) (2) 011 1 011 (2) (4) 101

1 100 (3) (X) XXX 1 101 (4) (5) 110 1 110 (5) (1) 010 1 111 (6) (X) XXX


(4) 101(3) 100

(4) 101(4) 101

(3) 100

(1) 010

Ch k h d





(next) 0 000 (7) (X) XXX

0 001 (8) (X) XXX

0 010 (1) (2) 011 0 011 (2) (3) 100 0 100 (3) (4) 101

0 101 (4) (5) 110 0 110 (5) (6) 111 0 111 (6) (1) 010 1 000 (7) (X) XXX

1 001 (8) (X) XXX

1 010 (1) (2) 011 1 011 (2) (4) 101

1 100 (3) (X) XXX 1 101 (4) (5) 110 1 110 (5) (1) 010 1 111 (6) (X) XXX


Disaster

- the

system

gets

stuck in

State 3.!

(4) 101(3) 100

(4) 101(4) 101

(3) 100

(1) 010




Construct the Complete TransitionDiagram

S Statet Statet+1

0 (1) (2)

0 (2) (3)

0 (3) (4)

0 (4) (5)

0 (5) (6)

0 (6) (1)

0 (7) (4)

0 (8) (3)

1 (1) (2)

1 (2) (4)

1 (3) (3)

1 (4) (5)

1 (5) (1)

1 (6) (1)

1 (7) (4)

1 (8) (4)

T d R i if N




Test and Repair if Necessary

J Q1 Q2 Q3 D1 D2 D3

1 1 0 0 1 0 0

The problem occurs at one line in the transition table

We could solve it by changing D3 to a 1. This could be done

with one additional circle on the D3 Karnaugh map.

Construct the Output Circuits Truth




Construct the Output Circuits TruthTableThere are six such circuits and they have three inputs

only. Their truth tables can be filled out by the statesof the lights which are either ON or OFF for each

given system state.

STATE Q1 Q2 Q3 R1 A1 G1 R2 A2 G2

1 0 1 0 1 0 0 0 0 1

2 0 1 1 1 0 0 0 1 0

3 1 0 0 1 0 0 1 0 0

4 1 0 1 0 0 1 1 0 0

5 1 1 0 0 1 0 1 0 0

6 1 1 1 1 0 0 1 0 0



C h O Ci i K




Construct the Output Circuits K-maps

We have the following circuits to




D1 = Q2' + J'•Q1•Q3' + Q1'•Q3

D2 = Q1•Q3 + Q2•Q3'

D3 = Q2'•Q3' + J'•Q3' + J•Q1'

R1 = Q1' + Q2'•Q3' + Q2•Q3

A1 = Q1•Q2•Q3' or Q2•Q1•Q3'

G1 = Q2'•Q3

R2 = Q1

A2 = Q1'•Q3

G2 = Q1'•Q3'

We have the following circuits tobuild:

Terms that appear more than once are

underlined

T A Diff t St t A i t




Try A Different State AssignmentIf we want to try to find a simpler overall circuit, we

may try different flip-flop assignments for the

states. One idea is to minimise the output circuitry.We could, for example, try setting Q1=R1 and Q2=R2, to seeif these simple assignments will give us a correct completestate assignment.

STATE Q1 Q2 Q3 R1 A1 G1 R2 A2 G21 1 0 0 1 0 0 0 0 1

2 1 0 1 1 0 0 0 1 0

3 1 1 1 1 0 0 1 0 0

4 0 1 1 0 0 1 1 0 0

5 0 1 0 0 1 0 1 0 06 1 1 0 1 0 0 1 0 0

7 0 0 0 X X X X X X

8 0 0 1 X X X X X X




A Different State Assignment(The output logic is simplified)

A Different State Assignment




A Different State Assignment(The state sequencing logic lookssimpler)

This circuit seems to be simpler than the first, but whether it

is cheaper or not can be established only after the circuit is

designed and costed.

A Diff S A i




A Different State Assignment(Transition diagram )

The circuit looks safe enough

S Statet Statet+1

0 (1) (2)

0 (2) (3)

0 (3) (4)

0 (4) (5)

0 (5) (6)

0 (6) (1)0 (7) (3)

0 (8) (3)

1 (1) (2)

1 (2) (4)

1 (3) (4)

1 (4) (5)1 (5) (1)

1 (6) (1)

1 (7) (2)

1 (8) (4)

A Different State Assignment (The




A Different State Assignment (Thefinal circuit)

D1 = J'•Q2'+Q3’

D2 = J'•Q1'+Q3

D3 = Q2'+Q1•Q3

R1 = Q1

A1 = Q1'•Q3' G1 = Q1'•Q3

R2 = Q2

A2 = Q2'•Q3

G2 = Q2'•Q3'

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Hardware Slides 10