© 1999 Foundry Networks, Inc.

Hardware Group Status

January 7th, 2003

Karl Triebes

© 1999 Foundry Networks, Inc.Foundry Networks Proprietary and Confidential

New Enterprise PlatformsProject Chips

AvailableTarget

Release

Status Est. COGS

Line power FES 2402

Now Q1 600 W power supply availability is issue – will need to do risk order of 100 units to meet delivery dates

Power On 12/27 – Completed

$1200

Line power FES 4802

Now Q2 Release to layout on 1/8 – On track $1500

FES 12 GC/GF Now Q1 Power on target 1/15 – Ahead of schedule In house on 1/8

$2000 w/optics

24 Port GOC Samples - Now

Prod. – Q1Q2 Release to layout on 1/7

Late changes from Marvell on layout rules

SW Resources?

$1450

48 Port GOC Samples - Now

Prod. – Q1Q2 Schematic entry – Schematic review 1/21

SW Resources?$2350

24 Port GOC+2x10GE

Samples – Q1

Prod. – Q3Q3 Not Started - Resources $3700

w/o optics

48 Port GOC+2x10GE

Samples – Q1

Prod. – Q3/Q4Q4 Not Started - Resources $4700

w/o optics

8x10GE Stackable Samples – Q1/Q2

Prod. - Q3/Q4Q3 Schematic entry started – Waiting on ASICs from

Marvell$7500

w/o optics

New Modular System

Samples – Q1/Q2

Prod.- Q3/Q4Q4 In Design – PCI control plane presenting some

issues

Looking at 40G per slot requirement

TBD

© 1999 Foundry Networks, Inc.Foundry Networks Proprietary and Confidential

Enterprise Product Status

Project

Target Release

Date Status

24FX December ‘02

DONE

~27 units available to ship pending 7.6.02 release

2x10GE Jan 20th Production revision cards in house – looking at a few intermittent CRC errors on cards (might be backplane related).

More test needed – QA not started, Stress test, ETC..

Estimated date: Mid Feb

Cost Reduced Power Supply for stackable

Mar ’03 Noise reduction included

Contract released to power supply vendor

New supply will cost approximately $45 versus $58

Cost Reduced 48T Module

January ‘03 In QA

Re-spun card for production in house on 1/10

Cost Reduced 48E Module

January ‘03 Production version fab in QA

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Service Provider HW Status

Project

Target Release

Date Status

OC-48 NA No Problems pending

PRAM bug – Fixed

Ageing bug – Fixed

M5/VM1 NA No problems pending

Feature request to add TOS modification to FPGA – estimated effort is 2 weeks.

OC3/12 NA No problems pending

GigNPA Q1 ‘03 Testing slow – Needs to be completed by 1/15 to meet Q1 release date

No pending issues (at least that we know about!)

M6 Q2 ‘03 FGPAs in progress (Chi)

Schematic entry not started – Resource tangled-up with supporting various production and customer issues

8 port Gig NPA – a.k.a. ‘Big Kahuna’

Q3 ‘03 Analyzing IPv6 requirements and impact on FPGA architecture

SI-XL Replacement Q3/Q4 Single ASIC architecture COGs @ $3500 loaded

© 1999 Foundry Networks, Inc.Foundry Networks Proprietary and Confidential

Enterprise HW - Mucho Grande

• Completed demonstration of L2 switching code and HW on 12/31

• 2 blades + Management + Switch fabric• Same demo will be used for

• Goal this week is to run full mesh of all 8 blades• 1 port on 8 blades run simultaneously before Jan 1• 32 ports on all 8 blades

• Production version chassis in house

• ASIC respins • Metal-only respin – changes to die• Cost = $110K per ASIC ($220K total for both)• SXB & IBT

• Tape out end of January• ASICs in house in mid-March

• Will not affect integration activities

© 1999 Foundry Networks, Inc.Foundry Networks Proprietary and Confidential

Issues• JICPAC – Evaluating whether PLL instability in IGC-300/400 is the culprit

• Potential cold susceptibility with IGC-300 blades (May be CAM related as well)• PLL bypass rework does appear to eliminate problem in preliminary tests• IGC-400 blades do not appear to experience this failure

• Cerner – 3 problems• Crashed management blade – SW believes this to be a HW failure. TAC

attempting to reproduce.• Buffer depletion on 48E blade – Blade received last week – TAC attempting to

reproduce• periodic packet corruption on 48T blade

• Eagle Alliance• Packet corruption in 15K with worst case patterns – appears to be 15K related

• M4 Crashes (Cable and Wireless)• Conference call held with IBM today – failed chip passes verification but fails

‘functional’ test at low temperature in a Apple computer• Resolution from IBM will be slow• May be seeing related failures at other customers(Cerner), however, need to get

cards back in house

© 1999 Foundry Networks, Inc.Foundry Networks Proprietary and Confidential

Issues Continued

• Yield issue with BXGMR4, B8G-A, BXG modules• Associated with mixed speed grade flag RAMs – Samsung + Micron• AVL will be changed to standardize on Micron

• Other items• Need to get CM on line with 15K testing• Analyzing whether speed grade binning of SMCs can help improve

timing margins in 15K environment• Received timing models from TI for all SMCs – negative hold time margins

> 5 ns in some cases• Adding in trace length delays from cards to get composite timing model• This will help us develop a means to ensure that timing margins are met

under all cases

© 1999 Foundry Networks, Inc.Foundry Networks Proprietary and Confidential

Personnel

• Open requisitions• HW Manager – Service Provider HW (new)• 3 board level designers (new)• 1 diagnostic engineer (replacement for Frank

McMurray)