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Handling Mixed-Criticality in SoC-based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha Presented by Rafael Olaechea 1

Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Page 1: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Handling Mixed-Criticality in SoC-based Real-Time Embedded Systems

Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

Presented by Rafael Olaechea

Page 2: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Platform Based Design for Safety Critical Systems

• Platform-Based Design of Embedded Systems– Reuse of a set of libraries and components– Automatic Generation of implementation– Help perform model checking on generated

systems

Page 3: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Platform Based Design for Safety Critical Systems

• Platform-Based Design of Embedded Systems– Reuse of a set of libraries and components– Automatic Generation of implementation– Help perform model checking on generated

systems• But Safety Critical Systems have special needs– Isolation of safety critical from non-safety critical

processes– Ensures isolation at runtime

Page 4: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Architecture Description Language

• Specifies logical functionality and requirements– Processes • Computation (Period, Deadline, Execution)• Communication Requests (number of frames, and

deadline)

Page 5: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Architecture Description Language

• Specifies logical functionality and requirements– Processes

• Computation (Period, Deadline, Execution)• Communication Requests (number of frames, and

deadline)

• Specifies Hardware Platform– Processor– Memory– Bus

Page 6: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Enforcing Safety of low criticality tasks

• Based on AADL specified requirements– Functional Certificate• Runtime Monitoring of Events

– Example with Programmer and Pacer interface

– Timing Certificate• Ensuring Communication and computation bounds

Page 7: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Pacemaker Platform

Page 8: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Pacemaker Platform

Timing Constraints will be enforced by process scheduler

Page 9: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Wrappers Enforcing Communication Safety

• Bus Safety– A timeslot is assigned to each process– Hardware wrapper prevents data being sent if

frame is not for the process

Page 10: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Wrappers Enforcing Communication Safety

Page 11: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Wrappers Enforcing Communication Safety

Page 12: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Wrappers Enforcing Communication Safety

Page 13: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Runtime Monitoring of tasks

Task (HW or CPU) Event Specification

Corrective Action or Disabling of Action

Page 14: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Runtime Monitoring of tasks

Task (HW or CPU) Event Specification

Corrective Action or Disabling of Action

Specification Logic:

Page 15: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Runtime Monitoring of tasks

Task (HW or CPU) Event Specification

Corrective Action or Disabling of Action

Specification Logic:Extended Regular ExpressionsPast Time Linear Temporal Logic

Page 16: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Runtime Monitoring of tasks

Task (HW or CPU) Event Specification

Corrective Action or Disabling of Action

Specification Logic:Extended Regular ExpressionsPast Time Linear Temporal LogicSymbolic names for queues and read/writes

Page 17: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Programmer Process updating heartbeat rate

Programmer process will update parameters based on RF module input

Page 18: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Programmer Process updating heartbeat rate

Programmer process will update parameters based on RF module inputBut Pacer and Rate Adapter are more critical

Page 19: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Programmer Process updating heartbeat rate parameters

Programmer process will update parameters based on RF module inputBut Pacer and Rate Adapter are more critical

Page 20: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Programmer Process updating heartbeat rate parameters

Programmer Rate Adapter PacerParameter + Check

Page 21: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Programmer Process updating heartbeat rate parameters

Programmer Rate Adapter PacerParameter + Check

Success

Page 22: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Programmer Process updating heartbeat rate parameters

Programmer Rate Adapter PacerParameter + Check

Success

Parameter + Check

Success

Page 23: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Programmer Process updating heartbeat rate parameters

Programmer Rate Adapter PacerParameter + Check

Success

Parameter + Check

Success

Commit

Page 24: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Programmer Process updating heartbeat rate parameters

Programmer Rate Adapter PacerParameter + Check

Success

Parameter + Check

Success

CommitCommit

But Programmer could fail after one commit causing discomfort to patient

Page 25: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Solution: Extract the commits logic into the certified monitors

• Events are specified in terms of values read/writes to/from symbolic queues

Page 26: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Solution: Extract the commits logic into the certified monitors

• Monitor sends the commit commands once success are received

Page 27: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Solution: Extract the commits logic into the certified monitors

• Prevent Programmer from sending commits or checks before receiving an answer

Page 28: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Programmer Process updating heartbeat rate parameters

Programmer Rate Adapter PacerParameter + Check

Success

Parameter + Check

Success

Monitor

Commit

Commit

Page 29: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Platform controlling Battery life

Page 30: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Schedule Generation and Timing Isolation

• Communication Requests– Periodic task to be assigned to the communication

bus• Computation Requests– Periodic task to its processor

• Earliest Deadline Schedule Generated– Statically for hyper-period

Page 31: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Schedule Generation and Timing Isolation

Rate Data and SignalBuffer write are part of the communication infrastructure processor

Page 32: Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha

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Conclusions

• Helps combining low and high criticality tasks– Low Priority task safe behavior enforced• Timing• Logically

• Model tasks requirements on AADL– Computation– Communication– Generate Safe Schedules