36 High Frequency Electronics

High Frequency Design

GSM SYNTHESIZER

Simulating and Designing aPLL Frequency Synthesizerfor GSM Communications

By Samir Kameche, Mohammed Feham, University of Tlemcen, and Mohamed Kameche, Center of Space Techniques, Algeria

Phase locked loops(PLL) are used inalmost every com-

munication system. Someof the uses include recov-ering clock from digitaldata signals, performingfrequency, phase modula-

tion and demodulation, recovering the carrierfrom satellite transmission signals and as afrequency synthesizer. It is very well knownthat there are many designs in communica-tion that require frequency synthesizers togenerate a range of frequencies; such as cord-less telephones, mobile radios and other wire-less products. The accuracy of the required fre-quencies is very important in these designs asthe performance is based on this parameter.Using crystal oscillators to generate frequencyis not only impractical, but it is impossible touse many crystal oscillators for multiple fre-quencies. In the last decade, most frequencysynthesizers are based on the PLLs, regardingtheir advantages as minimum complex archi-tecture, low power consumption and integra-tion technology possibilities. In practice, thereare three basic types of frequency synthesizer:direct frequency synthesiz-er, direct digital frequencysynthesizer and indirectfrequency synthesizer. Theindirect frequency synthe-sizer has advantages overthe other two types, includ-ing low power consumption,low phase noise, and highstability [1]. Consideringthe scope of this single cir-cuit, this work is devoted to

the design of an indirect frequency synthesiz-er that can be applied to GSM communica-tions. In the simulation, we include the phasenoise in each component in the circuit, and wediscuss the reference spurs and their effect onthe noise performance of the PLL frequencysynthesizer. The success of this designdepends crucially on the accuracy of the val-ues calculated for the loop filter. In our case,the loop filter is accurately evaluated by usingan efficient estimation technique.

Design and Theory The basic phase-lock-loop configuration

considered in the design is shown in Figure 1.The PLL consists of a high stability crystalreference oscillator, a frequency synthesizer, avoltage controlled oscillator (VCO), and a pas-sive loop filter. The frequency synthesizerincludes a phase detector, current modecharge pump, and programmable frequencydividers. A passive filter is desirable for itssimplicity, low cost, and low phase noise.

In the loop, a low pass filter is incorporat-ed in order to suppress spurs produced in thephase detector and to avoid unacceptable fre-quency modulation in the VCO [2].

Here is a case historydescribing the design

process, including selectionof components based on

their effects on the PLL’snoise characteristics

Figure 1 · Block diagram of the designed frequency synthe-sizer.

From December 2008 High Frequency ElectronicsCopyright © 2008 Summit Technical Media, LLC

38 High Frequency Electronics

High Frequency Design

GSM SYNTHESIZER

Figure 2 shows the standard third order loop filterused in such circuits. This comprises a second order filtersection and a R3–C3 section providing an extra pole toassist the attenuation of the sidebands that appear atmultiples of the comparison frequency.

The transfer function of the loop filter in Figure 2 isgiven by

(1)

where Z(s) describes the transfer function of the secondorder loop filter, as given by

(2)

The open loop transfer function is defined as thetransfer function from the phase detector input to theoutput of the PLL. Note that the VCO gain is divided bya factor of s. This is to convert output frequency of theVCO into a phase. The open loop transfer function isshown below

(3)

The closed loop transfer function takes into accountthe whole system and does not assume that the phase ofone of the phase detector inputs is fixed at a constant zerophase.

(4)

The transfer function in (4) involves an output phasedivided by an input phase. By considering the change inoutput frequency produced by introducing a test frequen-

cy at various points in the PLL loops, all of the transferfunctions can be derived.

As mentioned in the introduction, in order to guaran-tee accurate results for the design, the effect of the noisein each component in the circuit is introduced in the sim-ulation. First, the noise in the reference oscillator isamplified by the gain of the closed loop transfer function.A simple approximation for this source of noise due to thereference crystal itself, as with any oscillator, is inverselyproportional to the offset frequency. Higher order approx-imations can be used but the experience has demonstrat-ed that the 1/f approximation is a good starting point forthis study.

If a temperature compensated crystal oscillator(TCXO) is employed, phase noise data should be obtainedfrom the manufacturer so that reference values can beused with the models.

The noise in the reference oscillator, Ntcxo(f), isexpressed by [3]

(5)

The reference spurs are also introduced in the simula-tion. The powers of these spurs are calculated by theclosed loop transfer function evaluated at the spur offsetfrequencies, Fspur. In several studies, Fspur is assumed tobe a multiple of the comparison frequency, Fcomp.

The power of the reference spur is expressed by [4]

(6)

The VCO noise can be modeled as a simple approxi-mation inversely proportional to offset frequency from thecarrier. The noise of the VCO is effectively high-pass fil-tered by the PLL providing rejection of phase noise orphase error within the bandwidth, but leaving VCO noisewell outside of the loop bandwidth unaffected. The VCOnoise is given by [5]

(7)

Results and DiscussionThe phase-locked loop allows stable high frequencies

to be generated from a low-frequency reference. Any sys-tem that requires stable high frequency tuning can bene-fit from the PLL technique. A good example of a PLL

Nvco KvcoKvco

fKvco

f= + +2

23

3

Spur FK Z s K

sGain Spur( ) = ( )⎡

⎣⎢

⎤

⎦⎥20 log

VCO φ

N f

N

ff

K fRtcxo

tcxo ref

tcxo ref

( ) =

⎛⎝⎜

⎞⎠⎟

( )⎛⎝⎜

⎞⎠⎟

1020 1

_

_

. .

K sG sG s N

( ) = ( )+ ( )1 .

G sK Kvco Z s

s N( ) = ( )φ .

.

Z ss C R

s C C R s C s C( ) = +

+ +. .

. . . .2 2

21 2 2 1 2

1

ZZ s

C s

Z s RC s

fil33

33

1

1=

( ) ⎛

⎝⎜

⎞

⎠⎟

( ) + +⎛

⎝⎜

⎞

⎠⎟

..

..

Figure 2 · Loop filter circuit.

40 High Frequency Electronics

High Frequency Design

GSM SYNTHESIZER

application is a GSM handset or base station. Moreover,an extended GSM (EGSM) system with only 10 MHzbetween the transmission band and reception band canbe supported simply by extending the frequency band.

The handset has a transmit (Tx) range of 880 MHz to915 MHz and a receive (Rx) range of 925 MHz to 960MHz. Conversely, the base station has a Tx range of 925MHz to 960 MHz and an Rx range of 880 MHz to 915MHz. For this example, we will consider just the base sta-tion transmit and receive sections.

The essential component used to realize the PLL is afrequency synthesizer capable to generate and to controla very stable signal with a low noise in the frequencyrange of 500 MHz to 1.2 GHz. The voltage controlled oscil-lator used in this application is capable to generate apower of +8.6 dBm into a load of 50 ohms. Its tuning lin-earity is relatively good (21-36) MHz/V. We note that thelinearity is very important to determine the loop filterparameters. Also, this VCO presents a pulling of 5 MHz,a pushing of 0.6 MHz/V and a phase noise of –70, –94,–114 and –134 dBc/Hz at the offset frequencies of 1 kHz,10 kHz, 100 kHz and 1 MHz, respectively. The crystal ref-erence oscillator is a TCXO capable of generating a verystable frequency of 10 MHz with a phase noise of –110dBc at an offset frequency of 10 kHz. The PLL can be pro-grammed via a laptop computer and parallel port cable.

Figures 3, 4 and 5 illustrate, respectively, the phasenoise in each component (TCXO, phase detector andVCO), noises generated by resistances and the total noisewithout and with the noise generated by resistances. Wenote that the references spurs are not included in thetotal noise shown in Figure 5. The results show thatinside the loop bandwidth (10 Hz to 10 kHz), the noiselevel of the reference oscillator is more significant owingto the fact that the gain of the closed loop transfer func-tion is high in this band and falls off quickly outside.

The results also show that the resistor noise contribu-tion is very small at the synthesizer output.

In order to demonstrate that the noise of the VCO ishighly filtered by the PLL, by rejecting the phase noise orerror of phase in the bandwidth, Figure 6 exposes the looperror response. This function is obtained by associationbetween the open and closed loop responses.

In this work, the choice of the loop filter is a very crit-ical part of the synthesizer circuit. In general, a low loopfilter cut-off frequency does not attenuate the phase noisemuch, but it makes the PLL’s response slower, increasingthe time to change frequency (PLL lockup time), but itsuppresses the references spurs. Conversely, a high cut-off frequency provides faster PLL response, shorter PLLlockup time, while the output signal contains higher levelreference spurs. Consequently we note that at the time

Figure 3 · TCXO, phase detectorand VCO noise.

Figure 4 · Noise in resistors versusfrequency.

Figure 5 · SSB phase noise with andwithout resistor noise

Figure 6 · Loop error response. Figure 7 · PLL output spectrum. Figure 8 · PLL transient response.

December 2008 41

when a problem is solved, another is created. This is whydetermining the best choice of the loop filter remains agreat interest to microwave circuit designers.

An accurate estimation of the loop filter is used, whichguarantees the precision of the design. The output spec-trum and the transient response of a chosen loop filterdesign are illustrated in Figures 7 and 8. The spuriouslevels, the phase noise and the frequency transition areevaluated under several conditions.

The results obtained indicate a noise density of –75.4dBc/Hz at multiples of the comparison frequency, a set-tling time of frequency switching (frequency change of 35MHz) of about 250 µs, an RMS phase noise of 0.01633 radand a signal to noise ratio (S/N) of about 35.74 dB.

ConclusionThe simulation and the design of a frequency synthe-

sizer operating in EGSM band are presented in thispaper. The present design takes into account the noise ineach component and its effect on the performance system.The obtained output spectrum presents a noise density of–75.4 dBc/Hz at multiples of comparison frequency, alockup time of 250µs, an rms phase error of 0.01633 radand a signal on noise ratio (S/N) of 35.74 dB. These per-formances confirm and justify the use of such circuits inmodern communication systems.

References1. Jwo-Shiun Sun, “Design A Frequency Synthesizer

for Mobile Communication Systems,” Microwave & RF,Vol. 39, No. 11, November 2000, pp. 63-72.

2. Akihiro Kajiwara and Masao Nakagawa, “A NewPLL Frequency Synthesizer with High Switching Speed,”IEEE Transactions on Vehicular Technology, Vol. 41, No.4, November 1992, pp. 407-413.

3. L. Lascari, “Accurate Phase Noise Prediction in PLLSynthesizers,” Applied Microwave and Wireless, Vol. 12,No. 2, pp. 30-38, February 2000.

4. D. Banarjee, PLL Performance, Simulation, andDesign, 2nd Edition, 2001, pp. 13-67.

5. E. Drucker, “Model PLL Dynamics and Phase-noisePerformance,” Microwave & RF, Vol. 39, No. 2, February2000, pp. 73-82.

Author InformationSamir Kameche was born in Ghazaouet, Algeria, in

1981. He received his electrical engineering degree inelectronics in 2004 and the Master degree in 2007 fromthe University of Tlemcen, Algeria. Since 2004, he hasbeen with the Department of Electronics at theUniversity of Tlemcen. His research interests include dig-ital frequency synthesizers for microwave circuit applica-tions. He can be reached at: kamsamir@yahoo.fr

Mohammed Feham received the Doctor-Engineer

degree in optical and microwave communications fromthe University of Limoges (France) in 1987 and theDoctor Es-Science degree from the University of Tlemcen(Algeria) in 1996. Since 1987, he has been assistant pro-fessor and professor of microwave and communicationengineering. His research interest is in computationalelectromagnetics, especially in the computer modeling ofreciprocal and nonreciprocal microwave components (cou-plers, filters, novel dielectric materials, etc.). Dr. Fehamhas served on the scientific council and other committeesof the electronic Department of the University ofTlemcen.

Mohamed Kameche graduated in Electronics from theUniversity of Tlemcen in 1998, where he also received theMaster and Ph.D degrees in Electronics (Signals andSystems) in 2001 and 2005, respectively. From 2000 to2001, he worked in the Department of Electronics at theUniversity of Tlemcen as an associate researcher. SinceFebruary 2002, he has been working withInstrumentation Division in the Centre of SpaceTechniques (CTS) at Arzew, Oran, Algeria. His researchinterests are temperature effects on RF and microwavedevices and package modeling for space microwave circuitapplications.