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GLOBALFOUNDRIES US Technical Seminar2014 | e-Book
GLOBALFOUNDRIES Direction Chuck Fox Senior Vice President, Worldwide Sales
1970s 80s 90s 00s 10s 20s
Mobility Drives the Wave of Computing Evolution Are we now at another inflection point?
Internet of Things
wireless wireless wired wireless wired
Bandwidth 28kbps 10kbps 100kbps 1Mbps 10Mbps
~1M ~10M ~100M ~1B ~100B Unit Shipments
GLOBALFOUNDRIES Confidential 2
Source: IDC, Gartner, ABI
The Device Opportunity Is Increasing
12 148
261 292 420 485
769
1839 2018 Projection Millions of Annual Unit Shipments
GLOBALFOUNDRIES Confidential 3
42 46
50 53 57
61
13% 13% 14% 15% 15% 15%
2014E 2015E 2016E 2017E 2018E 2019E
Foundry revenue
% Industry
Results: A Robust Foundry Opportunity Foundry revenue ($B), % of semi industry sales Revenue by mainstream and advanced nodes
Source: IHS iSuppli, Jan 2014 for long-range forecast; Gartner, July 2014 for node split
CAGR (2014-19E) Foundry: 8% Semi industry: 3%
30 30 30 31 32 33
13 16 19 22
25 28 42
46 50
53 57
61
2014E 2015E 2016E 2017E 2018E 2019E
Advanced (
Leading-Edge Solutions First Pure-Play Foundry to Ship FinFET
High Performance Computing
Wired Applications, Networking
Consumer, Wireless, Mobile Computing
* Customer specific offering
28SLP
20LPM
28HPP
14nm
32/28 Custom*
10nm
SLP = Super Low Power HPP = High Perf Plus LPS = Low Power PolySi LPM = Low Power Mobile
28LPS*
GLOBALFOUNDRIES Confidential 5
J A new strategic collaboration between GLOBALFOUNDRIES and Samsung
J Provides unprecedented global capacity for leadership 14nm FinFET technology
J Gives customers choice and assurance of supply that can only come from true design compatibility at multiple sources across the globe
J Addresses industry needs with a necessary advancement of the foundry supply chain model
J Covers both 14LPE and 14LPP, the leading choice for high-volume, power-efficient SoC designs
GLOBALFOUNDRIES & Samsung Collaboration
GLOBALFOUNDRIES Confidential 6
GLOBALFOUNDRIES to Acquire IBM Microelectronics Business
7
Strengthens our technology and IP portfolio Includes significant intellectual property, world-class technologists
Positions us as IBMs exclusive provider Exclusive supplier for 22nm, 14nm and 10nm for the next 10 years
Broadens our portfolio for customers Expands capacity and capabilities to serve growth segments, particularly in radio frequency (RF) and ASIC design
Expands R&D collaboration in Albany Solidifies roadmap to 10nm technology and beyond
GLOBALFOUNDRIES Confidential
Mixed-Technology Solutions Based on Proven, Mainstream Processes
Target applications J Power management
J MCU J Secure ID
J Wireless connectivity
J Smart displays J Digital audio
GLOBALFOUNDRIES Confidential 8
Mainstream (180nm 40nm) processes
Analog/ Mixed-signal
RF/ mmWave
Logic
High Voltage
Memory J OTP J MTP J SRAM
Committed to Your Long-Term Capacity Requirements
Regional Offices Manufacturing Centers
Austin, TX
East Fishkill, NY
Munich Amsterdam
Abu Dhabi, UAE
Yokohama, Japan Shanghai, China
Hsinchu, Taiwan
$15 Billion Investment
Dresden, Germany Singapore Malta, New York
28nm, 20nm, 14nm
The World is Flat Fast VELOCITY J Competition Greater Than Ever
Whatever youre working on Almost guarantee someone else is also working on it
J Customer Demands Greater Than Ever Collaboration / Innovation Solve problems at the customer Transparency Data at same time as customer Predictive Analytics What will happen and why
SMAC Mainframe Client/Server Web SMAC - Social
Mobile Analytics Cloud
GLOBALFOUNDRIES Confidential 10
User Experience Chip company must understand needs of the user experience and how it puts
demands on the silicon chip
The Era of Analytics SMAC Social Mobile Analytics Cloud
Integrator / Foundry
IP EDA Bump/ Sort Assembly Design Test
Chip Company
Fabless Systems Company
GLOBALFOUNDRIES Confidential 11
The New Competition
Fabless Systems Company
The New Continuum
GLOBALFOUNDRIES Confidential 12
Product Life Cycles are Shorter than Ever
GLOBALFOUNDRIES Confidential 13
Life Cycle (Days)
1
10
100
1000
10000
1990 1995 2000 2005 2010 2015
MAX
MIN
Perishable
Record Results, Performance & Execution
Technology Leadership and Collaborative Approach
The Total Global Solution Process Design Customer Focus Support Capacity
We Listen We Execute We Lead
4Q 1Q 2Q 3Q 4Q 1Q 2Q 3Q
GLOBALFOUNDRIES Confidential 14
GLOBALFOUNDRIES Roadmap Gregg Bartlett Senior Vice President, Product Management
GLOBALFOUNDRIES Confidential 2
Strategic Transaction
GLOBALFOUNDRIES TO ACQUIRE IBM'S MICROELECTRONICS BUSINESS
Acquisition Enables GLOBALFOUNDRIES to Become a World Leader in Semiconductor Foundry Technology;
IBM to Focus on Fundamental Semiconductor Research and Systems Innovation ARMONK, N.Y., and SANTA CLARA, Calif., October 20, 2014: IBM (NYSE: IBM) and GLOBALFOUNDRIES today announced that they have signed a Definitive Agreement under which GLOBALFOUNDRIES plans to acquire IBM's global commercial semiconductor technology business, including intellectual property, world-class technologists and technologies related to IBM Microelectronics, subject to completion of applicable regulatory reviews. GLOBALFOUNDRIES will also become IBM's exclusive server processor semiconductor technology provider for 22 nanometer (nm), 14nm and 10nm semiconductors for the next 10 years.
As part of this Agreement, GLOBALFOUNDRIES will gain substantial intellectual property including thousands of patents, making GLOBALFOUNDRIES the holder of one of the largest semiconductor patent portfolios in the world. GLOBALFOUNDRIES also will benefit from an influx of one of the best technical teams in the semiconductor industry, which will solidify its path to advanced process geometries at 10nm and below. Additionally, the acquisition opens up business opportunities in industry-leading radio frequency (RF) and specialty technologies and ASIC design capabilities.
"This acquisition solidifies GLOBALFOUNDRIES' leadership position in semiconductor technology development and manufacturing, said Dr. Sanjay Jha, CEO, GLOBALFOUNDRIES. We can now oer our customers a broader range of dierentiated leading-edge 3D transistor and RF technologies, and we will also improve our design ecosystem to accelerate time-to-revenue for our customers. This acquisition further strengthens advanced manufacturing in the United States, and builds on established relationships in New York and Vermont.
3
Specialty Foundry Business
Factory: Essex Junction, VT 200mm wafer production
Portfolio Expansion: Key Product Areas PA/FEM and Transceivers HP Performance RF/Analog Mixed Signal (SiGe) High Voltage/Power Management
Specialty Foundry Business addresses growth opportunities in Mobile RF
Transaction strengthens leadership position in RFSOI and SiGe servicing high growth mobile customers
Specialty Foundry: RF Front End Module (FEM) Market TAM
2011 2012 2013 2014E 2015E 2016E 2017E 2018E
RF Switch/Tuner TAM Cellular PA TAM WiFi LNA+Switch TAM WiFi PA TAM
4 Source: GLOBALFOUNDRIES Strategy Analytics
5
Custom Logic / ASIC Business
Factory: East Fishkill, NY 300mm wafer production
Wired Communications Enterprise and service provider switches and routers High-performance SOC with embedded memories (eDRAM, TCAM, AMP), HS SERDES and embedded processors
Wireless Communications Infrastructure Mobile base stations, network controllers and gateways Utilizing eDRAM, TCAM, HS Serdes and embedded processors in SOC solution
Storage Storage networking infrastructure switches, directors and adapters Leveraging embedded memories and HSS for converged networking SoCs with embedded processors
6
Worldwide ASIC TAM: CAGR 6.5%
Source: Gartner Market Statistics
0
5,000
10,000
2013 2014 2015 2016 2017 2018
Wired and Wireless Communications ASIC TAM ($M)
7
Northeast Technology Corridor East Fishkill, NY
300mm facility, ~14kwpm Custom ASIC Server Microprocessors
Essex Junction, VT 200mm facility, ~40kwpm Specialty Foundry HV Power Management,
RF
Fab 8, Malta
Major investment In Northeast Technology Corridor Gives boost to advanced manufacturing and technology in the U.S.
Leverages the scale and proximity of our fabs, near key IBM R&D locations in NY
Leverages joint development alliance to solidify roadmap to 10nm and beyond
CNSE, Albany
Strengthens Our Foundry Position
8
Reinforces our long-term commitment to manufacturing and technology leadership
Expands segment growth via ASIC and RF businesses world-class design IP application knowledge
Becomes IBMs sole-source foundry partner Single-source system customer delivering HPC solutions
R&D expertise to ensure path to 10nm and beyond
Strategic relationships with top OEM industry players Wired Communications, Base Stations
Mega Trends Driving Semiconductors
Networks and Storage: shift from hardware focus to applications-centric infrastructure
Mobile computing: converge functions and drive compute power
Internet of Things: mobile processing at low power with ubiquitous RF
Next-Gen Wireless: Coverage and bandwidth needs
Information Security: at all levels: government, enterprise and personal
Platform Owners: Growing semi skills engagement model shifting
GLOBALFOUNDRIES Confidential 9
Market Segments Characteristics
Power
Per
form
ance
Data Centers Networking Specialty
IoT devices* (Medical, Wearable)
Ultra-low-power SoC ULV Digital(0.6V) ULV RF (
IoT: Extremely challenging design requirements
Radio +
Front-End
ADC
32 bit Micro Controller
DAC
IoT node chipset
Power Mgmt
BB
MEMS
Design Constraints 1. Signal Chain as complicated as a cell phone 2. Cost < 1/100th of a cell phone 3. Size < 1/1000th of a cell phone 4. Power Consumption < 1/1000th of a cell phone
Past Future
Time to Market $1
LOGIC RFCMOS High
Voltage BCDlite OTP MTP eFLASH EEPROM RFSOI
Si BICMOS
10nm
14nm
22/20nm
28nm
40/45nm
55nm
65nm
130nm
180nm
Comprehensive Technology Portfolio GLOBALFOUNDRIES Offerings
Available In development
Wide Range of Mainstream Nodes & Options Addressing Sensors to Servers
GLOBALFOUNDRIES Confidential 12
High Performance Computing
Wired Applications, Networking
Consumer, Wireless, Mobile Computing
Leading Edge Technology Solutions Delivering at 28nm & 20nm, Leadership at 14nm and Beyond
28SLP
28LPS
20LPM
28HPP
14LPE
28 Custom
10nm
14LPP
28nm: Innovating Together for Shared Success
State-of-the-art 28 nm platform solutions and proven capacity
Over 1 million wafers shipped - expected to be a very long-lived node
Comprehensive IP roadmap available Early Engagement Model Optimized Solutions Broad IP Implementation
We will continue to invest in platform and manufacturing capabilities for years to come
GLOBALFOUNDRIES Confidential 14
GLOBALFOUNDRIES Platform Technology Evolution 28nm Generation
Technology Segment Application Status
32nm PD-SOI HKMG Super High Performance MP / Graphics
APU CPU/GPU, Server In Volume Production
28nm Bulk HKMG High Performance Plus
MP/ Graphics, Networking, Bitcoin Processors
APU, CPU/GPU Networking, Server High-end mobile
In Volume Production
28nm Bulk Poly SiON Low Power Standard Wireless /Consumer
Mobile Baseband Mobile RF Transceiver Mobile Connectivity
In Volume Production
28nm Bulk HKMG Super Low Power Wireless /Consumer
Consumer Mid/Low Tier Mobile Processor
In Volume Production
Full Depleted SOI Mobile, Automotive, Consumer, IOT, Computing, Infrastructure
Any where LE technology is PPC challenged
Planning / Development
GLOBALFOUNDRIES Confidential 15
Std cells, memories, GPIOs
Participated in our 32/28nm MPW since late 08
Comprehensive IP Roadmap
Optimized Cortex A9
Library and Basic IPs
Design Tools support
Foundation IP
Basic IP
Complex IP
Early Engagement Model Optimized Solutions Broad IP Implementation
PLL, DLL, ADC, DAC, specialty IOs, AFE
High Speed interfaces (eg. PCI, DDR2/3, XAUI, SATA, USB, etc), Application specific IPs
28 nm Platform is Design-Enabled
GLOBALFOUNDRIES Confidential 17
Through True Open Ecosystem Partnership
28SLP 28HPP
PDK
DM / GDRM , SPICE models Multi-vendor DRC, LVS, PEX, ERC, Fill deck
ESD (Ref Guide, design support), LU guide P&R TechFile (multi vendor) Others SRAM BCK, eFuse macro+doc, Pcells, SER modelling
Library and IPs
Foundation IP (std cells, memories, IOs, PLLs etc)
Basic IP (Specialty IOs, USB2.0 PHY etc)
Complex IP (USB3.0 PHY, HDMI, PCIe3, SATA, DDR2/3, LPDDR2+, MIPI, 10G+SERDES, CA9 POP etc)
DFM
Rule based solution (RR, MCD, MAS)
Model based solution (CAA, LFD, DRC+, CMP)
Ref Flow Silicon validated AMS & Digital Reference Flows with mixed vendor support
28nm HKMG Process Unprecedented SoC Performance
Delivering SoC solutions for ARM Cortex-A9 Up to 2.0 GHz on 28SLP Up to 3.0 GHz on 28HPP
INNOVATING TOGETHER.
GLOBALFOUNDRIES design implementation Quad-Core Cortex-A12 test chip using ARM POP
2.0 GHz at Typical Process & Temperature
Positioning a differentiated fully depleted offering
GLOBALFOUNDRIES Confidential 19
High Performance Computing
Wired Applications, Networking
Consumer, Wireless, Mobile Computing
28SLP
20LPM
28HPP
14nm
32/28
10nm
28LPS
FDSOI
FDSOI Value Proposition
Die Price (arb. units)
Rel
ativ
e pe
rfor
man
ce
28nm Poly SiON
28nm HP
20nm
14nm FINFET FDSOI Value
Key dynamics: Challenge: 28nm cost reductions through derivatives and supply base maturity Opportunity: Reduce cost through simplification, die shrink Opportunity: Increase performance through device strain and biasing Opportunity: Enhanced feature platform RF, eNVM
GLOBALFOUNDRIES Confidential 20
14nm Offers Breakthrough Power/Performance
14LPP vs 28HPP ~50% performance boost at matched power ~60% power reduction at matched performance
14LPP over 20LPM ~30% performance boost at matched power ~35% power reduction at matched performance
GLOBALFOUNDRIES Confidential 21
Performance Power
w/ BEOL loading
0.85V
RVT SLVT
11/18/14
45%
50%
14nm: Complete SoC Solutions
Mobile Market Applications
Compute, Connect, Storage Applications
Foundation IP Complex IP Analog IP High Speed SERDES
2.5D and 3D Packaging SoC Packaging
Power/Perf Optimized
CPU Solutions
Multicore Mobile
Solutions
11/18/14 GLOBALFOUNDRIES Confidential 22
LOGIC RFCMOS SiGe
BICMOS Si
BICMOS RF SOI mmWave
14nm
20nm
28nm
40nm
55nm
65nm
130nm
180nm
GLOBALFOUNDRIES RF Technology Offerings A diverse technology portfolio addressing a variety of RF applications
Available In development
GLOBALFOUNDRIES Confidential 23
180/130nm 65/55nm 40nm 28nm 20nm
Cellular RF/BB SOCs
WiFi/BT/GPS/Combo chips
WiGig radios
Basestation RF/BB SoCs
Automotive Radar/ITS
Smart Cards/Medical Wireless
DTV/Set Top Box RF SoCs
Home Wireless Convergence
Public Safety Radio RF SoCs
Smart Meter Radio RF SoCs
Front End Module Components
GLOBALFOUNDRIES RF Application Matrix 2015
Production Engagements GLOBALFOUNDRIES Confidential 24
180nm 30V BCDlite (HVM)
GLOBALFOUNDRIES Confidential 25
0.35um
0.6X
X
Y
0.18um
0.95
Y Die Size (43% reduction)
Both of 5V and 6V are offered (same gate oxide)
6V is suitable for mobile applications
Example shown 6V & 20V product MIM, HSR 1P4M, 24 layers
5/6V CMOS device shrink gains
Differentiating features Proven and mature technology
(>100kwpq)
Low mask count
Low Rsp LDMOS (Rdson X area) Modular platform
Built on 6V CMOS & 1.8V
CMOS (option)
Automotive grade 1 qualified
Best fit for mobile and consumer
applications
130nm BCDliteTM Platform (on 300m Wafers )
GLOBALFOUNDRIES Confidential 26
Key Differentiators
Available on 300mm wafers
Competitive Rsp with BCDliteTM concept w/ low complexity
Modular Platform: 5V CMOS and 1.5V CMOS (option)
Perfect for highly integrated PMICs
- High density logic
- Low Rsp 5V Device
e-flash available on this Platform
From Mega Trends to MCU applications
GLOBALFOUNDRIES Confidential 27
Secure MCU/ICs Smartcard Mobile Payment NFC eGovernment
General Purpose MCU Computing peripherals Appliances Consumers Games
Industrial MCU Appliances Instrumentation Precision controls, etc.
Wireless MCU Wireless Sensor Network Remote health monitoring
Automotive MCU Powertrain Body Control Infotainment
MEMS Offerings - Infrastructure / Capacity
December Class 1, CMOS compatible MEMS cleanroom (180nm)
Class 100/1000, dedicated MEMS cleanroom
Compliance to QA quality standards ISO/TS16949 requirements
Real-time SPC, equipment SPC, electronic quality systems
March First engineering samples delivered
August First production
shipments
Production R
amp
2010 2011
2012 2013
2014-15
February First products customer-qualified
GLOBALFOUNDRIES Confidential 28
Targeted Devices
High growth market segments (those driven by mobile/consumer)
Emerging, high growth MEMS devices Micro-speaker, Gesturing Ultrasonic sensor, auto-focus, environmental sensor.
GLOBALFOUNDRIES Confidential 29
Inertial Microphone Timing and RF Devices Actuators
MEMS
28nm Value Added Packaging Solutions
GLOBALFOUNDRIES Confidential 30
Collaborative Business Model
Copper Pillar Enablement Production ramp in 2014
2.5D TSV Si Interposer Design-in Ready
Demo with Open-Silicon
2.5D Integration Development
Initial internal test vehicle, for tool/line setup, base investigation on interposer design and processing, supply chain setup (passed Pre-ERA)
Technology baseline qualification test vehicle, for CPI qualification and final inputs to DM and PDK (target ERA in Q4/2014)
GLOBALFOUNDRIES Confidential 31
KALAHARI Interposer system ATACAMA Interposer system
X-section through interposer, TSV, C4
Whats Beyond: Long Range Focus and Trends
GLOBALFOUNDRIES Confidential
32
Trend Implication Novel transistor materials/
mechanisms (CNT, TFET, NEMS) Low-power transistors may emerge based on new channel materials (e.g., CNT) and new mechanisms (e.g., steep subthreshold slope, zero leakage).
Novel interconnect solutions Enabled by new signal carrier (e.g., photonic interconnect) or new materials (e.g., graphene) to achieve high throughput and low power.
Monolithic 3D integration Optimal density and cost in 3D assembly of multi-functional ICs enabled by sub-50nm vertical interconnect; many fabrication challenges.
Hardware security and trusted manufacturing
Security features may be built into physical IC randomness; design-for-trust solutions may enable trusted manufacturing with enhanced security.
CMOS-integrated functional diversification components (sensor,
actuator, RF, etc.)
More-than-Moore (MtM) targets value creation via functional diversification enabled by non-digital components integrated on CMOS platform.
Nonvolatile logic (Spintronics, ferroelectric-gate transistor, etc.)
Nonvolatile logic can eliminate standby power, increase throughput via improved memory/logic integration, and enable novel architectures.
Non-traditional fabrication Flexible electronics and electronic textile may create alternative fabrication methods and impact traditional foundry business.
Bio-inspired computing Highly efficient, adaptive, and reconfigurable computing solutions inspired by bio-systems are emerging in industry research (e.g., IBM, Qualcomm).
Highly disruptive computing solutions
Approximate computing, adiabatic computing, and quantum computing are examples with great potential impact but currently remain in research.
Summary
GLOBALFOUNDRIES ARM TechCon2013 33
28nm in production / multiple 20nm & 14nm tape-outs
10nm development to meet next generation needs
Advanced FDSOI for target applications
RF: broad applications 5G/mmW to transceivers
BCDlite/full BCD at 200mm/300mm
eNVM applications including emerging memory technology
Advanced Packaging Update GLOBALFOUNDRIES EMEA Technical Seminar
Rama Alapati
Agenda
GLOBALFOUNDRIES Confidential 2
Interconnect Roadmap
Backend Supply Chain Model
Leading Edge CPI Update
1
2
3
2.5D Technology Update
3D Technology Update
4
5
2011 2012 2013 2014 2015 2016 2017 2018 2019 28nm
20nm
14nm Platform
Technology
SnAg
180m Pitch
Cu Pillar
Bump
finFET
140m Pitch
110m Pitch
80m Pitch
OSATs: 2.5D/3D 40m Pitch
TSV 2.5D TSV Diameter/Thickness: 10m/100m
3D TSV Diameter/Thickness: 6m/55m TSV + M3
GLOBALFOUNDRIES Interconnect Roadmap
GLOBALFOUNDRIES Confidential 3
Collaborative Supply Chain
GLOBALFOUNDRIES Confidential 4
Customer benefits
Open, flexible, cost-effective supply chain
Aligns with customers preferred partners
Active co-development to ensure smooth volume ramp
Design Test Dev
(DFT) Reticle
Sets Wafer Fab
& FSI Bump Probe
Thin & BSI
Assy & Test
OSAT Partners Process development and characterization For 3D and 2.5D bump is owned by the OSAT
Design Partners Design flow, rules and tool alignment
Memory Partners Integration and
characterization
EDA & IP Partners Development and validation
2.5D Technology Update
2.5D Fit
GLOBALFOUNDRIES Confidential 6
Package Size
IO D
ensity (
traces/m
m o
f edge)
POP WLCSP WLFO
High Density Laminate
Silicon Interposer
1
500
1000
Si Interposer to Board
D2S2D D2W2S
2.5D Si Interposer Application Drivers
SoC Partitioning
Cost optimization: Die split on advanced node devices
Reduced die size
Increased yield
Functional optimization: Best fit node per function
Design reuse without redesign
Lower risk lower cost
Logic-Memory Power & Performance
Logic & memory integration:
Increased bandwidth
Higher performance per watt
7
SoC Die 1
Die 2
Memory
Memory
Memory
Logic
Memory
Memory
Memory
DRAM GPU
Core Analog I/O
Core
SoC
GLOBALFOUNDRIES Confidential
2.5D Reference Flow Steps
2.5D TSV Si Interposer: Design-in Ready
GLOBALFOUNDRIES Confidential 8
Logic/Memory
Multiple 2.5D vehicles (GPU/Networking)
Reference flows available
System early reliability (ERA): Q3 14
Production readiness: Q414
26x32 mm Interposer
22x18, 8x8mm top dies > 80k bumps total
10m x 100m TSV
40m TSV pitch
11x7 mm Interposer
22 mm2 top dies > 16k bumps total 1600 die to die signals
10m x 100m TSV
40m TSV pitch
Logic/Logic
Dual ARM vehicle with custom IO
GLOBALFOUNDRIES PDK
Electrical characterization data: March 14
Enhanced PDK: Q114
Create Basic Top Die Designs Create chip designs and basic floorplans
Create Basic Interposer Design
Create Top-level
Assign & Route Interposer
Assign Top-level
Complete Interposer Design
Perform Inter-die Checks
Read Verilog and basic floorplan data
Create top-level design specification
Create and place C4 bumps and route
Perform top-level 3D assignment
Perform 3D inter-die checks
Create PG mesh and complete routing, add probe pads
2.5D SoC Partitioning Status
SOC Partitioning Demonstration Vehicle Structure
Package
Body size 27.0mm * 27.0mm Ball Count 672 ea Max Height 2.78mm
Top die
Die size 4.5mm * 4.5mm Thickness 0.600mm Bump Height
(Cu Pillar) 0.04mm
Bump pitch 40m pitch
Interposer
Die size 10.6mm * 7.1mm Thickness ~100m FS Bump
Pitch 0.040mm
FS Bump Height Ni / Au BS Bump
Height, C4 80m
BS Bump
Pitch 0.170mm
Logic Die
Logic Die
EYWA
HDBU Substrate, 672, 27x27, 10L
10 GLOBALFOUNDRIES Confidential
Development Vehicle Functional Description
Two logic die contain dual-core ARM Cortex-A9 CPU GLOBALFOUNDRIES 28nm SLP
Peripherals: DDR3, NOR Flash, UART, SPI, I2C, I2S
AXI bridge interfaces
Open Silicon was awarded ARM TechCon 2013 Best in Show IC design
Custom die-to-die IO Drivers
Lower power
16 GB/s full-duplex data-rate across the two die through the silicon interposer 64 bit datapath @0.5GHz
2 ports, bidirectional
Demonstrated ESD performance
Custom Interposer GLOBALFOUNDRIES 65nm
11 GLOBALFOUNDRIES Confidential
Die-to-Die IO
Custom Die-to-Die IO Bridge
40m bump pitch micro copper pillar
78% area reduction compared to equivalent GPIO IO size
Saved 50% of D2D bridge area
Smaller -bump pitch could have been used
Die-to-die bridge area
16 GB/s full-duplex data-rate across the two die through the silicon interposer
Lower Power
~0.5pJ/bit (average)
Off-die connections (>7.5pJ/bit)
Achieved 100V CDM ESD protection
4 ESD experiments were designed
Standard Cell Logic Region
Die-to-Die TX cell 16x36m
micro Bump Die-to-Die
RX cell 16x36m
micro Bump
Power Rail
Ground Rail
Standard Cell Logic Region
Die-to-Die TX cell 16x36m
micro Bump Die-to-Die
RX cell 16x36m
micro Bump
Power Rail
Ground Rail
40
m
40 m
40
m
40 m 40 m
12 GLOBALFOUNDRIES Confidential
3D Technology Update
3D TSV Enablement Current Status
Enablement Approach
TSV process capability in Malta, NY (20nm & 14nm / 300mm fab) Via Middle
Internal test vehicles - design manual and PDK development
Supply TSV wafers to OSATs for BSI (backside Integration)
Collaborative BSI & assembly process development two OSATs engaged
Source and validate supporting IP
Status
Multiple 20nm & 14nm test vehicles
TSV integration & characterization
Full flow wafer processing
Package test data
TSV reliability in package
Customer test vehicle FO
Production readiness: Q414
GLOBALFOUNDRIES Confidential 14
Reliability Challenges: Thermal dissipation Warpage/stress CPI e-CPI
Cost Challenges: Tools depreciation BSI & Assembly yield Process & materials
optimization
3D Via-Middle Integration Challenges
GLOBALFOUNDRIES Confidential 15
Process Challenges: TSV integrity TSV-V0 integration Defectivity Wafer stress
TSV
KOZ
Thermal in chip stack
Design challenges: Thermal management TSV placement & KOZ CAD tool for partitioning
Test & Assembly Challenges: KGD methodology & robust
test hierarchies Fine pitch probing Yield improvement
TSV stress/pumping effect
Covered in this presentation
TSV Process flow
Post TSV Etch
Post resist strip
TSV clean
Post TSV Liner
TEOS 03
STI
Post TSV
Barrier Seed
Post TSV ECP
& Anneal
Silicon
STI
CAP
MOL FEOL /
Stack
Post TSV CMP
Land on Cap
Dense array
TCD / Depth / BCD uniformity
Liner step coverage Barrier Seed continuity
Cu step height Cap uniformity
Void free gap fill Overburden
GLOBALFOUNDRIES Confidential 16
Package Reliability Tests
GLOBALFOUNDRIES Confidential 17
Stress Test Conditions Electrical Readout
Pre-conditioning
24 hrs. @ 1250C
192 hrs. soak @ 300C/60% RH
2600C reflow x3
Pre-conditioning readout
High Temperature Storage (HTS) 1500C
Readout @ 168 hrs
Readout @ 500 hrs
Readout @ 1000 hrs
Unbiased Highly Accelerated Stress Test (uHAST) 1300C/85% RH Readout @ 96 hrs.
Thermal Cycling (TC) -550C to 1250C Readout @ 500 cycles
Readout @ 1000 cycles
Test Level No. of
Packages
Package Fails
Wide I/O
Chains
Corner
Structures
Periphery
Daisy Chains
Bump Crack
Sensors
Functional
Units
T0 Readout 240 3 0 0 0 1
HTS (1000 Hrs.) 40 0 0 0 0 0
Pre-conditioning 90 0 0 0 0 0
uHAST (192 Hrs.) 45 0 0 0 0 0
TC (1000 cycles) 45 0 0 0 0 0
Summary
GLOBALFOUNDRIES Confidential 18
Expanding CPI qual envelopes for 28 and 20/14nm to address customer needs
GLOBALFOUNDRIES 3D and 2.5D technology ready for prototyping and high volume manufacturing
Critical technology & supply chain challenges understood and overcome with the collaborative supply chain model
Work underway to enable 14nm 3D and 2.5D solutions
Acknowledgements
GLOBALFOUNDRIES Packaging, Process, Test, Reliability and Design Engineering Teams
OSAT Teams in US and Asia
GLOBALFOUNDRIES Confidential 19
Trademark Attribution
GLOBALFOUNDRIES, the GLOBALFOUNDRIES logo and combinations thereof, and GLOBALFOUNDRIES other trademarks and service marks are ow ned by GLOBALFOUNDRIES Inc. in the United States and/or other jurisdictions. All other brand names, product names, or trademarks belong to their respective ow ners and are used herein solely to identify the products and/or services offered by those trademark ow ners.
2014 GLOBALFOUNDRIES Inc. All rights reserved.
Thank You
RF Foundry Solutions for Next Generation RF Systems Peter A. Rabbeni Director RF Field Marketing & Business Development
More than 50 Billion connected devices by the year 2020.
Ericsson White Paper, February 2011
30 Billion wirelessly connected devices by the year 2020.
ABI Research, May 2013
GLOBALFOUNDRIES Confidential 2
Major Trends Fueling Wireless Growth
Wirelessly enabled devices are driving three key market trends Mobility Connectivity /Speed Intelligence
RF technologies are a core component of these three trends
GLOBALFOUNDRIES Confidential 3
GLOBALFOUNDRIES RF Market Focus
Variability
Signal Integrity
Performance
Process control, centering and repeatability
Modeling accuracy and representation of process
Signal leakage prediction and substrate noise contribution
Device overdrive reliability modeling
Fundamental RF metric leadership: Gain, NF, IP3
Interference, distortion and load mismatch handling
GLOBALFOUNDRIES Confidential 4
Our Solution A Complete RF Foundry Offering
Process Ft 160 - 350GHz Low-power CMOS Collaborative
process development
Marketplace success and maturity Mobility & Connectivity SoCs, LTE radios, GPS, Wi-Fi, BT, DTV, etc
Models Silicon Validated
RF Models Process and
corner modeling Device noise
modeling Monte-Carlo & Statistical
mmWave coverage for active and passive elements
Design Devices FETs, MoM,
Resistors, MiM, UTM. DNWell
Layout DRC/LVS/PEX, ESD kit
Simulation - GoldenGate, EMX, HFSS, Momentum, Peakview
Packaging 2.5D/3D integration
Support Regional field
technical support ESD support Collaborative IP
development through partnerships with 3rd party design centers and universities
Services GlobalShuttle
MPW Program MOSIS MPW
program DFM /
Manufacturing Support
Packaging / Test / Design
RF Technology Platform
GLOBALFOUNDRIES Confidential 5
LOGIC RFCMOS SiGe
BICMOS Si
BICMOS RF SOI mmWave
14nm
20nm
28nm
40nm
55nm
65nm
130nm
180nm
GLOBALFOUNDRIES RF Technology Offerings A diverse technology portfolio addressing a variety of RF applications
Available In development
GLOBALFOUNDRIES Confidential 6
180/130nm 65/55nm 40nm 28nm 20nm
Cellular RF/BB SOCs
WiFi/BT/GPS/Combo chips
WiGig radios
Basestation RF/BB SoCs
Automotive Radar/ITS
Smart Cards/Medical Wireless
DTV/Set Top Box RF SoCs
Home Wireless Convergence
Public Safety Radio RF SoCs
Smart Meter Radio RF SoCs
Front End Module Components
GLOBALFOUNDRIES RF Application Matrix 2015
Production Engagements GLOBALFOUNDRIES Confidential 7
Focus on Performance
Device Ft scalability supporting a broad range of RF/wireless applications
40LP-RF
GLOBALFOUNDRIES Confidential 8
Focus on Performance
Silicon-validated, physically scalable models allow for accurate simulation and device geometry optimization. Features such as deep nwell and gate double strapping improve isolation and improve device noise figure
40LP-RF 40LP-RF M1
M3
M2
Guard Ring
Gate Poly
GLOBALFOUNDRIES Confidential 9
Flicker and thermal noise modeling including statistical noise behavior improve simulation value for sensitive RF blocks, i.e. LNAs, VCO/PLL
Focus on Signal Integrity
40LP-RF
GLOBALFOUNDRIES Confidential 10
Focus on Variability
Device modeling and characterization supporting Vt/Id mismatch and variations due to process, voltage, temperature and device self-heating effects further enhancing simulation accuracy
40LP-RF 40LP-RF
GLOBALFOUNDRIES Confidential 11
Focus on Variability
Device modeling and characterization supporting variations due to geometry increase device performance confidence
l
w
l
w
40LP-RF 40LP-RF
GLOBALFOUNDRIES Confidential 12
Focus on RF Features Thick Metals
Rich back end metal stack flexibility and options provide ability to optimize RF passives integration
Availability of MiM capacitors allows integration of sensitive matching networks
40LP-RF
GLOBALFOUNDRIES Confidential 13
Focus on RF Features APMOM Density
M1-M5
Enhanced, scalable MOM capacitor structures providing state of the art density and performance for low-cost passive structures
GLOBALFOUNDRIES Confidential 14
Focus on RF Features Transmission Lines
Scalable transmission line library including Cadence pcells and silicon validated models up to 100GHz
M1-M5
Slow-Wave CPWG(SCPWG): Single and Coupled SCPWG
45/90 deg. Bent Transmission lines
Single and coupled CPW
Single and coupled CPWG Tee-junction CPW and CPWG (50 ohm)
Single and coupled CPWG with no shield at bottom
GLOBALFOUNDRIES Confidential 15
40LP-RF Highlights
GLOBALFOUNDRIES Confidential16
40nm LP RF Technology Highlights
Comprehensive RF PDK with fully validated RF model extensions up to 100GHz for select devices
Model to hardware correlation validated for all available devices across pcell range
Thermal noise models validated to 67GHz; work on-going to enhance test capabilities to extend range
HSPICE and SPECTRE model simulation compatibility (BSIM4 core device with subcircuit wrapper)
RF/mixed-signal PDK specific devices such LD/EDMOS, deep-nwell, MOS varactors (N/P), MOMCap, MIMCap, inductors and UTM (thick metal)
Specialized transmission line structures provided and modeled for mmwave frequencies
Focused on addressing the automotive radar, WiGig and microwave backhaul markets
GLOBALFOUNDRIES Confidential 17
40nm RF and mmWave Technology
mmWave
RF and mmWave Technology Based on Baseline Process
RF Device mmWave RF Core Transistor Deep Nwell
RF I/O Transistor 5V LDMOS
MOS Cap/ Varactor MIM Cap
APMOM/VNCAP
Inductor
RF Core Transistor
MOS Cap/ Varactor
APMOM
MIM Cap
Salicided P+ Poly Resistor
Unsalicided P+ Poly Resistor
Inductor
Transmission Line
GLOBALFOUNDRIES Confidential 18
40nm Technology Offering 40nm-LP (1.1V)
Core Device
LVt
RVt
HVt
sLVT
Overdrive option (1.2V+5%)
IO Devices (DGO only)
EG 28A 1.5V(UD) / 1.8V
DG 52A 1.8V (UD)/2.5V/3.3V (OD)
Memory
Performance SP SRAM (0.303um2)
Dense SP SRAM (0.242um2)
Dense DP 8T SRAM (0.477um2)
Passives (Un)silicided Resistors , Triple well, Bipolars, Capacitors, Varactors
eFuse eFuse (SG driver)
Note : Information above is subject to change, please contact your GLOBALFOUNDRIES representative for the latest information
GLOBALFOUNDRIES Confidential 19
40nm-LP RF Performance
Device Parameter Feature SG NFET, PFET Peak fT (GHz) 260, 132
DG NFET, PFET Peak fT(GHz) 42, 22
SG NFET Noise parameters Noise figure (dB) 0.35
1/f Noise (V2*m2/Hz) 139
N+/P+ Diffusion Resistor Sheet Resistance, Tolerance 110 /, +/-15%, 197 /, +/-15% N+/P+ Poly Resistor Sheet Resistance, Tolerance 173 /, +/-20%, 618 /, +/-15% Nwell (STI, active) Resistor Sheet Resistance, Tolerance 1540 /, +/-35%, 500 /, +/-35% Precision Resistor Sheet Resistance (/) 380 VNCap Capacitor Capacitance Density (fF/m2 ) 4.25
APMOM Capacitor Capacitance Density (fF/m2 ) 4.65
MIMCap Capacitance Density (fF/m2 ) 2.5
Inductor
(3m Cu + LB Termination) Qpeak @ 0.43nH 27
MOS Var
(NCAP)
Capacitance Density (fF/m2 ) 14.7
Tuning Range 7
Qpeak 60
Note : Information above is subject to change, please contact your GLOBALFOUNDRIES representative for the latest information
GLOBALFOUNDRIES Confidential 20
40nm-LP Library and IP Offering
IP Category IP Component IP Supplier
Foundation IP (FIP)
HD - 9T Std Cells (Base, Multi-channel, POK & ECO)
Synopsys HS - 12T Std Cells (Base, Multi-channel, POK & ECO)
FIP
Memory Compilers (SRAM SP/DP, RF & ROM)
Synopsys HS Memory Compiler (HS 1PRF, SRAM SP)
FIP GP I/Os
Aragio Specialty I/Os
Foundational digital library support
Note : Information above is subject to change, please contact your GLOBALFOUNDRIES representative for the latest information
Multi-channel Libs offers superior performance vs. leakage as compared to using multi-Vt optio
GLOBALFOUNDRIES Confidential 21
40nm-LP Library and IP Offering Basic & Complex IP Si validated and characterized*
*Note : Supported up to Tj= 125C ^ No silicon validation report
IP Category IP Component IP Supplier Basic IP (BIP) USB 2.0 picoPHY Synopsys
BIP GP PLL Lib Cadence(Cosmic Circuits)
BIP PLL Analog Bits^
BIP AFE ADC & DAC IQ Analog
Complex IP (CIP) MIPI D PHY Synopsys
CIP DDR3/2 PHY Synopsys
CIP 3G SerDes (inc PCIe 1.0, SATA I/II, XAUI 3.125) Synopsys
CIP USB3.0 PHY Synopsys
CIP 6G SerDes (PCIe 2.0, SATA 6G) Synopsys
CIP LPDDR2 (MultiPHY) Synopsys
CIP OTP Kilopass
CIP HDMI PHY (1.4/1.3b TX) Synopsys
CIP ONFI 3.1 I/O Aragio
CIP EthernetPhy OmniPhy
GLOBALFOUNDRIES Confidential 22
40nmLP IP Roadmap Planned schedule for new 40nm-LP IP
IP Category IP Component IP Supplier
Full Design Kits
Si Validation Report
Foundation IP (Automotive
Grade1 )
ARM Std Cell Lib 9T ARM Oct14 2Q15
ARM Std Cell Lib 12T ARM Dec14 2Q15 ARM Memory compilers (HDSP, HSSP) ARM Dec14 2Q15
ARM Memory compilers (HDDP, HSDP, SPRF1, DPRF, vROM) ARM 1Q15 3Q15
GPIO (includes PCI + OSI + Analog IF) Aragio Sep14 2Q15
Foundation IP Std Cell Lib 7T TBC 2Q15 3Q15
BIP High Speed SRAM Macro GLOBALFOUNDRIES Available 4Q14
Temperature Sensor GLOBALFOUNDRIES 1Q15 2Q15
CIP PUF (Physically Unclonable Function) QuantumTrace Sep14 Sep14
AFE (ADC & DAC) Synopsys Available 4Q14 SerDes PHY (6.4G, PCIe I/II, SATAI/II, XAUI, CEI-6) Gigacom Available 4Q14
Video DAC Synopsys 1Q15 2Q15 Note : Information above is subject to change, please contact your GLOBALFOUNDRIES representative for the latest information
GLOBALFOUNDRIES Confidential 23
PDK in Action: Mobile Handset LNA Example
GLOBALFOUNDRIES Confidential 24
Broadband LNA is an example of GLOBALFOUNDRIES efforts to demonstrate performance in real-world applications
Power-to-Current LNA Schematic
LNA Performance Specifications
Gain / Return Loss over freq./temp.
LNA IIP3 Simulation
PDK in Action: 40nm 60GHz Bandpass Filter
60GHz passive bandpass filter is an example of GLOBALFOUNDRIES efforts to demonstrate performance in real-world applications
Insertion Gain
Input Matching
Lx=Microstrip line, Cx=MIM Capacitor, = Interconnection Loss
60GHz band pass filter designed/optimized based on circuit topology in [i] using GLOBALFOUNDRIES 40nm mm-wave model.
-2.55dB@60GHz (Literature [i])
-52dB@54GHz (This Work)
-37dB@61GHz (Literature [i])
-2.59dB@60GHz (This Work)
Pass Band (Shaded Region) fC=60GHz, S21-3dB
Pass Band (Shaded Region) fC=60GHz, S21 -3dB
Max Insertion Gain
Best Matching (Max Return Loss)
GLOBALFOUNDRIES Confidential 25
PDK in Action: 40nm 77GHz Bandpass Filter
77GHz passive bandpass filter is an example of GLOBALFOUNDRIES efforts to demonstrate performance in real-world applications
LNA IIP3 Simulation
Insertion Gain
Input Matching
C3=66.3fF
Lx=Microstrip line, Cx=MIM Capacitor, = Interconnection Loss
77GHz band pass filter designed/optimized based on circuit topology in [i] using GLOBALFOUNDRIES 40nm model
-2.55dB@60GHz (Literature [i])
-2.48dB@77GHz (This Work)
-37dB@61GHz (Literature [i])
Pass Band (Shaded Region) fC=77GHz. S21-3dB
Pass Band (Shaded Region) fC=77GHz, S21-3dB
-56dB@72GHz (This Work)
Best Matching (Max Return Loss)
Max Insertion Gain
GLOBALFOUNDRIES Confidential 26
130RFSOI Highlights
GLOBALFOUNDRIES Confidential27
GLOBALFOUNDRIES 130RFSOI Platform
2.5V CMOS 3LM Cu (on TR HR SOI) 17
Through BOX Contact (TBC) +1
High Density Logic CMOS (1.2/1.5V) +3
5V PA NMOS +2
Total Masking Steps
11/18/14 GLOBALFOUNDRIES Confidential 28
MIM Cap 1.0fF/squm (+1ML) OR 2.25fF/sq um (+2ML) (Dual mask MIM)
High Sheet Resistance Poly Resistor (HRES) (1K or 2K Ohm/sq)
+2
+1
Option of Dual UTM (3um + 3um Cu) for 5LM Process +4
Note: UTM : Ultra thick metal DM : Dual Mask TR : Trap Rich HR : High Resistivity
Ready Under Development
Under Planning
2.5/3.3V Switch NMOS 2.5V STD cells Lib. eFuse BJT
MOM Cap +0
P+Poly (330 /sq) & N+Poly Rs (480 /sq)
1.5V STD cells Lib.
Focus on RF Characterization
GLOBALFOUNDRIES has invested in critical RF characterization systems to enhance PDK model development and accuracy
4-Ports 50GHz System
2-Ports 110GHz System HF Noise 60GHz System
GLOBALFOUNDRIES Confidential 29
Rich RF SoC Design Ecosystem and EDA Support
IP Foundation Libraries Memory Compilers GPIO and Standard Cell Specialty IO RF/Analog IP PLL / DLL High-speed PHY Processor Cores
EDA ANSYS Cadence Keysight Lorentz Mentor Graphics Synopsys
GLOBALFOUNDRIES Confidential 30
Summary
Next gen RF systems promise to bring a new level of innovation to RF SOC design to support high BW data delivery
Successful and timely deployment of RF solutions requires access to technology, features and enablement which minimize the risk of complex SOC design
GLOBALFOUNDRIES supports a complete portfolio of mature and advanced RF technology offerings
Our primary focus is on addressing the challenges of RF design to help reduce customer risk and enabling differentiated RF performance for our customers
Features and options to address a full spectrum of RF applications Rich design enablement/IP ecosystem and customer support
GLOBALFOUNDRIES Confidential 31
Trademark Attribution GLOBALFOUNDRIES, the GLOBALFOUNDRIES logo and combinations thereof, and GLOBALFOUNDRIES other trademarks and service marks are owned by GLOBALFOUNDRIES Inc. in the United States and/or other jurisdictions. All other brand names, product names, or trademarks belong to their respective owners and are used herein solely to identify the products and/or services offered by those trademark owners. 2014 GLOBALFOUNDRIES Inc. All rights reserved.
Thank you [email protected]
Enabling High Performance RF/Millimeter Wave Design Productivity and Circuit Optimization Juan D. Cordovez, Senior Director of Field Applications Engineering
Black Magic? Demystified
GLOBALFOUNDRIES Confidential 2
Old School Millimeter Wave No More
Millimeter wave historically limited to boutique applications Satellite, Guidance, UHF comms
Wirelessly enabled devices are driving three key market trends Mobility Connectivity / Speed Intelligence
Thirst for bandwidth enables broader millimeter wave solution penetration across markets
Market calling for an advanced CMOS-based millimeter platform
Millimeter wave in the mainstream
GLOBALFOUNDRIES Confidential 3 Source: http://www.iaf.fraunhofer.de/en/systems-modules/components-and-modules/radar_module.html
Old School
Today
Radar Module
Coupler
Band pass Filter
Why Millimeter Wave?
Source: NTT Technical Journal, March 2009 GLOBALFOUNDRIES Confidential 4
Automotive Radar Systems and Trends Automotive IC design space
segmented into 2 applications: SRR: 24GHz LRR: 77GHz
Automotive requirements are in transition Safety system mandates Semi-autonomous and fully
autonomous vehicles
Radar is an important part of the solution but systems require Higher levels of integration
(onboard MCU and DSP)
GLOBALFOUNDRIES Confidential 5
Wireless Backhaul Systems and Trends
Increased mobile data usage placing strains on wireless infrastructure capacity
Wireless backhaul to reach $6.4B in unit sales by 2017*
Bandwidth need to drive transition from microwave bands to millimeter wave
Advanced silicon technologies enable architecture innovation Software defined radio (SDR) Network adaptability
(beamforming)
GLOBALFOUNDRIES Confidential 6
*Source: http://www.exaltcom.com/wisp.aspx
*Source: http://ipcarrier.blogspot.com/2013/03/each-generation-of-mobile-networks-has.html
LOGIC RFCMOS SiGe
BICMOS Si
BICMOS RF SOI mmWave
14nm
20nm
28nm
40nm
55nm
65nm
130nm
180nm
GLOBALFOUNDRIES RF Technology Offerings A diverse technology portfolio addressing a variety of RF applications
Available In development
GLOBALFOUNDRIES Confidential 7
180/130nm 65/55nm 40nm 28nm 20nm
Cellular RF/BB SOCs
WiFi/BT/GPS/Combo chips
WiGig radios
Basestation RF/BB SoCs
Automotive Radar/ITS
Smart Cards/Medical Wireless
DTV/Set Top Box RF SoCs
Home Wireless Convergence
Public Safety Radio RF SoCs
Smart Meter Radio RF SoCs
Front End Module Components
GLOBALFOUNDRIES RF Application Matrix 2015
Production Engagements GLOBALFOUNDRIES Confidential 8
GLOBALFOUNDRIES RF Enablement Focus
Ft scalability supporting a broad range of RF/wireless applications
GLOBALFOUNDRIES Confidential 9
Our RF Platform Focus:
Variability
Signal Integrity
Performance
Focus on Accuracy
RF FET models built as sub-circuits Base MOSFET models wrapped by
parasitic gate resistance and wiring capacitances
Intrinsic gate resistance, non-quasi-static effect, substrate resistance effect are enabled
Extraction boundary is coincident with RF pcell definition
Silicon-validated, physically scalable models allow for accurate simulation and optimization
Deep nwell, gate double strapping improve isolation and device noise figure
GLOBALFOUNDRIES Confidential 10
NMOS Wf/Lf/Nf=3/0.04/20
Flicker and thermal noise modeling including statistical noise behavior improve simulation value for sensitive RF blocks, i.e. LNAs, VCO/PLL
Focus on Signal Integrity
40LP-RF
GLOBALFOUNDRIES Confidential 11
Focus on Variability
Device modeling and characterization supporting Vt/Id mismatch and variations due to process, voltage, temperature and device self-heating effects further enhancing simulation accuracy
40LP-RF 40LP-RF
GLOBALFOUNDRIES Confidential 12
40LP Mixed-Technology Solutions
40LP compared to 65nm: 40% less power 60% less area Significantly lower cost per die
Ideal for power- and price-sensitive applications Baseband SOC DTV, STB, Sat TV Wireless Modem Connectivity Digital Audio Automotive mmWave
Comprehensive IP portfolio
Based on a proven, industry-compatible process
Modular, mainstream 40nm process + RFCMOS, SOI
Flexible options for
RF, low voltage and automotive
Analog/ mixed-signal
RF/ mmWave
Logic
eFlash
Memory OTP MTP SRAM
GLOBALFOUNDRIES Confidential 13
40nm Technology Offering 40nm-LP (1.1V)
Core Device
LVt
RVt
HVt
sLVT
Overdrive option (1.2V+5%)
IO Devices (DGO only)
EG 28A 1.5V(UD) / 1.8V
DG 52A 1.8V (UD)/2.5V/3.3V (OD)
Memory
Performance SP SRAM (0.303um2)
Dense SP SRAM (0.242um2)
Dense DP 8T SRAM (0.477um2)
Passives (Un)silicided Resistors , Triple well, Bipolars, Capacitors, Varactors
eFuse eFuse (SG driver)
Note : Information above is subject to change, please contact your GLOBALFOUNDRIES representative for the latest information
GLOBALFOUNDRIES Confidential 14
40nm-LP RF Features & Performance
Device Parameter Feature SG NFET, PFET Peak fT (GHz) 260, 132
DG NFET, PFET Peak fT(GHz) 42, 22
SG NFET Noise parameters Noise figure (dB) 0.35
1/f Noise (V2*m2/Hz) 139
N+/P+ Diffusion Resistor Sheet Resistance, Tolerance 110 /, +/-15%, 197 /, +/-15% N+/P+ Poly Resistor Sheet Resistance, Tolerance 173 /, +/-20%, 618 /, +/-15% Nwell (STI, active) Resistor Sheet Resistance, Tolerance 1540 /, +/-35%, 500 /, +/-35% Precision Resistor Sheet Resistance (/) 380 VNCap Capacitor Capacitance Density (fF/m2 ) 4.25
APMOM Capacitor Capacitance Density (fF/m2 ) 4.65
MIMCap Capacitance Density (fF/m2 ) 2.5
Inductor
(3m Cu + LB Termination) Qpeak @ 0.43nH 27
MOS Var
(NCAP)
Capacitance Density (fF/m2 ) 14.7
Tuning Range 7
Qpeak 60
Note : Information above is subject to change, please contact your GLOBALFOUNDRIES representative for the latest information
GLOBALFOUNDRIES Confidential 15
40nm LP RF mmWave PDK Highlights
Validated RF model extensions up to 100GHz for select devices Model to hardware correlation validated across device pcell ranges Thermal noise models validated to 67GHz, higher w on the way RF/mixed-signal PDK specific devices available:
LD/EDMOS, deep-nwell, MOS varactors (N/P), MOMCap, MIMCap, inductors and UTM (thick metal)
Transmission line device library, modeled for mmWave frequencies
GLOBALFOUNDRIES Confidential 16
2-Ports 110GHz System 4-Ports 50GHz System
HF Noise 60GHz System
40nm LP RF mmWave Transmission Lines
Scalable transmission line library including Cadence pcells and silicon validated models up to 100GHz
M1-M5
Slow-Wave CPWG(SCPWG): Single and Coupled SCPWG
45/90 deg. Bent Transmission lines
Single and coupled CPW
Single and coupled CPWG Tee-junction CPW and CPWG (50 ohm)
Single and coupled CPWG with no shield at bottom
GLOBALFOUNDRIES Confidential 17
mmWave Design Example and Demo
[i] Mei-Ching Lu; Jin-Fa Chang; Li-Chun Lu; Yo-Sheng Lin, "Miniature 60-GHz-band bandpass filter with 2.55-dB insertion-loss using standard 0.13 m CMOS technology," VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on , vol., no., pp.92,95, 28-30 April 2009
Design Example: Integrated Passive Filter
Filters are critical design elements in narrow and wide band in RF and mmWave designs
Band pass filters can be found across broad range of communication and measurement systems [1]
Use of higher (shorter electrical lengths) maps to smaller sizes Use of integrated transmission lines becoming more prevalent,
benefits facilitate cost reduction with reduced in chip size
Micro-strip line (MSL)-based filter architectures and becoming common due to their ability to miniaturize: MSL do not the require complex ground schemes of coplanar design Wider band filter can be achieved with MSL as compared to inductors
Based on three-order Chebyshev-type band pass filter design Specifications:
60GHz center frequency |S21| = -2.8dB 0.2dB |S11|
EM Simulation Integrand EMX
Full-wave 3D EM simulation tool, simulation engine is based on Integral formulation of Maxwell equations
Very accurate for simulation of on-chip devices
All physical effects included R, L, C, substrate in a fully coupled manner (solving Maxwell Equations)
Input: Layout gds file, process file (provided by GLOBALFOUNDRIES)
Output: S- and Y-parameter files
Snapshot of running EMX in Linux terminal
EM Simulation Metal Stack Profile 40LP: 6001T-6L1x_1T6x_1T18x_LB
Stack view
(h=height in m, =dielectic constant)
Process File Sample
Silicon Validation (Single MSL)
60GHz CMOS Passive Band Pass Filter
[i] Mei-Ching Lu; Jin-Fa Chang; Li-Chun Lu; Yo-Sheng Lin, "Miniature 60-GHz-band bandpass filter with 2.55-dB insertion-loss using standard 0.13 m CMOS technology," VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on , vol., no., pp.92,95, 28-30 April 2009 [ii] S. Sun, J. Shi, L. Zhu, S. C. Rustagi, and K. Mouthaan, "Millimeter-Wave Bandpass Filters by Standard 0.18-m CMOS Technology," IEEE Electron Device Letters, vol. 28, no. 3, pp. 220-222 [iii] B. Dehlink, M. Engl, K. Aufinger, H. Knapp, "Integrated Bandpass Filter at 77 GHz in SiGe Technology," IEEE Microwave and Wireless Components Letters, vol. 17, no. 5, pp. 346-348, May 2007.
Lx=Microstrip line, Cx=AP-MOM Capacitor, = Interconnection Loss
60GHz band pass filter designed/optimized based on circuit topology in [i] using GLOBALFOUNDRIES 40nm mm-wave model
Pad Pad
Pass Band (Shaded Region) fC=60GHz. S21 -3dB
-2.47dB@60GHz (This work) Max Insertion Gain
-2.55dB@60GHz (Literature [1])
Summary
mmWave systems promise to bring a new level of innovation to RF SOC design to support high BW data delivery
Successful deployment of mmWave solutions require access to technology, features and enablement which minimize risk of complex SOC design and make designers productive
GLOBALFOUNDRIES supports a complete portfolio of mature and advanced RF technology offerings
Features and options to address a full spectrum of RF applications Filter design exercise served as demonstration of the unique
GLOBALFOUNDRIES mmWave design capability
Rich design enablement/IP ecosystem and customer support
GLOBALFOUNDRIES Confidential 24
Trademark Attribution GLOBALFOUNDRIES, the GLOBALFOUNDRIES logo and combinations thereof, and GLOBALFOUNDRIES other trademarks and service marks are owned by GLOBALFOUNDRIES Inc. in the United States and/or other jurisdictions. All other brand names, product names, or trademarks belong to their respective owners and are used herein solely to identify the products and/or services offered by those trademark owners. 2014 GLOBALFOUNDRIES Inc. All rights reserved.
Thank you [email protected]
Enabling power management IC design in the 300mm era Shankaran Janardhanan Manager, Field Application Engineering
Agenda
PMIC IC market trends GLOBALFOUNDRIES 130nm BCDlite & BCD platform
130nm BCDlite in 300mm enables integration Power cell in 180nm BCDlite vs 130nm BCDlite
Design productivity Safe operating area (SOA) feature demo
Design productivity Diode reverse recovery (DRR) demo Conclusion
GLOBALFOUNDRIES Confidential
PMIC market Trends
Quad band edge + LTE in smartphones drives latency and bandwidth requirements depending on application Voice call vs. media stream vs. HD downloads Power management requirements defined by firmware
PMIC 4G/5G migration drives need for complex PMIC 2G: Baseband/app processor + integrated PMIC 3G: Baseband/app processor + integrated BB PMIC + external
complex app PMIC 4G: Baseband/app processor + external complex BB PMIC + external
complex app PMIC 5G: Application specific programmable PMIC
Typical PMIC
130BCDlite & BCD Platform
Technology/Platform Integration - Power device + RF+ ENMVM Technology Performance- best in class Rdson, Qgg & breakdown
Design enablement Design productivity tools + World class modeling
Production & Capacity- Platform on 300mm wafers
GLOBALFOUNDRIES Confidential 5
(1.5/5/10-36V) BCDlite for
Mobility Space
RF Enablement for embedded RF
Apps and Envelope tracker
Embedded NVM for integrated programmable
features
BCD with DTI and BN+ for Industrial and Automotive
(up to 85V)
Driving need for more complex PMIC
GLOBALFOUNDRIES Confidential 4
Market trends
Move to multi- core
Single core
PMIC Impact
& many more!
More power rails
Processor bring up
Timing dependency
Voltage scaling
High peak current
130 BCDlite & BCD Platform
MOM Cap (10V and 30V), 5V MOS Caps + Varactors & Poly Res (300 & 320/sq), VNPN, Schottky Diode
5V CMOS with DeepNwell (1P3M) 3m top Cu Metal
HRES (1K OR 2K Ohms/sq), MIM Cap (1fF & 1.5fF
Isolated 12 to 30V LDN & LDP MOS
1.5V CMOS
Low Ron 24V LD-PMOS
Low Ron 10, 12, 16, 20, 30 PM
Low Ron 24V LD-NMOS
Low Ron 10, 12, 16, 20, 30 NM
eFlash (>10K endurance)
Best in Class 40-85V LDNMOS
Best in Class 40-85V LDPMOS
HV NPN, Low VT NMOS & PMOS
BCDlite BCD
Under Development Ready
Can Reuse In BCD
* With HRES Option
130nm BCDlite Design enablement 130nm BCDlite design enablement
Production qualified cadence PDK (OA) & Mentor back end verification 4T & 6T device for LDMOS High voltage diodes (24v/30v diodes) MOM Caps/MIM Caps / Hres ESD cells (5V and HV)
Analog modeling BSIM 4.5 with sub circuit HiSIM models for HV LDMOS devices Gummel poon models for parasitic BJTs BSIM 4.5 models for ESD devices
Design productivity tools Safe operating area (SOA)- demo to follow Diode reverse recovery (DRR)- demo to follow
Foundation IP Efuse/ OTP ARM std cells/memory compilers & IOs
GLOBALFOUNDRIES Confidential 7
130nm BCDlite (300mm) Enables Integration
130nm BCDlite technology advantage Digital content shrinks by 50% (2X smaller digital area) from 180nm to
130nm aids integration Approximately 15% reduction in rdson from 180nm BCDlite Full Cu BEOL enables power conversion efficiency for same metal
widths Option of E-flash (10K endurance) integration available for
programming RF enablement by Q1 2015 Future migration path to 130nm BCD (DT and buried layer)
300mm wafer advantage Increase in gross die per wafer, smaller periphery area Improved defect density 200mm to 300mm 300mm Lower Bump, CSP and other assembly cost per die
GLOBALFOUNDRIES Confidential 8
180nm BCDlite vs. 130nm BCDlite Power Cell Design
GLOBALFOUNDRIES Confidential 9
Power cells occupy large area content in PMIC GLOBALFOUNDRIES designed same power cell in 180nm BCDlite
and 130nm BCDlite Determine power cell area reduction
Power cell design specification 24V Ultra low Rdson used for demo (PMIC design, battery chargers) Linear drain current (Idlin)= 0.8 Amp 3 Metal design
180nm BCDlite 130nm BCDlite Single finger width 100m 50um Total number of fingers
736 1328
Total width 73600um 66400
Power Device Comparison 180BCDlite vs. 130BCDlite
24ULR_018BCDlite 24ULR_013BCDlite 130 vs. 180 BCDlite (130Area - 180Area) / 180Area
$#)% (/"/ (- #(,2 #.2 #+2 #*2Size (By HVNWELL) 553.16m x 498.16m 469.9m x 417.32m Area (mm^2) 0.2756 0.1961 -29%
Mainly from 0.13m Cu Rules
130BCDlite 24V NMOS Idlin=0.8A (Ron= 125mOhm)
180BCDlite 24V NMOS Idlin=0.8A (Ron= 125mOhm)
Design Productivity Tools
November 18, 2014GLOBALFOUNDRIES Confidential11
Safe Operating Area (SOA) in BCDlite SOA specifies voltage and current conditions over which device
operates without self-damage
LDMOS utilized in a variety of applications Failure is detected at silicon testing causing multiple design revisions Reduces overall design productivity and predictability
BCDlite SOA feature considers snap back, TDDB, HCI to determine safe area Models based on silicon data across temperature corners and biases Incorporated as part of GLOBALFOUNDRIES BCDlite PDK infrastructure Enabled with ON/OFF switch feature for ease of use
SOA Test Bench
12V, 20V, 24V 30V & 35V LDNMOS are connected in parallel Drain voltage is sweep from 0 to 35V
Given different max Vds of each device, SOA warning is triggered accordingly
Device SOA @Vgs=6V
12V LDNMOS 16.1V
20V LDNMOS 28V
24V LDNMOS 31.5V
30V LDNMOS 36V
35V LDNMOS > 35V
Safe Operating Area (SOA) in BCDlite
Safe Operating Area (SOA) warning has been implemented for BCDlite LDMOS Integrated with Cadence ADE environment Designers can see the violation in their designs In-built feature in SPECTRE Designers can print all SOA related warnings into a specific file
GLOBALFOUNDRIES BCDlite SOA feature improves predictability in design process Enhances design reliability BCDlite SOA as a look ahead Improves design productivity BCDlite SOA feature as a safe guard Allows for experimentation in design
14
Confidential
Diode Reverse Recovery (DRR) Model
Power MOSFET is a widely < 200 V switch in power supplies, DC-DC converters and low-voltage motor controllers
Parasitic diode of power MOSFET is turned on for sufficient time during switching Substantially increases device power dissipation due to reverse
recovery losses within diode
Sudden spike in diode current during switching causes MOSFET to degrade or eventually fail
No industry-standard models available for simulation of DRR
parasitic diode
DRR Test Bench
Input condition Pulsed drain between -1.5V to 12V (10ns transition time)
DRR model
Data collected at wafer level with short probes to minimize noise In-house Verilog-A Diode Reverse Recovery (DRR) model has been
implemented to simulate DRR characteristics of power MOSFETs
Without DRR With DRR
Qrr : Body diode reverse recovery charge (defined by the shaded area)
trr : Body diode reverse recovery time (time taken for Irr to decrease from Irr,peak to 10% of Irr,peak)
Irr,peak : Body diode reverse peak current
Conclusion
130nm BCDlite in 300mm enables advanced PMIC designs 130nm BCDlite PDK available for immediate release to
customers SOA design productivity tools available to customers in BCDlite
PDK
Diode reverse recovery features (DRR) being implemented in BCDlite PDK
GLOBALFOUNDRIES continues to invest in growing the 130nm BCDlite platform
GLOBALFOUNDRIES Confidential 18
GLOBALFOUNDRIES is eager to engage customers in 130nm BCDlite Contact us for detailed information
2014 GLOBALFOUNDRIES Inc. All rights reserved.
Thank you
Leading Edge Technology Solutions Michael Mendicino Sr. Director Product Line Management
Outline
Technology Offerings Matched to Market Needs Comprehensive Advanced SoC Solutions
28nm 20nm 14nm
Key Challenges Going Forward 10nm and Beyond Advanced FDSOI
GLOBALFOUNDRIES Confidential 2
Market Needs Drive Technology Offerings
High Performance Computing
Wired Applications Networking
Networking Game consoles Microprocessors
Networking Servers / Storage DTV
STB
Graphics
Wireless Mobile Computing Consumer IoT
Wireless Connectivity Smartphones
Portable consumer DTV Tablets
GLOBALFOUNDRIES Confidential 3
Application Specific Tuned Solutions
Performance
Mob
ile
Des
ktop
Tablets
MOBILE COMPUTING DIGITAL
CONSUMER
Laptop, Notebooks
Wireless Connectivity
Feature phones Smartphones
LOW POWER
Up to 1GHz
1-3GHz
STB
DTV
Graphics
Games Networking Watts
Up to 00s mW
Up to 0s mW
CPU
Lower cos
t
HIGH PERFORMANCE > 3GHz
GLOBALFOUNDRIES Confidential 4
High Performance Computing
Wired Applications, Networking
Consumer, Wireless, Mobile Computing
Leading Edge Technology Solutions Delivering at 28nm & 20nm, Leadership at 14nm and Beyond
28SLP
28LPS
20LPM
28HPP
14LPE
32/28 Custom
10nm
SLP = Super Low Power HPP = High Perf Plus LPS = Low Power PolySi LPM = Low Power Mobile
14LPP
GLOBALFOUNDRIES Confidential
Foundry Industry Demand Outlook
28 nm node will be the most dominant pure foundry offering through 2017 with over 20% of TAM
Sources: Gartner, IBS, IC Insights, IDC, iSuppli
1 MILLION WAFERS SHIPPED
GLOBALFOUNDRIES Confidential 6
GLOBALFOUNDRIES 28 nm Offering A Comprehensive Approach
Application Specific Tuned Solutions
Performance
Mob
ile
Des
ktop
Tablets
MOBILE COMPUTING DIGITAL
CONSUMER
Laptop, Notebooks
Wireless Connectivity
Feature phones Smartphones
LOW POWER
Up to 1GHz
1-3GHz
STB
DTV
Graphics
Games Networking Watts
Up to 00s mW
Up to 0s mW
CPU
Lower cos
t
HIGH PERFORMANCE > 3GHz
28SLP
Lowest complexity HKMG Med-Hi performance
28HPP
Highest performance/watt Optimized solution for
networking & wired
GLOBALFOUNDRIES Confidential 8
28SLP/HPP Technical Heritage
Pushing the Leading Edge into Manufacturing
Cu Interconnect
Low-K dielectric
180nm
Strained-Si on SOI
SOI Multi-Strain Transistor on SOI
130nm
130nm
90nm
65nm
45nm
32nm
Gate First HKMG on SOI
Immersion Lithography
ULK
20/14nm
Gate Last HKMG
28nm
Production: 28nm HKMG
Next Gen FD SOI
2000 2002 2003 2004 2006 2008 2010 2012 2014
GLOBALFOUNDRIES Confidential 9
Std cells, memories, GPIOs
Participated in our 32/28nm MPW since late 08
Comprehensive IP Roadmap
Optimized Cortex A9
Library and Basic IPs
Design Tools support
Foundation IP
Basic IP
Complex IP
Early Engagement Model Optimized Solutions Broad IP Implementation
PLL, DLL, ADC, DAC, specialty IOs, AFE
High Speed interfaces (eg. PCI, DDR2/3, XAUI, SATA, USB, etc), Application specific IPs
GLOBALFOUNDRIES Confidential 10
Attributes 40LP 28SLP
UHD Lib Track 9 7
Raw Gate Density (kGates/mm2) ~2,000 ~4,500
Key Enabler RF, eNVM, Automotive HKMG Gate
Key Benefit Cost Density, Performance
GLOBALFOUNDRIES Confidential 11
28 nm Platform is Design-Enabled Through True Open Ecosystem Partnership
28SLP 28HPP
PDK
DM / GDRM , SPICE models Multi-vendor DRC, LVS, PEX, ERC, Fill deck ESD (Ref Guide, design support), LU guide P&R TechFile (multi vendor) Others SRAM BCK, eFuse macro+doc, Pcells, SER modelling
Library and IPs
Foundation IP (std cells, memories, IOs, PLLs etc) Basic IP (Specialty IOs, USB2.0 PHY etc) Complex IP (USB3.0 PHY, HDMI, PCIe3, SATA, DDR2/3, LPDDR2+, MIPI, 10G+SERDES, CA9 POP etc)
DFM Rule based solution (RR, MCD, MAS) Model based solution (CAA, LFD, DRC+, CMP)
Ref Flow Silicon validated AMS & Digital Reference Flows with mixed vendor support GLOBALFOUNDRIES Confidential 12
28 nm Platform Device Menu 28SLP 28HPP
Core Device (SG)
SLVt LVt RVt HVt
IO Devices (EG) 28A 1.5V / 1.8V 1.8V LVT
LDMOS 4.5V and 5.0V
FEOL Passives
Resistors suite Capacitors suite VPNP ESD device support
BEOL Passives VNCAP, Inductor, APMOM
Memory Regular SP SRAM Dense SP SRAM 8T DP and TP SRAM
eFuse Poly-based GLOBALFOUNDRIES Confidential 13
Advantages of 28SLP Platform vs. 40LP
2.0
1.5
1.0
0.5
0 40LP 28SLP
+49%*
Speed Ratio (worst-case)
40LP
28SLP
Speed: Worst-case conditions Active Power: Typical conditions
Active Power vs. Frequency
5.0E+0 1.0E+1 1.5E+1 0E+0 0E+00
4.0E-02
8.0E-02
1.2E-01
1.6E-01
2.0E-01
Frequency (AU x Hz)
Act
ive
Pow
er (A
U x
W)
+37%* +24%
*with 10% overdrive
Gate density
Speed up with full overdrive option 36%
Power reduction for longer battery life
Performance on Cortex-A9 POP 2.0 GHz
+36%
40%
2X+
40% lower power @
same speed
GLOBALFOUNDRIES Confidential 14
Advantages of 28HPP Platform vs. 40G
2.0
1.5
1.0
0.5
0 40G 28HPP
Speed Ratio (worst-case)
2X Gate density
25% Speed up
46%
>2 GHz Performance on Cortex-A9 POP
Active power reduction (for equivalent perf.)
52% Leakage power reduction
+25%
40G
28HPP 46% lower power @ same speed
Speed: Worst-case conditions Active Power: Typical conditions
Active Power vs. Frequency
5.0E+0 1.0E+1 1.5E+1 0E+0 0E+00
1.0E-01
Frequency (AU x Hz)
Act
ive
Pow
er (A
U x
W)
2.0E+1 2.5E+1
2.0E-01
3.0E-01
GLOBALFOUNDRIES Confidential 15
28SLP/HPP Leveraged Previous Yield Learning
28nm HKMG
32nm SOI HKMG
2011 2012 2013 GLOBALFOUNDRIES Confidential 16
GLOBALFOUNDRIES Platform Technology 28nm Generation
Technology Segment Application Status
32SOI 32nm PD-SOI HKMG Super High Performance
High End Microprocessor/ Graphics
APU, game console CPU/GPU, Server
In Volume Production
28HPP 28nm Bulk HKMG High Performance Plus
High End Microprocessor/ Graphics, Networking, Bitcoin Processors
APU, CPU/GPU Networking, Server High-end mobile
In Volume Production Many Customers
28SLP 28nm Bulk HKMG Super Low Power
Wireless Mobile Computing/Consumer
Consumer Mid/Low Tier Mobile, Industrial
In Volume Production Many Customers
28LPS 28nm Bulk Poly SiON Low Power Standard
Wireless Mobile Computing/Consumer
Mobile Baseband Mobile RF Transceiver Mobile Connectivity
In Volume Production
Next Gen FDSOI
Full Depleted SOI Mobile, Automotive, Consumer, IOT, Computing, Infrastructure
Any where LE technology is PPC challenged
Planning / Development
Typical 32nm SOI Chips Typical 28nm Chips: Basebend, GPU, Gaming, uP
GLOBALFOUNDRIES Confidential 17
28nm HKMG Process Unprecedented SoC Performance
Delivering SoC solutions for ARM Cortex-A9 Up to 2.0 GHz on 28SLP Demonstrated up to 3.0 GHz on 28HPP
Dual Purpose: Optimized foundry customer hard macro Cortex-A series qualification vehicle
GLOBALFOUNDRIES and ARM enable early POP IP in 28SLP for Cortex-A12 Artisan Core-optimized Physical IP ARM Implementation Knowledge and Certified Benchmarking
GLOBALFOUNDRIES Design Solutions implemented Cortex-A12 Quad-Core test chip using ARM POP 2.0 GHz at Typical Process & Temperature (STA) Well within the Mainstream Mobile Power & Area Envelope faster
time to market
INNOVATING TOGETHER.
GLOBALFOUNDRIES Confidential 18
28nm Value Added Packaging Solutions
Collaborative Business Model
Copper Pillar Enablement Production ramp in 2014
2.5D TSV Si Interposer Design-in Ready
Demo with Open-Silicon
GLOBALFOUNDRIES Confidential 19
28 nm 1H 2015 MPW Schedule
2015 Jan Feb Mar Apr May Jun
28nm SLP/HPP
0332 5 Jan
033B 3 Apr
Indicated dates are customer DRC-Clean GDSII Tape-out deadlines
LOGIN to Global-FoundryView for access to the latest GlobalShuttle schedules
6 months rolling forecast window visible to customers
GlobalShuttle * Your Proof-Of-Concept Prototyping Partner *
GLOBALFOUNDRIES Confidential 20
Innovating Together for Shared Success
State-of-the-art 28nm platform solutions and proven capacity are ready to serve your customers
Comprehensive IP roadmap available in 28nm Early Engagement Model Optimized Solutions Broad IP Implementation
Unique collaborative design, manufacturing and business model with broad ecosystem support
We will continue to invest in 28nm platform and manufacturing capabilities for years to come
Over 1 million wafers already shipped and 28nm expected to be a very long-lived node
GLOBALFOUNDRIES Confidential 21
Now Delivering on 20LPM and 14LPE/LPP
20LPM
Market endorsed Mobility/Consumer segment Relatively small node with limited
industry adoption
Unified single solution from day1 Maximize efficiency, avoid multiple
point solutions Optimized power, performance,
area, cost enabled by unique technology architecture
Multiple customers; multiple product tapeouts
Production capacity in our Fab8 Malta site
2x Gate Density
+35% Performance
$$$ Cost
Effective
2014 Production
GLOBALFOUNDRIES Confidential 23
A Decade of FINFET R&D
FINs
Contact
FIN Gates @ 64CPP
High speed FinFET device N&P (2001)
FinFET fully-depleted RO demo (2003)
Functional SRAM 0.22m2 (2002)
0.063m2 SRAM with FinFET (2010)
FinFET CMOS demo (2002)
Conformal doping in FinFET (2011)
GLOBALFOUNDRIES Confidential 24
GLOBALFOUNDRIES & Samsung Collaboration
A new strategic collaboration between GLOBALFOUNDRIES and Samsung
Provides global capacity for leadership 14nm FinFET technology
Gives customers choice and assurance of supply that can only come from true design compatibility at multiple sources across the globe
Addresses industry needs with advancement of the foundry supply chain model
Covers both 14LPE and 14LPP, the leading choice for high-volume, power-efficient SoC designs
GLOBALFOUNDRIES Confidential 25
14nm-LPE Offers Breakthrough Power/Performance
14LPP vs 28HPP ~50% performance boost at matched power ~60% power reduction at matched performance
14LPP over 20LPM ~30% performance boost at matched power ~35% power reduction at matched performance
Performance Power
w/ BEOL loading
0.85V
RVT SLVT
45%
50%
GLOBALFOUNDRIES Confidential 26
Delivering Maximum Value with Leadership at 14nm
Aggressive gate pitch Smallest memory solution
Innovative layout schemes for compact logic
Other foundries
Smallest SRAM
Similar
Up to 15% Sm
aller
GLOBALFOUNDRIES Samsung Collaboration
GLOBALFOUNDRIES Confidential 27
Other
foundries
Aggressive gate pitch 78nm/84nm vs. 90nm
Smallest memory solution Innovative layout schemes
for compact logic
Smallest SRAM
Delivering Maximum Value with Leadership at 14nm
GLOBALFOUNDRIES Confidential 28
Stronger Eco System Collaboration
EDA Partners
IP Partners
ARM, SNPS, CDNS, Others
Design Services
PDK/Model/DM
True Fab-Sync
Technology Maturity - TTM
GLOBALFOUNDRIES Confidential 29
Production Ramp 2015
14LPP V1.0 PDK Available NOW
14nm Full Platform IP MPW starting 2014
Platform IP support Design Services
Mass production starting early 2015
14LPP Enhanced More performance, less power
14LPE Early TTM version, fully enabled
Common design rules
for fast migration
Common design rules
for fast migration
Less Power
More performance
GLOBALFOUNDRIES Confidential 30
14nm: Complete SoC Solutions
Mobile Market Applications
Compute, Connect, Storage Market Applications
FinFET Process Technology
Full Suite PDK
Analog IP Complex IP Foundry Sponsored FIP
FinFET models, advanced extraction, double patterning, DFM, FFM, Ref flows, P&R
High Speed SERDES
2.5D and 3D Packaging SoC Packaging
Power/Perf Optimized
CPU Solutions
Multi Vt, DVFS, power management,
Multicore GPU Solutions
GLOBALFOUNDRIES Confidential 31
Fully Enabled Design Platform DP Aware Reference Flows
28nm
14nm
#
%% GLOBALFOUNDRIES Downloadable Reference Flows Addresses key 14/20nm challenges Double-patterning aware routing, extraction, timing Mask decomposition and odd-cycle check Proven to achieve the PPA scaling designers expect
GLOBALFOUNDRIES Downloadable Design Methodology Notes
&!"#!
!&
Synthesis
Double Pattern-Aware Place & Route
Double Pattern-Aware Extraction & Timing
Mask Decomposition & Physical Verification
GLOBALFOUNDRIES Confidential 32
Advancing the Foundry Supply Model
Industrys 1st 14nm Single design Flexible sourcing
Technology information shared
Fab synchronized
Concurrent source(s) bring up
Assurance of supply True portability of IP
ecosystem
Fabless design with common PDK
PDK
Single design to technology-matched foundries
Fabs are in sync Materials Process recipes Integration Tools
Global diversity Capacity assurance True multi-sourcing
GLOBALFOUNDRIES Confidential 33
GLOBALFOUNDRIES Value Proposition
Proven Track Record Pure Play Foundry Experience Over 160 customers
Extensive Fabless Customer Support and Service Experience
Design ready 14LPP V1.0 PDK, DM, Model available NOW
14LPP Platform Offering IP, MPW, Design Services
On-time Fab8 readiness Product Ramp starting early 2015
Multiple Tape Outs on 14nm in 2014, 2015
GLOBALFOUNDRIES Confidential 34
14NM Platform Enabled for Customer Success
SEC collaboration announced
2014 2015 1Q 2Q 3Q 4Q 1Q 2Q 3Q 4Q
Multiple Product Tapeouts
Product Ramp PDK
released
Eval IP Kit
IP Design Kit Si Qualified IPs
MPW
Others
GLOBALFOUNDRIES Confidential 35
-32%
20LPM
28LPS
28SLP
28HPP +17%
+53%
+58%
28LPS
28SLP
28HPP
20LPM
-60%
-56%
-32%
20LPM
-50%
-45%
28SLP/HPP (smaller 28nm area with more competitive gate first DR)
28LPS
+30%
14LPP
-35% 10+ %
14LPP 14LPP
Speed @ ISO Power Power @ ISO Speed Area Reduction
Multiple migration paths from 28nm to 14nm Well Suited for High Performance & Low Power Market Needs
Silicon qualified 30% speed up or 35% lower power from 20nm to 14nm FinFET
Industrys most dense technology ~15% less area on HD SRAM than competition
PPA
28n
m V
s. 1
4nm
28nm-20nm-14nm PPA Value Proposition
GLOBALFOUNDRIES Confidential 36
GLOBALFOUNDRIES 14nm Update
14nm Silicon Maturity- Fab8 on track Good facility, tool, materials, module and device matching 100% physical module spec matching demonstrated DC/AC device performance Correlation with SEC fab tracks target Achieving SRAM Yield targets on track for production ramp in 2015 Early Reliability Assessment Passing
14nm Full Platform Enabled 14LPP V1.0 PDK, Models released MPW available IP support for Mobility, CCS and Consumer applications Design Enablement Reference Flow and Foundry customer support
GLOBALFOUNDRIES Confidential 37
Key Challenges Going Forward 10nm and Beyond
Advanced FDSOI
Advanced Technology Costs Continue to Increase to Maintain Scaling Trends
1,450 2,000 2,500
4,000 4,850
6,700 Fab Cost
250 310 400 600
900 1,300
Process Development Cost
15 24 34
60 100
150
Chip Design Cost
130nm 90nm 65nm 40nm 28nm 20/14nm
GLOBALFOUNDRIES Confidential 39
Characteristics of Various Market Segments
Power
Per
form
ance
Data Centers Networking Specialty
IoT devices* (Medical, Wearable)
Ultra-low-power SoC ULV Digital(0.6V) ULV RF (
Multiple Device Paths: FinFET and Planar ET SOI
Even without back bias, ET SOI can achieve >60% performance boost compared to 28LP Enables lower Vdd around 0.5V BEOL and MOL can be similar to existing 28nm technologies
GLOBALFOUNDRIES Confidential 41
FDSOI Value Proposition
Key dynamics Challenge: 28nm
cost reductions through derivatives and supply base maturity squeezing FDSOI space
Opportunity: Reduce cost through simplification, starting wafer price, die shrink
Opportunity: Increase performance through enhancements (xtor, strain, biasing flexibility, etc.)
Die Price (arb. units)
Rel
ativ
e pe
rfor
man
ce
28nm Poly SiON
28nm HP
20nm
14nm FINFET
GLOBALFOUNDRIES Confidential 42
28nm / 20nm PPA Trade-off
28FDSOI shows ~20-25% higher frequency @ same power, compared to 28LP and has comparable PPA to 28HPP Good Technology
20LPM achieves ~60% freq. boost @ same power, compared to 28LP With advanced FDSOI, it is possible to achieve 20LPM-like PPA, (with less
process complexity than 20LPM) Ideally suited for gate first integration and com