Global SMT & Packaging June 2010 (#10.4) - Americas edition

The Global Assembly Journal for SMT and Advanced Packaging Professionals

Volume 10 Number 6 June 2010

ISSN 1474 - 0893

www.globalsmt.net

Global SMT &

Packaging Volume 10 Num

ber 6June 2010

The Global Assembly Journal for SMT and Advanced Packaging Professionals

Volume 10 Number 6 June 2010

ISSN 1474 - 0893

NEW PRODUCTS

INDUSTRY NEWS

INTERNATIONAL DIARY

The imporTance of bond sTrengTh measuremenT

inTegraTed TesTing, modeling and failure analysis of cspnl for board level reliabiliTy

Teaming for improved ruggedized producT reliabiliTy

NEW PRODUCTS

INDUSTRY NEWS

INTERNATIONAL DIARY

The imporTance of bond sTrengTh measuremenT

inTegraTed TesTing, modeling and failure analysis of cspnl for board level reliabiliTy

Teaming for improved ruggedized producT reliabiliTy

Todd LovejoyInterview Inside

Todd LovejoyInterview Inside

Global SMT & Packaging – Celebrating 10 Years – June 2010 – 1www.globalsmt.net

Contents

ContentsGlobal SMT & Packagingis published monthly

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ISSN No. 1474-0893 © Trafalgar Publications Ltd

Designed and Published by Trafalgar Publications Ltd,

Bournemouth, United Kingdom-Printed by Ovid Bell, Fulton, MO, USA.

Volume 10, No. 6

June 2010

2 LEDs offer a bright future Trevor Galbraith

TechNoloGy FocuS

12 The importance of bond strength measurement Bob Sykes, XYZTEC

16 Integrated testing, modeling and failure analysis of CSPnl for board level reliability

Rex Anderson, Tong Yan Tee, Long Bin Tan et al, Amkor Technology, Inc.

30 What is AOI Resolution? Igor Sosman and Adam Shaw, ORPRO Vision

36 Teaming for improved ruggedized product reliability Dennis Gradler, Kimball Electronics Group

SPecial FeaTureS

40 Show report: NEPCON lights shine brightly44 SMT Answers46 Case Study: High quality manufacturing need not mean high production costs56 Interview—Todd Lovejoy, Victron Inc.

REGULAR COLUMNS

4 The electronic interconnection hierarchy Joe Fjelstad

24 Healthy recovery, but keep watching over your shoulder! Walt Custer and Jon Custer-Topai

58 Basic printed board repair and rework for copper tracks and pads, part 2 Bob Willis

Shear testing of BGA solder bumps—page 12.

52

6 Industry News40 New Products60 Association News61 IMAPS Europe62 International Diary

12

OThER REGULAR FEATURES

30

American edition

2 – Global SMT & Packaging – Celebrating 10 Years – June 2010 www.globalsmt.net

Editorial

Trevor GalbraithEditor-in-Chief

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Have you ever been in a situation where you were distantly aware of something hap-pening in the background, but you didn’t pay much attention to it, then suddenly, something happens and it’s as if somebody switched a light on?

In my case, it happened on a recent visit to China, and the light that was switched on was an LED. We had all heard about the growing applications of LEDs for lighting, LED screens on TV and the ever-growing signage and display industries. The scale of this growth however, is mind blowing—LEDs are going to completely replace incandescent lighting within as little as the next three to five years, globally! In part, this is being driven by legislation. China, for example, has mandated that all incandescent lighting is replaced with LEDs by 2012. LEDs consume much less energy, generate less heat and give a brighter, clearer luminescence. In an energy conscious world, they are manna from heaven.

So who benefits from this revolution? The answer is virtually everyone in the SMT supply chain. LED manufacturing uses all stages in the SMT process; however, there is a strong requirement for systems that handle large board sizes. Even clean-ing is required for many of the outdoor ap-plications that need to be conformal coated to prevent dendrite growth and other soils that could degrade the performance of the LED. There are also some new entrants in the form of test companies that measure the luminance and many other character-istics of the LED assemblies before sorting them into bin codes.

Comparing the LED market to other new markets for SMT suppliers, such as solar, the LED business is principally market driven, whereas the PV market is mostly government policy driven. Unlike the PV industry, however, the LED market opens up a lot of opportunities for contract electronics manufacturers. The cost of en-

try into PV has dissuaded all but the very biggest CEMs to venture into cell produc-tion and module assembly.

Fragile recoveryRounding out this month’s editorial, there seems to be some gray clouds gathering over the financial problems in Europe, threatening the fragile global recovery. So far there are no signs of it affecting the current boom in electronics manufacturing in the emerging countries and to a lesser extent in the United States. However, one amusing comment I heard this week came from the outgoing Treasury Minister in the United Kingdom. On his empty desk he left this message for his incoming suc-cessor, “I’m afraid to tell you there is no money. Kind regards and good luck!”

This is a phrase that many of us have heard too often over the past 18 months.

—Trevor Galbraith.

LEDs offer a bright future

Henkel – Materials Partner of Choice for the Electronics IndustryNo matter where you are or what your process requires, you can count on Henkel’s expertise. Our unmatched portfolio of advanced materials for the semiconductor and assembly markets, all backed by the innovation, knowledge and support of Henkel’s world-class global team, ensures your success and guarantees a low-risk partnership proposition.

Title


The electronics interconnection industry is the foundation of the electronics industry, and it has steadily grown and evolved from its earliest days. However, the path to where it is today was anything but linear and never completely predictable. That is not to say that everything in the electronics industry has been that way. Moore’s Law, for example, has served as a compass for semiconductor technology for more than four decades with the prediction of doubling of transistors on chips every 18 to 24 months. Even so, Moore’s revered prediction appears to have been mute on many issues that required significant technological changes to be made to address the challenges that accompanied the maintenance of it. The change from MOS to CMOS is one example that comes quickly to mind.

The foundational premise of Moore’s prediction was predicated on the observation that advances in lithography would pace the advance of the technology, and that prediction has held true, though there is recognition that there will be a “sunset” for the prediction at some point. In fact, it is because of this recognition (at least in part) that there has been a great deal of emphasis put on interconnection technology to continue to deliver on the prediction by offering something “More than Moore” as someone

aptly termed it. This bit of reality brings us to the subject of this month’s column and that, in short, is the growing recognition that the once bright lines that separated the hierarchical levels of electronic interconnection are beginning to blur as a wide array of new and evolving solutions are being introduced to deliver on the long standing promise of “better, faster and cheaper” electronic products with each new generation.

To better understand the challenge of the growing ambiguity, it is best to understand and appreciate the established view of electronic interconnection hierarchy. To assist in this effort, the reader’s attention is directed to the accompanying graphic where on the

area in white (lower left) is shown the traditional view of the hierarchy of electronic interconnections which was first developed in the 1960s. As can be seen, the divisions of labor for the various tasks involved in the creation of an electronic system were at one time fairly well defined. The semiconductor manufacturer created the integrated circuits on silicon wafers. The chips from these wafers were then

delivered to an IC packaging foundry where they were attached to a lead-frame or other substrate which both protected the chips and space transformed the I/O terminals to a more useful pitch which could be standardized. A printed circuit manufacturer built a substrate according to a design that would serve to interconnect all of the ICs and other components required for the product or specific function board. Next an assembler would take the printed circuit and mount the various components on to the board using a soldering process. The assembled boards, commonly called “daughter cards,” would then be connected to a next level motherboard or backplane. This completed assembly would then be

packaged in a format suitable for the purpose, whether it is a computer, a telephone switch, an Internet router or any other product. While this general description still holds true for a wide range of today’s

products, it is unfortunately woefully inadequate in its ability to describe all of the developments that are presently underway as shown in the blue area that extends up and to the right in the graphic. As can be seen, there are a lot of technologies that appear to sit on the seams, and there is increasing awareness of the need to find a way to embrace the emerging technologies that are already

The electronic interconnection hierarchy


Joe Fjelstad

While this general description still holds true for a wide range of today’s products, it is unfortunately woefully inadequate in its ability to describe all of the developments that are presently underway.

Technological developments are blurring the lines between interconnection levels


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being deployed to create next generation products.

One group that has been focusing on this challenge is the Jisso International Council (JIC), which is comprised of Asian/Japan, European and North American Jisso Councils. (For the edification of the reader, jisso is a Japanese word that is commonly translated as mounting. However in Japan the term has been adapted to describe the interconnection hierarchy.) The Jisso International Council, which met for the 11th time in late May of this year, is attempting to harmonize international standards to improve communications, and the matter of all of the evolving technologies has proven particularly vexing.

To understand the nature of the challenge, the reader is asked to look once again at blue background area of the graphic, where are shown representative examples of some of the emerging technologies that, as was pointed out earlier, do not fit neatly into the traditional view of electronic interconnections. Still, in many cases, these technologies are logical extensions of the traditional one. However, as can be seen in the graphic provided, these new technologies depart from the norm and now include a range of solutions which are moving into the 3rd dimension, both up and down the hierarchical ladder, beginning with wafers having through silicon vias (TSV) stacked one atop another, to chips stacked on top of other chips, to multiple chips packaged in a common substrate and packages being stacked on top of other packages, then to packages embedded in substrates and

finally substrates stacked on substrates. Many if not most of these solutions have deep roots in time, where some were early interconnection solutions outliers used in special applications only, there was little effort put into getting the technologies into the mainstream. However, with the looming challenges facing the industry, as alluded to in the opening paragraph of this column, these new solutions are rapidly becoming imperative choices, if the electronics industry is to continue to march ahead. That said, they will not happen without cooperation and effort. Industry-changing solutions require understanding and active participation in making the change happen.

If the reader’s interest has been piqued by the information offered here, it is suggested that they visit the Jisso website at http://jisso.ipc.org/. Presently it

is hosted by the IPC, but as awareness and participation in Jisso activities grow, it will likely find and new home.

Verdant Electronics founder and president Joseph (Joe) Fjelstad has more than 35 years

of international experience in electronic interconnection and packaging technology in

a variety of capacities from chemist to process engineer and from international consultant to CEO. Mr. Fjelstad is also a well known author writing on the subject of electronic

interconnection technologies. Prior to founding Verdant, Mr. Fjelstad co-founded SiliconPipe

a leader in the development of high speed interconnection technologies. He was also

formerly with Tessera Technologies, a global leader in chip-scale packaging, where he was

appointed to the first corporate fellowship for his innovations.

The traditional view of the hierarchy of electronic interconnections first developed in the 1960s is no longer capable of embracing the advances that have been in development over the course of the last several years. As can be seen, there are many new technologies being introduced that fit in the seams of the once well defined technological divisions that separated the various elements of electronic interconnection technology.


Title

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Industry NewsIndustry News

GaN power management chip market set for boomThanks to rapid growth in the high-end server, notebook, mobile handset and wired communication segments, the gallium nitride (GaN) power management semiconductor market is expected to reach $183.6 million in revenue in 2013, up from virtually nil in 2010, according to iSuppli Corp. GaN is an emerging process technology for power management chips that recently moved beyond the university-based testing phase and into the commercialization stage. The technology represents an attractive market opportunity for suppliers by providing their customers with capabilities that may be out of the reach of present semiconductor process materials. The adoption of GaN devices will be driven by the improved efficiency and small form factors enabled by the material. www.isuppli.com

Bob Black awarded the iPc President’s awardIPC—Association Connecting Electronics Industries® honored Bob Black, president and CEO of Juki Automation Systems, Inc. with the coveted IPC President’s Award at IPC APEX EXPO™, April 6, 2010. This prestigious award is presented to IPC members who have exhibited ongoing leadership in IPC and have made significant contributions of their

time and talent to the association and the electronics interconnect industry. Black has nearly 35 years of senior executive management experience in the circuit board and semiconductor industries. He has provided leadership over the past 20 years to the industry and IPC through the IPC/EIA Surface Mount Council, the IPC Surface Mount Equipment Manufacturers Association (SMEMA) steering committee and the IPC APEX Trade Show Subcommittee of which he was a founding member. Black is also a current IPC Board member, serving a four-year term. www.jukiamericas.com, www.IPC.org

STi electronics expands into the SouthwestSTI Electronics, Inc., a full service organization providing training, electronic and industrial distribution, consulting, laboratory analysis, prototyping, and small- to medium-volume PCB assembly, appointed Jack Harris as an outside sales rep to expand coverage of the company’s products and services into Texas, Oklahoma, Arkansas and Louisiana. Jack can be reached at (214) 770-1399 or [email protected]. www.stielectronicsinc.com

Seho Systems appoints new regional sales manager

SEHO North America, Inc. promoted Mr. Jean Verchere to the position of regional sales manager,

effective April 1, 2010. Jean Verchere has been working in the PCB manufacturing and assembly industry for more than 22 years with reputed companies. He will be in charge of increasing SEHO North America’s market share west of the Mississippi. www.seho.de

Digi-Key offers ‘wealth of information’ with Tyco electronics Supplier Marketing centerElectronic components distributor Digi-Key Corporation provides direct access to more than 28,750 3-D models and more than 60,000 datasheets for Tyco Electronics (TE) products from Digi-Key’s Supplier Marketing Center (SMC) designed for Tyco Electronics, www.digikey.com/tycoelectronics. Digi-Key’s Tyco Electronics SMC also provides 18 PTM Online...On Demand® product training modules, exclusive to Digi-Key, for various TE products with new PTMs to be added in the future. www.digikey.com, www.tycoelectronics.com

Victron names David yu as vice president supply chain managementEMS supplier Victron, Inc., announced that David Yu joined the company as vice president supply chain management. Mr. Yu is responsible for expanding and managing the company’s global supply chain strategies and purchasing initiatives. Yu has more than 15 years experience with OEM and EMS companies, most recently serving as vice president of supply chain management at Natel Engineering. www.victron.com

christopher associates expands engineering teamChristopher Assoc Bruce Barton.JPGChristopher Associates Inc., has expanded their applications engineering team with the addition of Bruce L. Barton. Mr. Barton has over 20 years experience in high technology manufacturing in troubleshooting, process and product development, training and customer support. He is also a Six Sigma black belt. www.christopherweb.com

Kic appoints distributor for BrazilKIC announced that Focus Da Amazonia has been appointed its new distributor for all of Brazil. “I am very confident that

New order bookings for SMT equipment continue to rise worldwideSIPLACE Marke tIntelligence Stephanie Pepersack.jpgAccording to the latest market analyses conducted by Siemens Electronics Assembly GmbH & Co. KG (SEAS), electronics manufacturers are heavily investing in SMT equipment again. The main growth engines continue to be plants in China and the rest of Asia, but orders from Europe are also on the rise for SIPLACE and other equipment suppliers. In the first five months of its current fiscal year from October 2009 through February 2010, the SIPLACE team recorded as many orders as during the entire twelve months of 2008/2009.

The order bookings for SMT equipment prove that the economic recovery is picking up speed. For the period from October through February, global new order bookings more than tripled compared to the same period last year. China played the dominating role, but since the middle of 2009 order bookings from Europe have begun to recover as well (posting a plus of 30 percent from January to February alone). www.siplace.com


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Industry News

Dilton Vasconcelos and his team will well represent KIC in Brazil. Dilton is no stranger to KIC with years of experience selling and servicing our products,” said Brian O’Leary, North American sales manager. “He has an excellent reputation in Brazil for his hard work, integrity and results.” www.kicthermal.com

Test research inc. sells 300+ aoi, SPi systems & 250+ board testers in Q1 2010Test Research Inc. (TRI), announced that it had sold more than 300 automated optical inspection (AOI) and solder paste inspection (SPI) test systems combined in the first three months of 2010. Also sold were over 250 board testers and 15 automated x-ray inspection (AXI) systems—more AXI systems than sold in all of 2009. These numbers are the best three-month results in TRI’s history. www.tri.com.tw

h3c boosts production with additional genesis platform line

H3C Technologies Co., Limited (H3C), a supplier of IP-based products and solutions, has purchased an additional Genesis Platform production line from Universal Instruments. The new line will be configured similar to H3C’s existing Genesis line and used to build the company’s most complex products—those that demand the highest quality and yields. The decision to purchase the Universal equipment was based on the success of the initial Genesis line in building these same products. With principal operations in Hangzhou, China, H3C employs 4,800 people worldwide. The company has applied for more than 2,000 patents, 85% of which are original invention patents. www.uic.com

Nordson yeSTech wins fourth Service excellence award Nordson YESTECH, a subsidiary of Nordson Corporation, has for the fourth time, been awarded the coveted Service Excellence Award for 2010 from Circuits Assembly Magazine, which was announced at the 2010 APEX Expo in Las Vegas, Nevada. Nordson YESTECH was once

again acknowledged for its outstanding customer service achievements in the field of Test and Inspection Equipment. www.nordsonyestech.com

Krayden names new sales repsKrayden Inc., a distributor of engineered adhesive, sealants conformal coating and lead-free solder products, appointed Candace Bowen as the Mid Atlantic sales representative and added Gary Buckner to the Dallas Forth Worth area sales team. Candace brings more than 10 years of industry experience, along with years of experience calling on a diverse collection of OEM manufacturers relating to needs and offering solutions. Gary brings more than three years of industrial sales experience/management. www.krayden.com

assembléon wins three top pick & place awards; Mc-24X named best product of 2010Royal Philips Electronics subsidiary Assembléon has won three major pick & place awards for 2010. Besides collecting Circuits Assembly’s Service Excellence Award for the seventh year running and the tenth since 2000, Assembléon has picked up two awards for its MC-24X modular placement machine, introduced as the most versatile, space-efficient machine on the market—the SMT’s VISION pick & place award and Circuits Assembly’s New Product Introduction award. www.assembleon.com

NBS awarded aS9100 certification for design and assemblyEMS provider NBS received AS9100 certification for both design and assembly at their Santa Clara, CA, manufacturing headquarters. Certification was granted by SGS Group following the successful completion of an exhaustive and comprehensive audit of the company’s quality processes. AS9100 is the quality management system (QMS) standard specific to the aerospace industry. www.nbscorp.com

Seika names aPS WittcoSales as top McDry and Sawa sales representativeSeika Machinery, Inc., awarded Tom Wittmer and Ken Masci from Advanced Precision/WittcoSales second place for being top McDry and Sawa Sales Representatives in 2009. The award was presented to the company during a Wednesday, April 7, 2010 ceremony that took place in the Mandalay Bay Resort & Convention Center in Las Vegas during

APEX 2010. APS WittcoSales represents Seika Machinery throughout Southern California. www.apswittcosales.com, www.seikausa.com

cyberoptics wins the Best emerging exhibit of the year 2010 for its QX500 ™ aoi systemCyberOptics SMTA China Award 10.JPGCyberOptics Corporation has been awarded the Best Emerging Exhibit of the Year 2010 China East by SMTA China for its QX500™ AOI system. The QX500™ combines a unique image acquisition solution to provide highest-speed inspection at 100cm²/sec. The introduction of SIM modules in QX500™ offers “on-the-fly” AOI inspection combined together with CyberOptics’ patented image processing technique, SAM. This dual advantage undoubtedly sets it apart from the conventional inspection methods. www.cyberoptics.com

Kyzen’s Phil Zhang receives Best Presentation award from SMTa chinaKyzen Zhang Best Presentation SMTA China 10.JPGKyzen’s Phil Zhang has been awarded Best Presentation of Vendor Conference One (CE10) at the SMTA China East 2010 Award Presentation Ceremony for the presentation titled “Flux Residue and Its Impact on Reliability.” Published research documents the importance of cleaning when populating the circuit board with low clearance components and highly active lead-free solder fluxes. The purpose of this presentation was to help engineers identify the sources of residue and impact on reliability. www.kyzen.com

ZeSTroN integrates a video teleconferencing system as part of its “Global link” initiativeIn January 2010, ZESTRON announced a comprehensive “Global Link” initiative focusing on the creation and seamless integration of the company’s global knowledge database and technical expertise. The latest facet of this initiative was the installation of a high-definition video teleconferencing system designed to offer ZESTRON’s customers live and “hands-on” access to any of the company’s worldwide engineering teams, especially in critical situations when travel is not an option. www.ZESTRON.com

SMT/HYBRID PACKAGING

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The importance of bond strength measurement

introductionBond strength measurement is far from the highest profile portion of the electronic and semiconductor industries but it has matured with it, in some cases unnoticed. This doesn’t alter the fact that a precise knowledge of bond strength quality measurement during product design and subsequent manufacture is directly related to product success, customer satisfaction and profitability. To serve this need, a modern bond test system must be capable of accurately testing bond wires, solder bumps, dies, leads, chips and lids, as well as other applications with strengths varying from a few grams of force to as much as hundreds of kilograms of force. Investigating the roots of bond testing, outlining what is required to perform a good bond test and what a modern bond tester should be capable of performing is essential in defining an accurate bond testing protocol.

Getting back to basics, why measure bond strength in the first place? Bonds fail

either in production or end use, and these failures can be caused by their geometry, material or processing factors. These fac-tors greatly affect and ultimately define the quality and integrity of the bond. Measur-ing bond strength is then a useful tool during the design process and for quality control to minimize product variability, ensure manufacturing yield and increase end product reliability.

Bond testing has been around for so long you might not have thought what it is really for and how it should be done? The basic types of bond testing include pull and shear which are applied to either the destruction of the bond or to some force below this value in the form of a non-destructive test. A push test is sometimes used but this is closely related to the pull test. Non-destructive tests are normally used when extreme reliability is required such as in military or aerospace applica-tions. In these cases, every bond is tested to ensure the utmost quality level making this routine relatively time consuming and

Keywords: Bond Testing, Quality Assurance, Force Displacement Measurement, Bond Strength Modeling, High Impact Testing

Electrical and thermal bonds are such an integral part of electronic and semiconductor construction that they may often be taken for granted. Modern electronic assembly methods employ a myriad of bonding processes, each one a vital step in the manufacture of the final product. A typical consumer product such as a laptop computer may contain hundreds of thousands of bonds, yet if one fails it will probably result in a system breakdown.

Bob Sykes, XYZTEC, Panningen, The Netherlands


Figure 1. Shear testing of gold ball bonds within a semiconductor device.



costly. More commonly bonds are tested to destruction on a batch-sampling basis with the peak force and failure mode being recorded for statistical analysis. This is indeed a good starting point but requires examination in more detail. The best place to start is with the failure mode. This is based on the assumption that there is a particular failure mode, or range of modes, that may occur within a product. It is therefore reasonable to assume that the bond test should replicate the mode, or modes of interest. However, exact replica-tion is not always possible. The test load must be applied to some part of the sample and transferred through the sample to the bond. If this part of the sample is the only option and is weaker than the bond itself, the sample will fail before the bond.

Shear testingA good example of this is shear testing of a gold ball bond and wire bonds within a semiconductor device (Figure 1). A good gold ball bond will be stronger than the ball so the failure mode of a strong bond will be gold ball shear. It is not uncom-mon for production engineers to use this failure mode alone as an indication of bond strength but it does represent a limit to the capability of the test. A better test would produce a bond failure and record a higher force that corresponds with the bond strength. One of the prime objectives of a bond test designer is to try to produce the failure mode of interest.

As mentioned, peak force is by far

the most common metric for measuring bond strength. This is very often all that is needed but a force-displacement graph conveys a lot more information. Tradi-tionally force time was recorded because this is relatively easy to obtain but it is far less interesting. If the test is done at constant speed the difference between a force-time and force-displacement graph is only one of scale on the X-axis typically denoting time or displacement. However, when testing with small bond deflections, high forces or at moderate test speeds maintaining a constant test velocity can be extremely difficult. In these cases a velocity-time graph may lead to a misinterpretation of the test results. Using displacement one can visualize the force increasing and fall-ing as the bond yields relate directly to the geometry of the sample. In addition the area of the force-displacement graph equals the energy absorbed by the bond, which in itself is an alternative bond strength metric that is particularly valuable when testing resistance to mechanical shock.

As previously mentioned, obtaining an accurate force-displacement graph can be challenging. In rigid bonds such as a die at-tach the deformation of the bond to failure is extremely small and typically less that the deformation that occurs in a well-designed test machine performing the test. The best way to overcome this is to use an external displacement sensor that directly measures the deflection of the tool applying the load to a datum point on the sample synchro-nously with the force measurement. Such a

system typically requires nanometer resolu-tion. The good news is that peak force is often all that is needed for this type of test and this is not affected by the types of errors that are typically seen in a displace-ment measurement.

Another use of the force-displacement graph is in bond strength modeling. This is of growing interest driven by the possibility that the strength and reliability of a bond may be virtually guaranteed during the design process. Given the massive range of geometries, materials and processes used this is no small undertaking. However, particular designs can be modeled and the model qualified by a bond test. The assumption being that if the model success-fully predicts the failure mode and force-displacement of a given bond test, there is a very good chance it will also make an accurate prediction modeling of a real-life loading condition. We should be aware that no bond test exactly replicates the real thing. For example when a chip capacitor bond breaks it is not because a shear tool has subjected it to a load (Figure 2).

Like any experiment the act of the measurement process can potentially change the measurement. Bond testing is typically a strength analog or comparator but nonetheless is an essential control tool in assuring product quality in electronic assemblies.

Solder bump testingFor many years, solder bumps have been sheared at speeds of less than 1 mm/sec-ond. It has been found that testing at these speeds almost always produces failures in the bulk solder but manufacturing and end use failures occur in the bond interface. Recent developments have shown that test-ing at speeds in the range of hundreds or thousands of millimeters per second more often produce the ‘failure mode of interest’ at the bond interface which is therefore much more meaningful (Figure 3).

Holding the sample is of equal im-portance. In many bond test applications, sub-micron precision is required while in other cases forces of up to hundreds of kilograms of force are often a require-ment. High force applications of up to 500 kilograms (Kgf) means that great attention be applied to this detail together with the contribution of a skilled or knowledgeable technician as one of the keys to ensure quality results. Standard fixtures are often used but this sometimes requires modifica-tion or custom tooling has to be designed to hold the sample. Clamping is normally required to fully support the sample when it is subjected to the test load but in such

Figure 2. Impact measurement unit testing chip capacitor mounted on printed circuit board.



a fashion that the bond is not stressed and negligible sample deflection occurs.

Die pull applicationsDie pull, also referred to as stud pull, has been used for many years as an alternative loading condition to the more frequently used shear test. It is generally a more dif-ficult test since a stud has to be glued to the die which can then be pulled to test the bond (Figure 4). The strength of the adhesive bond between the die and the stud will limit the maximum load that can be applied to the bond. Adhesive strengths of around 20 to 30 megapascal (MPa) are possible and current research is trying to increase this limit to 45 MPa. The increase in stacked die and wafer-to-wafer applica-

tions using multiple layers of silicon is driv-ing a corresponding increase in this type of test. It also has relevance when a layer or die is very thin and the stress concentra-tion on the side of the sample exceeds its yield stress in a shear test. In these cases the stud pull test distributes the load over the larger top surface.

Ease of use is another fundamental re-quirement of any bond testing system. Any complex measurement system potentially runs the risk of producing errors due to op-erator misunderstandings and or fatigue. Ease of use also directly affects throughput and cost of ownership. The most common interface with the operator or engineer is that the software must be straightforward, intuitive and yet comprehensive and flex-

ible for the very wide range of bond testing applica-tions it must serve. Hardware is also important, starting with the loading of a sample through to continuous and easy testing. Controls and optics, usu-ally a stereo zoom microscope, must be conveniently and ergonomically placed.

A final ingredi-ent in a bond tester is flexibility. There

are many differing demands made upon a modern bond testing system. To serve this range of applications the machine must be flexible for the wide variety of tests and samples. Some requirements are narrow and so the system must be configurable to a cost effective solution. Other requirements can be varied and so the same configurability can be used to enable on-site changeover for a wide variety of applications. To achieve this, a range of various frame sizes are needed that have an open layout with accurate and long travel axes coupled to an easy way of changing between test sensors. In effect, a multifunc-tional bond tester equipped with automat-ic selection of pull, shear and impact tools and interchangeable revolving measure-ment unit and impact measurement unit sensors has a high degree of versatility and is capable of bond testing a wide variety of semiconductor and printed circuit board assembly applications.

conclusionThe subject of bond testing is far ranging and varied but the value that it contrib-utes to ensuring product quality cannot be overlooked. Precise force displacement measurement using a modern bond tester allows bond strength modeling that can successfully predict the various failure modes and can be used as an accurate prediction model of real life loading condi-tions.

Bob Sykes is Chief Technical Officer for XYZTEC BV located in Panningen, The

Netherlands. In his role he has gained worldwide recognition as an expert in the

field of the development and design of bond testing equipment and has improved bond test methodology and solder joint integrity

throughout the semiconductor and electronics assembly industries. He may be contacted at

[email protected].

Figure 4. High force bond tester performing die pull or stud pull test.

Figure 3. Shear testing of BGA solder bumps.


Title


Integrated testing, modeling and failure analysis of CSPnl for board level reliability

introductionWLCSP with various design configurations1-2 is fast becoming a common package for high performance applications. Due to innovative production processes utilized in WLCSP manufacturing and the accompanying rise in the price of gold, the traditional wire-bond package is no longer as attractive as it used to be. In addition, WLCSP provides the smallest form factor to satisfy multifunctional device requirements along with improved signal integrity for today’s latest hand held electronics. Existing wire-bond products can be easily converted to WLCSP by adding a redistribution layer (RDL) during backend wafer level processing. Since the I/O pads do not have to be routed to the perimeter of the die, the WLCSP die can be designed to have a much smaller footprint as compared to its wirebond counterpart, which means more die can be packed onto a single wafer to reduce overall processing costs per die. Essentially, WLCSP enables the next generation of portable electronics at a competitive price.

Through an aggressive product development program that includes experiment and simulation, Amkor has developed the next level of WLCSP (CSPnl™) to service the WLCSP market. Amkor’s CSPnl devices are put through extensive reliability testing that includes board level drop tests, thermal cycling tests and cyclic bend tests that are governed by JEDEC test standard3-7. In order to insure first to market of CSPnl, Amkor has established finite element models that can predict the board level reliability performance as a function of factors such as stack-up layer thickness (dielectric and Cu thicknesses), under bump metallurgy (UBM) opening, die sizes, ball layout, and solder alloy materials. Integrated testing,

modeling, material characterization and failure analysis is performed to design new CSPnl products to exceed customer requirements for different applications. Figure 1 shows a typical bump and stack-up structure for CSPnl.

Board level drop testing of cSPnl

The reliability performance of IC packages during drop impact has become a great concern, due to increasing demand and popularity of handheld or portable electronics such as mobile phones, digital cameras, and PDAs. The mechanical shock resulting from mishandling during transportation or customer usage may cause interconnect failure, which may lead to malfunctions or end of life of the product18. When an electronic product is dropped onto the ground, the impact force is transmitted to the PCB, interconnects, and package. Product level drop testing19 is complicated because it depends on many factors such as drop height, drop orientation, component layout on the PCB, product design, etc. Board level drop testing is a more viable option to characterize the joint/interconnect reliability, because it is more controllable than product level drop testing. A few JEDEC test standards3-5 provide guidelines to conduct board level drop tests. Since board level drop testing is a key qualification test for portable electronics,

Keywords: WLCSP, Board Level Reliability, Drop Test

The wafer level chip scale package (WLCSP) is gaining popularity for its performance and for its ability to meet miniaturization requirements of certain electronic products, especially handheld devices like cell phones. Through an aggressive product development program which includes experiment and simulation, Amkor has developed the next level of WLCSP (CSPnl™), a product which exhibits superior board level reliability when subjected to drop impact, a strong requirement for portable electronics. This paper will focus on the reliability characterization of CSPnl drop test performance, with board design recommendations to eliminate board trace failures which could reduce the component’s actual drop test life by five to nine times. The paper demonstrates that CSPnl can exhibit two distinct failure modes under two different test board designs, resulting in a vast difference in drop test lifetimes. Integrated testing, modeling and failure analysis is performed to understand the failure mechanism of both cases.

Rex Anderson, Tong Yan Tee, Long Bin Tan et al, Amkor Technology, Inc., Chandler, Arizona, USA


This paper was original presented at IWLPC 2008 in San Jose, California.

Figure 1. CSPnl bump and stacked-up structure.



related studies have become a topic of interest by many researchers over the past few years9-18, 20-24.

Experimental setup for drop testing and FAThe setup of a board level drop tester follows the guidelines of JEDEC drop test standards3-5, having 15 WLCSPs (3 x 5 matrix) assembled on a test board (132 mm x 77 mm) The test board is connected to a fixture and then mounted to a drop block with screws. The drop block is dropped from a certain height along two guiding rods, onto a rigid base covered with a rubber layer. A multi-channel in-situ high speed data acquisition system is used to measure input/output acceleration, in-plane strains on board, and resistance of daisy-chained components. The JEDEC standard recommends certain input acceleration values and pulse shapes3-5. The testing described in this paper applies JEDEC condition B (1500G/0.5 ms) and condition H (2900G/0.3 ms). Condition H is applied for cases with extraordinarily long life, because it is impractical to test these cases at a lower impact intensity such as condition B. Dye & pry tests (D&P) and cross-sectioning are performed on failed samples to determine the failure locations and failure modes.

Drop simulationThere have been many types of drop modeling techniques established in the past few years by various researchers20-24 for different advanced packages. Most of the techniques have focused on solder joint reliability analysis. In this project, a common 3D geometry model is established for both board level drop testing and thermal cycling. For drop simulation, fine details such as PCB traces, Cu/RDL, stack-up layers, IMC, and UBM, are considered. In this paper, modeling is applied mainly for relative comparison of stress distribution within the Cu traces and failure analysis.

Integrated testing, FA & modeling analysisThe drop test results in Figure 2 for two different CSPnl devices—Type 1 & Type 2—are compared in Weibull plots. In addition, the detailed parameters and results are summarized in Table 1. Testing began with 4 boards that consisted of 15 packages (Design Type 1) per board using the common JEDEC drop test condition B (1500G/0.5 ms). CSPnl Design Type 1 has a die size of 5.4 mm x 5.4 mm with 144 I/O (12 x 12 full array) on a 400 μm ball

pitch and SAC405 solder. The test board trace design (labeled as “Old Board” in this paper) is circled in the illustration of Figure 3.

Figure 2 and Table 1 show that the PCB subassembly with CSPnl Design Type 1 (Old Board, 1500G) has its first failure (FF) at 81 drops and has a characteristic

life (failure rate of 63.2%) of 437 drops, which is on par with or greater than drop life of many other similar-size WLCSPs or large-size BGAs reported in the literature. FFs are usually much less than 100 drops while characteristic life is usually >100 drops.

At first glance, the drop test life of CSPnl (Type 1, Old Board) appears to be reasonable and in fact exceeded a common industry drop requirement of FF >40 drops. As a usual FA practice, cross-sectioning was performed to cut along AA and A’A’

rows (see Figure 3) of I/O. These rows are known to be critical failure locations for both BGA’s and WLCSPs 10, 12, 14, due to differential bending of chip and test board, which induces high bending stress

CSPnl Design

Board Type

Test Condition

First Failures (# drop)

Acc. Factor for FF

Char. Life (# drop)

Acc. Factor for C. Life

Type 1 Old 1500G/ 0.4 ms

81 437 -

Type 1 New 2900G/ 0.3 ms

648 8.000 2194 5.017


1962 (predicted)

24.222 (predicted)

4057 (predicted)

9.248(predicted)


1605 - 3656 -


4860 3.028 6761 1.849

Table 1. Summary of drop test results. Design Type 1 vs. Type 2 is a difference of CSPnl stack-up designs. Board Type “Old” vs. “New” is a difference of PCB I/O routing approach from the longitude or latitude direction.

Figure 2. Weibull plots of CSPnl drop test results.

Figure 3. Correlation of modeling and failure analysis. Board traces circled with the dashed lines indicate the PCB I/O approach in the “Old Board” design from the lon-gitude direction. To limit board side failures, the “New Board” design utilized PCB I/O traces in the latitude direction where stress values were lower.



in the PCB length direction. Surprisingly, for this particular study, there was a very high percentage of cases where failures could not be found by AA and A’A’ cross-sectioning. After unsuccessfully finding failures in the WLCSP by cross sectioning the first two outer rows, it was determined that the failures must have occurred in the PCB. This was later verified with FA on the PCBs. In the few cases where failures were found in the WLCSP, it was determined that Cu/RDL vertical cracks (see Figure 4 in later section as an example) were the most common failures, followed by the less common case of solder joint cracks near the PCB side.

As mentioned, due to a high percentage of failures not identified by AA and A’A’ cross-sectioning of the WLCSP, effort was spent to perform top-down grinding (see Figure 3, BB view), to delayer the PCB subassembly until board traces were exposed. With this FA method, PCB trace cracks were observed at locations near the outer row balls. The primary failure was identified as I/O trace cracks in the PCB (see regions circled in Figure 3). High stress regions were identified in the PCB traces that approach in the longitudinal direction with drop modeling simulation (red/yellow color, see Figure 3, bottom-right images), which correlated well to the trace cracks identified and observed in the PCB FA.

The FA for CSPnl (Type 1, Old Board) was taken a step further and a new method was developed to insure the failure was more efficiently and accurately identified. The new technique is called “L-Cut” or bi-directional orthogonal cross-sectioning. First, AA cross sectioning is performed. If no failure is found, then the same sample is cross-sectioned along the critical board trace directions (e.g. CC view in Figure 3) predicted by the drop simulations. With standard FA techniques, the failure would not be identified in the sample. However, with the L-Cut method, the board trace failure can consistently be found (see Figure 3, board trace failure found in CC view). Using the L-cut technique, it was determined that the PCB trace failure was the primary failure mode and WLCSP Cu/RDL trace fracture on the WLCSP side was the secondary mode of failure.

The reason for multiple failure modes for the “Old Board” is that after the first few components have failed under drop testing (e.g. 81 drops for first failure), the same test board continued under repeated drop impacts until 400 drops or more. Therefore, secondary failure modes (i.e. WLCSP Cu/RDL vertical

cracks) or even tertiary failure modes (e.g. solder joint crack or PCB pad liftoff) had time to develop in the later stages of the drop testing. These failure modes were also confirmed as secondary because they were randomly distributed across the die and did not always appear in the first two critical rows of I/O (AA and A’A’ views in Figure 3), i.e. they do not follow the behavior of primary failure mechanism10 which shows higher bending stress in the PCB longitudinal direction than in the latitudinal direction. If FA was not carefully performed (e.g. L-cut method), one would make the mistake of reporting WLCSP Cu/RDL vertical cracks as the primary failure mode because the PCB cracks would not be found and only secondary or tertiary modes would be identified. Without using the L-cut method, many of the samples would be primarily labeled as “failure not found” or a few of the samples would show Cu/RDL failures. The standard FA method would mischaracterize the true drop test performance of the CSPnl because the failures would not be credited to the PCB, but labeled as not-found or mistakenly credited to the CSPnl as Cu/RDL failures.

Since the primary drop test failure mode for the CSPnl Type 1 parts with the “Old Board” is PCB trace crack, the drop test results are not a true indication of CSPnl reliability but are more a reflection of PCB reliability. This implies that if a package (i.e. BGA, WLCSP, or other CSP) has a failure free life of more than 100 drops (compared with 81 drops for the PCB trace), the actual drop test performance of components might be underestimated.

real drop test life for cSPnl

Enhanced drop test board designFrom the characterization study described in Section 2.0, the PCB trace routing was redesigned. The PCB trace direction was changed from a longitudinal routing as in Figure 3 to trace latitudinal routing as illustrated in Figure 4. After this redesign, Cu trace stresses are redistributed from PCB traces to the Cu pad and RDL traces on the component side. In turn, the primary failure mode at the PCB traces may be eliminated and the device of interest, CSPnl can be properly tested and optimized. Drop test results of CSPnl with the “New Test Board” will be reported in the next section.

Drop test matrix and conditionThe drop test results of CSPnl for the same Design Type 1 using the “New Board”

(traces routed in PCB latitudinal direction from the package outline) are illustrated in the Weibull plots of Figure 2. In addition, detailed parameters and results are summarized in Table 1. Initial trial tests of CSPnl using one new board under 1500G/0.5ms (JEDEC condition B) shows that there were no failures up to 1000 drops. Although a desirable result, the New Board design coupled with the superior performance of CSPnl Type 1 created a challenge to produce statistically significant data within a reasonable amount of time. For example, the drop count to produce a statistically significant number of failures would result in the testing of about only one board per day (assuming 6000 drops/working day). For large test matrices, this produces a tremendous amount of wear on the drop tester and prolongs testing time.

For a meaningful engineering comparison of different design cases, sufficient failures must be generated for plotting of Weibull graphs. Therefore, a much stronger JEDEC condition H (2900G/0.3 ms) was applied to the Type 1 & Type 2 CSPnl parts mounted on the New Boards. CSPnl Type 1 is similar to CSPnl Type 2 with only a difference in stack-up design (detailed analysis of design improvement will be reported in a future publication). Referring to the plots in Figure 4 for the New Board design, the difference between the 1500G/0.5 ms and 2900G/0.3 ms test condition is a factor of about two times (to be exact, 6761/3656 = 1.849) in characteristic life and about three times (to be exact, 4860/1605 = 3.028) in FF for CSPnl Type 2 (see Figure 2 and Table 1). This factor is consistent with findings of other researchers23-24 who reported about 2-5 times difference in life for BGAs under the B and H test conditions. In-house FA also shows that the failure modes of both test conditions are consistent, i.e. related to WLCSP Cu/RDL. Therefore, it was determined that JEDEC condition H (2900G/0.3 ms) could be applied as an accelerated drop test condition. In addition, drop test life at JEDEC condition B (1500G/0.5 ms) can be conservatively estimated as twice the former value for JEDEC condition H.

Integrated testing, FA & modeling analysisFigure 2 and Table 1 show that the PCB subassembly with CSPnl Design Type 1 (New Board, 2900G) has its FF at 648 drops and a characteristic life of 2194 drops, which is five times longer in life than the same component tested using the Old Board (primary failure mode was PCB


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trace). By applying the same accelerated factor (1.849 for characteristic life, 3.028 for FF) between 1500G and 2900G (Type 2, New Board), the actual drop test life of CSPnl (Type 1, New Board, 1500G) can be predicted as high as 1962 drops (648 drops x 3.028) for FF and 4057 drops (2194 drops x 1.849) for characteristic life (see Table 1), which is about nine times longer characteristic life (4057/437) and 24 times longer FF (1962/81) than the same CSPnl

(Type 1, 1500G) using the Old Board!In order to confirm the primary failure

mode of Type 1 with the New Board, both dye & pry tests and cross-sectioning were performed (see Figure 4). With the “New Board” design, board trace cracks were not observed. Furthermore, failures were predominantly Cu/RDL trace cracks at the component side. As indicative of primary failures, the WLCSP Cu/RDL failures were found along the two outer rows of I/O, along the PCB longitudinal direction (see Figure 4). Thus, with the change in board design, failures were moved from the PCB side to the component side. The failure mode will be shifted whenever the weakest link of the system is removed. Using the FA techniques previously described, the weakest link was identified and eliminated which led to a true measure of CSPnl reliability (details of CSPnl design improvement will be published in future publication).

Therefore, CSPnl with Design Type 1 has FFs of 648 drops and 1962 drops under 2900G and 1500G JEDEC test conditions, respectively. As mentioned, the required minimum failure-free life is 40 drops under the 1500G testing condition. This particular design of CSPnl has 49 times the required failure margin! This superior drop performance will enable

future CSPnl designs with larger die sizes (e.g. 7 x 7 mm or even 10 x 10 mm) and more I/O count.

The Old Board design from previous studies discussed in the “Board level drop testing of CSPnl” section reduced actual drop test performance by about nine times for characteristic life, and 24 times for FF. Therefore, when the same WLCSP is tested by customers or third parties, care should be taken in board design to avoid PCB trace failure during drop testing, so that the true drop test performance can be quantified for the WLCSP of interest Similarly, board designs should be carefully considered to prevent issues during component assembly that can also reduce testing lifetime results. The board trace design consideration is very different from the cases of using a low-CTE board to improve TC life (reducing CTE mismatch) or using a stiffer test board (reducing differential bending) to improve drop test life. For component manufacturers, a component’s true board level reliability should be test board independent (possible through standardization of test boards by JEDEC), where the failure ideally should occur at the component side or solder joint interconnect.

Boad level Tc tests of cSPnl

Thermal cycling performance of CSPnl is usually studied in parallel with drop testing because while one package design variation is positive for drop performance, the inverse may be true for TC performance. In addition, certain product applications require a shift in priorities between drop and TC performance where TC is more important than drop.

The fundamentals of thermal cycling (TC) tests and modeling of board level

solder joint reliability have been widely studied by many researchers25-32. Therefore, in this paper, TC testing and modeling methods are not emphasized. The focus is to characterize the thermal cycling performance of CSPnl, which is product specific.

Board level TC testing is a very common test requirement to ensure reliable package performance under extreme operating temperature conditions. For applications such as automotive, mainframe servers, routers and switches, TC testing is still an important consideration. Therefore, design compromise is required between the drop test, the TC test, and even the bend test, so that the product is optimized for its targeted application. In near future publications, CSPnl performance under TC testing and bend testing will be presented.

Experimental setup for thermal cycling testThe board level thermal cycling test condition applied is -40°C to 125°C (1 cycle/hr) which complies with the JEDEC test standard6. The required fatigue life varies among customers and their varying applications. However, a common TC requirement is typically a failure-free life of 500 cycles. The same CSPnl Design Type 1 (5.4 mm x 5.4 mm die size, 144 I/O on a 400 μm ball pitch with SAC405 solder) was tested.

Modeling of thermal cycling testsFor typical solder materials, the creep processes are expected to dominate the deformation kinetics because solder is above half of its melting point at room temperature and the loading rate is slow enough for creep deformations to occur.

Figure 4. Modeling and FA of Cu/RDL vertical crack. Figure 5. CSPnl thermal cycling test results.


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Darveaux’s approach31-32 with Anand’s viscoplastic model is applied to calculate the average plastic work or strain energy density (SED) per cycle accumulated along the critical failure interface. Larger SED leads to shorter solder joint fatigue life.

Integrated testing, FA & modeling analysisFigure 5 shows that CSPnl Design Type 1 has FF of 617 cycles, mean life of 979 cycles and characteristic life of 1032 cycles. This exceeds the minimum requirement of 500 failure-free cycles. Figure 6 indicates that the failure mode of CSPnl under the TC test is typical, i.e. bulk solder failure near the component side at the corner ball. The failure location and interface correlates well with the modeling prediction, mainly due to CTE mismatch of the die and the PCB. The highest SED is located at the corner ball which has the largest distance-to-neutral point (DNP). Unlike the drop test, the TC behavior of CSPnl is closer to BGAs and conventional WLCSPs. Therefore standard design guidelines can be applied to improve its performance. For example, the SAC405 solder alloy, which has better TC performance than SAC105, can be selected, since the design margin for drop test is larger and can be compromised.

conclusionsAmkor’s CSPnl (5.4 mm x 5.4 mm die size, 144 I/O on a 400 μm ball pitch with SAC405 solder) has exhibited superior drop test performance with first-failures at 648 drops and 1962 drops under 2900G and 1500G JEDEC test conditions, respectively. CSPnl has also exceeded the thermal cycling performance requirement of 500 cycles under -40°C to 125°C (1 cycle/hr). These results imply that much larger die sizes are possible for future WLCSP products used in handheld and portable electronics where more emphasis is placed on drop test lifetime.

Integrated testing, modeling and failure analysis has identified the primary and secondary failure modes of CSPnl under drop and thermal cycling tests. It was shown that board trace layout could affect the reported drop test lifetime of WLCSPs or BGAs that have lifetimes larger than 100 drops because PCB traces may break earlier and provide a misrepresentation of the actual WLCSP or BGA performance. It is highly recommended that JEDEC test standards specify PCB trace routing in the latitudinal direction, so as to avoid board trace failure during drop testing and to accurately determine the true drop lifetime of the component under test.

acknowledgementsThe authors would like to thank Economic Development Board (EDB) of Singapore for funding of this project under Innovation Development Scheme (IDS). Appreciation is extended to colleagues from R&D group of Amkor Korea: ES Sohn, SW Cha, TK Hwang and WJ Kang, for their technical support.

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Figure 6. Thermal cycling modeling and FA correlation.



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32. Darveaux, R., “Effect of Simulation Methodology on Solder Joint Crack Growth Correlation,” 50th ECTC Conference Proc., 2000, pp. 1048-1058.

Lesson 1 : 3600CPH = 120 + (8mm) feeders

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Tsunami growth waves followed by modest swell

Growth accelerated in the first four months of 2010 as SE Asia led the electron-ics recovery and all regions followed. The global purchasing managers’ index (Chart 1) reached a high in April, and electronic equipment growth is now positive for all geographic regions (Chart 2).

Using the Henderson Ventures’ 2008 global electronic equipment market size estimate as a base year and the growth rates from Chart 2, actual monthly electronic equipment sales by region can be calculated (Chart 3). SE Asia obviously dominates.

Based upon composite quarterly finan-cials of 69 large, global OEMs, electronic equipment sales grew 13% in 1Q’10 vs. 1Q’09 (Chart 4). The ratio of inventories/sales remained well controlled throughout the supply chain (Chart 5).

All sectors of the “electronic food chain” enjoyed positive first quarter growth (Chart 6). SEMI equipment “led the charge” but most sectors had double-digit growth compared to the very poor first quarter of 2009.

Remembering that these various first quarter 2010 growth figures are relative to the chasm of early 2009, the recent huge 1Q’10 regional semiconductor shipment growth rates are not surprising (Chart 7). Global chip shipment growth (+58.3% on a 3-month basis) appeared to be near this current business cycle’ high in March. Al-though the world semiconductor shipment growth rate will soon peak, actual growth will continue as long as the 3/12 is greater than 1.0.

SEMI equipment shipments were up 79% worldwide in 1Q’10 vs. 1Q’09 (Chart 9). Capital equipment sales normally outgrow consumables in the upturns and decline more in the downturns of a busi-ness cycle.

Large EMS providers finally saw mod-est sales growth (+7%) in the first quarter (Chart 10) following seven quarters of contraction. The Taiwan-based ODM com-panies (Chart 11) by comparison enjoyed much stronger (+48%) first quarter growth.

The printed circuit board industry

(Chart 12) followed the world electronics food chain both in the 2009 depression and the early 2010 recovery. Based upon Custer Consulting Group’s global model, PCB sales declined 20% in 2009 but are on track to rebound 21% this year.

So…are our problems all behind us? Not quite. Financial troubles in Europe, the massive oil spill off the U.S. gulf coast, flight disruptions due to Iceland’s volcano and rapidly inflating raw material cost are among the reasons for caution. We are definitely recovering, but we need to keep looking over our shoulder!

end markets

Global IT spending will grow 7.7% in 2010.—Forrester ResearchComputers:• Worldwide PC Shipments grew 27.4%

in 1Q’10 to 84.3 million units—Gart-ner

• Global PC shipments increased 15% in 4Q’09, led by notebook sales.—IDC

Walt Custer and Jon Custer-Topai

Healthy recovery, but keep watching over your shoulder!

Chart 1. Chart 2.

Global "Purchasing Managers" Index

JPMorgan

1 2 3 4 5 6 7 8 9 101112 1 2 3 4 5 6 7 8 9 101112 1 2 3 4 5 6 7 8 9 101112 1 2 3 4 507 08 09 10

32

34

36

38

40

42

44

46

48

50

52

54

56

58DIFFUSION INDEX

EXPANSIONCONTRACTION

20100328

Global Electronic Equipment Shipment Growth

1 4 7 10 1 4 7 10 1 4 7 10 1 4 7 10 1 4 7 10 1 4 7 10 1 4 7 10 1 4 7 10 1 4 7 10 1 4 7 10 1 400 01 02 03 04 05 06 07 08 09 10

CALENDAR YEAR

0.6

0.7

0.8

0.9

1

1.1

1.2

1.3

1.4

1.5

1.63/12 rate of growth in local currency

Taiwan/ChinaEuropeJapanUSA0

20100513

Europe = Eurostat EU27 NACE C26 (computer, electronic & optical products)




• Portable PC market is expected to grow to 215 million units and US$117 bil-lion, in 2010.—DisplaySearch

Mobile Communications:• Global cell phone shipments grew

22% to 295 million units in 1Q’10 as economy recovers and smart phone desire grows.—IDC

• Global 3G handset shipments will grow 40% to 358 million units in 2010.—Strategy Analytics

Automotive:• Global automobile electronics market

is expected to be worth US$176 billion by 2012.—TEEMA

• U.S. cars and light truck sales climbed 24% y/y in March to 1.07 million units.—Autodata

• China sold 13.6 million vehicles in 2009.

Consumer:• Global shipments of LCD TVs will

grow 10% to 41.76 million units in Q2.—TRI

• Home automation systems revenue

will approach $12 billion worldwide in 2015.—ABI Research.

• Internet-connected TVs to reach 55% in total sales by 2013.—CEA

• Video game hardware sales fell 4% to $440.5 million in March as prices of consoles were down 16% y/y.

Peripherals:• Global monitor sales will rise 4% y/y

to 170 million units in 2010.—Samsung Taiwan

• Pocket projector shipments will grow from 0.5 million units and $117 mil-lion in revenues in 2009 to 142 million units and $13.9 billion in revenues in 2018.—DisplaySearch

eMS, oDM & related assembly activity• Contract manufacturers will manufac-

ture 1.1 GW of solar panels in 2010, up 200% from 369 MW in 2009.—iSuppli

• Top 50 EMS providers’ sales for 2009

totaled an estimated $134.4 billion.—Manufacturing Market Insider

• Worldwide EMS sales will have a CAGR of 8% for 2010-2014 after a 11% decline in 2009.—IDC

ACW Technology’s Durham, North Caro-lina, manufacturing facility received ITAR approval.Altek will relocate its electronics manu-facturing and tech products businesses from 245 East Elm St. to 89 Commercial Boulevard in Torrington, Connecticut.API Technologies’ CEO Steve Pudles was elected vice chairman of the IPC board of directors.Assembly Contracts Limited (ACL) entered a strategic partnership to jointly design and integrate wireless components for Cinterion.Benchmark Electronics is a supplier of AccuVein’s AV300 vein finder.Briton EMS teamed up with MYDATA.CLS Holdings appointed CEO Henry

World Electronic Equipment Monthly Shipments

Converted @ Constant 2008 Exchange Rates

1 3 5 7 9111 3 5 7 9111 3 5 7 9111 3 5 7 9111 3 5 7 9111 3 5 7 9111 3 5 7 9111 3 5 7 9111 3 5 7 9111 3 5 7 9111 3 500 01 02 03 04 05 06 07 08 09 10

CALENDAR YEAR

0

20

40

60

80

100$ Billions

N America Europe Japan SE Asia

Source: Custer Consulting Group

20100513

Electronic Equipment SuppliersComposite of 69 Public Companies

Revenue, Net Income & Inventory

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 100 01 02 03 04 05 06 07 08 09 10

0

50

100

150

200

250

-50

$ Billion

Revenue 135 139 144 151 129 135 127 136 120 123 124 136 125 131 137 154 147 155 153 171 158 163 165 182 169 177 181 200 185 197 206 229 208 220 219 213 184 194 201 226 207Income 11 11 10 7 -2 -6 -12 -1 2 -12 -1 0 5 4 7 10 10 11 11 14 12 13 13 20 14 10 16 19 16 20 17 18 17 16 15 -5 8 13 15 21 17

Inventory 57 59 63 65 66 60 53 48 46 44 42 39 39 39 38 38 40 41 42 41 42 42 43 42 44 47 49 49 48 51 52 52 54 56 57 52 49 47 48 48 49

+13%

20100508

Computer 11, Internet 5, Storage 7, Communication 11, SEMI 13, Medical 3, Instruments 6, Military 6

Preliminary 1Q'10 based upon partial data

Chart 3. Chart 4.

Inventory/Sales RatioLarge Component Distributors, Semiconductor, EMS &

OEM Companies

3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 200 01 02 03 04 05 06 07 08 09 10

CY

0.20

0.25

0.30

0.35

0.40

0.45

0.50

0.55

0.60

0.65

0.70

0.75

0.80

0.85Quarterly Inventory/Sales ($)

SemiconductorEMSOEMComponent Distrib

20100508

EMS

Chips

OEM

Distr

Global "Electronic Foodchain" Growth 1Q'10 vs. 1Q'09 (preliminary results)

132

217

16

2716

4078

5855

2527

5040

47

Electronic EquipmentMilitary

Business & OfficeInstruments & Controls

MedicalCommunication

InternetComputer

StorageSEMI Equip

Semiconductors (SIA)Passive Components

Component DistribEMS-Large

EMS-MediumODMPCB

PCB Process Equip0 20 40 60 80 100

% Change

20100512

US$ equivalent at fluctuating exchange; based upon industry composites including acquisitions

TBD

Chart 5. Chart 6.



Klotz non-executive director of NOTE AB.Corintech appointed Julia Cotton cus-tomer support manager.Electronic Design Packaging Systems purchased an ORPRO Vision’s VT-S22 AOI system.Enics added a Teradyne TS121A ICT-test machine in Västerås, Sweden.Enics added 100 new employees in Elva, Estonia.EPIC received awards for responsiveness, dependability/timely delivery, manufactur-ing quality, technology and value in the category for EMS companies with revenues between $101 million to $500 million.EPIC Technologies and SFO Technologies formed a strategic alliance.Federal Electronics received an intercon-nect assembly contract for a Trident II (D5) MK6 life extension guidance system (Mk6LE).Flextronics:• delivered one millionth automotive-

grade embedded wireless module to Sierra Wireless.

• was ordered to pay EUR 11 million to former employees in Châteaudun, France.

• started microinverters production for Enphase.

• began producing solar modules for Q-Cells.

• will double its laptop production capac-ity in China this year with new plant in Suzhou.

• will run a California solar panel factory with SunPower.

Foxconn/Hon Hai:• acquired Sony’s LCD TV assembly in

Slobakia.• had 118,700 employees in China at the

end of 2009, up 9.7% from 108,200 in 2008; total labor costs dropped 27.83% from US$672 million in 2008

to US$485 million in 2009.• opened a pilot assembly line to make

computers in St. Petersburg, Russia, for Hewlett-Packard.

• is adding 6,000 additional workers for its PC manufacturing factory in Chongqing, China.

• is enlarging its Wuhan Manufacturing base.

HDP User Group released new guidelines for producing Pb free printed circuit as-semblies.Incap celebrated its 10-year presence in Estonia.Integrated Micro-Electronics opened new factory in Chengdu, China.Jabil began manufacturing Roombas for iRobot.JJS Electronics appointed Ian Bird Euro-pean business development manager and Richard Barratt principal NPI engineer.Kimball Electronics:• Jasper Facility achieved AS9100 aero-

space registration.• Poland operation received ISO 13485

medical certification.Lightspeed Manufacturing named David Kleffman director of operations.Limtronik added Goepel electronic’s au-tomated x-ray inspection system OptiCon X-Line 3D.Morey Corporation VP of operations Taymur Ahmad received 1st Annual SMT VISIONARY Award.NBS receieved AS9100 certification for Design and Assembly at their Santa Clara, California, manufacturing headquarters.Nippon Manufacturing Service acquired Shima Electronic.Note:• received a manufacturing contract for

Crem coffee machine control electron-ics in Tangxia, China.

• was appointed supplier of RF-based

PCB assemblies for Axell Wireless in Estonia.

• former president and CEO, Arne Forslund was named Colfax vice presi-dent of Europe, Middle East, Africa and Asia.

Panasonic outsourced its budget digital camera output to Sanyo.PCB Motors released a new “jigsaw” stator technology allowing motors to be mounted in, onto or above a PCB.RADA Electronic Industries received $1.6M in follow-on production and mainte-nance orders.Rimaster secured an order from CNS Systems.Rohde & Schwarz added a new SMT pro-duction line in Vimperk, Czech Republic.Sanmina-SCI:• acquired BreconRidge for $53M.• deployed Aegis software globally.• expects to have 20% of its global rev-

enues out of India by 2015.• is spending Rs. 250 crore to build a

facility in Chennai, India.• received expanded outsourcing contract

from Symmetricom.Seaward installed i-Pulse machine and ancillary SMT equipment at its factory in Peterlee, County Durham, UK.Stadium Electronics appointed John Har-ley business development manager.STI added a Heller 1913MKIII convection reflow/ curing oven.STI Electronics’ Pat Scott received IPC Dis-tinguished Committee Service award.Suntron Corporation implemented Valor to advance its DFM capabilities.Teletek Electronics received certificate from Polish laboratory CNBOP.TT electronics renewed global medical manufacturing partnership with BioOhio.United EMS (Warrington North West

Monthly Semiconductor Shipments$ Billions (3-month average)

SIA www.sia-online.org/

3/09 3/10 % CH

Americas 2.58 3.82 +48.2%

Europe 2.17 3.08 +42.0%

Japan 2.51 3.59 + 43.0%

Asia Pacific 7.31 12.57 +72.0%

Total 14.57 23.06 +58.3%

20100501

Global Semiconductor Shipments3-Month Growth Rates on $ Basis

Total $ Shipments from All Countries to an AreaSIA website: www.sia-online.org/

15915915915915915915915915915915915915915915915915915915915915915915915915915915/1084 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 00 01 02 03 04 05 06 07 08 09 10

0.4

0.6

0.8

1

1.2

1.4

1.63/12 Rate of Change

1

2 3

4

5

6

7

8

9

10

20100501

11 12

13

Chart 7. Chart 8.


Tsunami growth waves followed by modest swell

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England) invested in JUKI mounters.Victron opened new 30,000 SF facility in Rosarito, Mexico, and plans to add an-other 30,000 SF within the same location by end of next year.Victron• celebrated its 27th Anniversary.• named David Yu vice president supply

chain management.

Materials & process equipment3M: • Electronic Solutions Division intro-

duced halogen-free embedded capaci-tance material.

• released material library for use in ANSYS simulation software.

ASYS appointed Jeff Copson as national sales manager for ASYS and EKRA prod-ucts.Blakell Europlacer secured orders for 10 machines from UK-based manufacturers during March and April 2010.

Bliss Industries’ Shana Bliss promoted to VP of sales & marketing.Bob Black was awarded IPC President’s award.Christopher Associates added Bruce Bar-ton to its applications engineering team.Cookson Group named Jeff Harris as non-executive director to its board.Data I/O introduced ProLINE-RoadRun-ner for MYDATA pick and place machines.DuPont Circuit & Packaging Materials introduced Pyralux® TK flexible circuit materials for high speed and high frequen-cy PCBs.ESI USA achieved ISO 14001 certification.Everett Charles Technologies’ CEO John Hartner received IPC appreciation award.GOEPEL electronics appointed ATM as sales representative for its JTAG/boundary scan instrumentation systems.Henkel introduced Multicore LF620 lead-free solder paste.Hitachi High-Technologies opened Chi-

nese Service Center.Huntsman launched halogen-free TPU for cables.Indium announced a high-melting Pb-free solder alternatives agreement with Ormet Circuits.IPTE completed sale of automation divi-sion to founding members Huub Baren, Senior, and Vladimir Dobosch.Juki:• named Milan Zourek its Northern

Europe sales manager• rolled out a new small-size mount-

ing machine “JX-100 LED” for long circuit boards (800 x 360 mm) that was designed for LED boards.

Maskless Lithography introduced its MLI-2027 direct-write lithography system.Matrix Electronics named MacDermid its Canada distributor.NeoDec, the Holst Centre and TNO formed partnership on metallic inks for flexible electronics applications.

Global Semiconductor & Semiconductor Capital Equipment3-Month Shipment Growth Rates on $ Basis

Sources: SIA; Semiconductor Equipment Association of Japan, CCG est for 3Q & 4Q'09 SEMI

159159159159159159159159159159159159159159159159159159159159159159159159159159184 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 00 01 02 03 04 05 06 07 08 0910

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

2.2

2.4

2.6

2.83/12 Rate of Change

SemiconductorsSEMI Capital EquipSeries 5

Chips

Capital Equipment

20100504

Large EMS Providers Composite of 10 Public Companies

Quarterly Revenue Growth

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 101 02 03 04 05 06 07 08 09 10

0.0

20.0

40.0

60.0

-20.0

-40.0

Benchmark+Pemstar, Celestica, Elcoteq, Flextronics+Solectron, Jabil, Plexus, Sanmina-SCI, Sypris,Universal Scientific, Venture Mfg

20100505

Excludes Foxconn

Chart 9. Chart 10.

Large ODM Companies Composite of 10 Public Manufacturers

Quarterly Revenue Growth

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 199 00 01 02 03 04 05 06 07 08 09 10

0

20

40

60

80

-20

% Growth in NT$ (quarter vs same quarter in prior year)

20100311

Asustek Computer, Compal Electronics, Foxconn, Innolux Display, Inventec, Inventec Appliance, Lite On Technology, Mitac International, Quanta Computer, Wistron

World PCB Shipments (with forecast)Converted @ Constant 2008 Exchange Rates

135791113579111357911135 791113579111357911135791113579111357911135791113579111357911199 00 01 02 03 04 05 06 07 08 09 10 11

CALENDAR YEAR

20

30

40

50

60$ Billion

Source: Custer Consulting Group - synthesized from Henderson Ventures annual estimates and N. American, Japanese & Taiwan/China monthly PCB shipments and SIA European chip shipments

20100428

51.742.937.631.729.4

Assumptions:Europe = composite European SIA & local PCB assoc dataJapan & N. America from JPCA & IPC dataTaiwan/China based upon 44 rigid & flex company compositeRest of Asia growth = Taiwan/China 44 company compositeData scaled to match Henderson Ventures annual totals2007 based upon sum of monthly totals

38.6 31.231.6 54.3 51.1 40.9 46.2

-20%

+21%

Chart 11. Chart 11.



Nippon Sheet Glass named ex DuPont VP Craig Naylor as its president.Nordson EFD introduced new BackPack™ valve actuator.OK International launched new European webstore.Ovation Products named Tony Du sales manager for North America.Panasonic Flex Material qualified for use at Lenthor Engineering.Park Electrochemical named Susan Ma-caluso its director of engineering.Photo Stencil expanded capacity and capability at its Malaysian manufacturing facility.Polyonics introduced a flame retardant, halogen free polyimide label material.RPS introduced its new 3D Fiducial Vi-sion Inspection.Sojitz unveiled polyimide that dissolves in N-methyl pyrrolidone.STI Electronics appointed Jack Harris as an outside sales representative for Texas, Oklahoma, Arkansas and Louisiana.SunRay Scientific launched UV cured ZTACH™ anisotropic conductive adhe-sives for assembly of flexible electronics.TAMURA commercialized a new black light absorbing material “APB-300-11” for flexible circuits designed for LED array.Technica and Maskless Lithography signed a sales and distribution agreement.Tektronix opened a multilingual European customer care and centre of excellence in Schaffhausen, Switzerland.ZESTRON Europe promoted Sandra Pilz to product manager.ZTEST refinanced and consolidated three outstanding loans of its wholly owned sub-sidiary Permatech Electronics Corporation.ZOT Engineering invested in MYDATA MY100SX14 pick-and-place machine.

Walt Custer is an independent consultant who monitors and offers a daily news service

and market reports on the PCB and assembly automation and semiconductor industries. He

can be contacted at [email protected] or visit www.custerconsulting.com.

Jon Custer-Topai is vice president of Custer Consulting Group and responsible for the

corporation’s market research and news analysis activities. Jon is a member of the IPC and active in the Technology Marketing Research Council.

He can be contacted at [email protected].

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What is AOI Resolution?

This document explains the concept of magnification and resolution for automated optical inspection (AOI) systems. The concepts described are common to all machine vision systems making use of an objective or lens, and camera or sensor.

By way of simple examples, the following will be explained:

Optical Magnification is the ratio between an objects actual size, and its projected size, most commonly on the surface of the sensor.

Optical Resolution is the smallest distance between two distinct objects which can be reproduced at the projected surface.

Pixel Resolution or Pixel Count is the number of pixels comprising an image, or the number of pixels on a sensor.

Pixel Size is physical size of an object represented by one pixel of the object projected image on the sensor.

Radiometric Image Resolution is the number of discrete levels present in the image, in a gray scale image this is the number of grey scales used to represent intensity or reflectivity.

Spacial Image Resolution is the smallest distance between two lines which could be resolved in an image, or the number of independent pixel values per unit length.

image acquisitionImage acquisition is the process by which objects become digital images, which can then be processed. When the object is illuminated an image can be acquired. Each of the parts described above come together to result in an image from which image processing algorithms can extract useful information.

The algorithms finally determine the System Resolution, which is the smallest difference in a test characteristic that could be resolved, or detected, by the system.

optical Magnification An object seen by an AOI is lit by the illumination system. Light rays emitted from the source follow the laws of reflection. Reflected rays are captured by the lens to form an image, or object projection.

Real systems make use of complex,

optical objectives rather than simple lenses. However, the principal can be well understood with a thin lens model, as shown in Figure 1.

Optical magnification is the ratio between the projected object size h and its actual size H. Optical magnification can be expressed in characteristics of the system such a focal length of the lens F and distance to the object D. Hence, magnification M :

optical resolutionWe replace the object in Figure 1

with two points A and B. The minimum distance between A and B, as shown in Figure 2, that is still distinguishable on the image plane is the optical resolution.

Points are always projected on the image plane as a small disk known as an Airy Disk (shown in Figure 3) at a certain distance between A and B they will be projected as two overlapping disks.

The radius Rd of an Airy Disk is

dependent upon aperture a (of the optics), wavelength λ of the light and the distance D' between the image plane and the lens:

If the angle between the line B-B' and A-A' is α then the distance A'B' is given by

The image of A' and B' can only be distinguished if

The minimal distance between A and B can be described as

The minimal angle αmin could be found by substitution of δh into the Airy Disk equation:

Keywords: Automated Optical Inspection, Optical Resolution Optical Magnification

With so many machine vision systems on the market, and the megapixel arms race in the consumer camera arena, the concept of resolution can be a confusing one.This document describes each of the contributing factors, and the underlying principles. This document should be essential reading for anyone interested in understanding the difference between megapixels and resolution.

Igor Sosman and Adam Shaw, ORPRO Vision



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This can be simplified to

Having found the minimum angle αmin

, the minimal distance d

min becomes

Optical lenses of very high quality are described as

This means that optical resolution is directly proportional to the wavelength λ.

For optical inspection the visible spectrum may be used, from ~400 nm (UV) to ~700 nm (infrared).

λBlue ≈ 400nm = 0.40μmλRed ≈ 750nm = 0.75μm

These values, 0.4-0.75 μm, are the best possible optical resolution. Typically optical aberration (from non-Gaussian optics) will result in much worse values.

Pixel resolutionThe projection on the image plane is a two-dimensional continuous projection of light energy. In an AOI, a camera is used to capture the projection, the sensor is located at the image plane. Different types of sensor are used in different types of camera, however regardless of the technology, the conversion of the analogue, continuous, light distribution into a digital image has three main steps:

Spatial Sampling in which the continuous light distribution is converted

from light energy to voltage. The continuous distribution becomes discrete, however the signal remains analogue.

Temporal Sampling is the snapshot, freezing the sampled voltage in time. This can be achieved with a trigger, or electronic shutter.

Quantizing is the final step, in which analog to digital convertors take the analogue voltage and convert the continuous values into a finite range of values.

Spatial Sampling defines the pixel resolution.

The sensor is made up of an evenly spaced grid of elements, each element measure the light falling on it as a voltage (Figure 6). This is converted to a discrete value by the analogue to digital convertor. The resulting image is a mosaic of these picture elements, or pixels (Figure 7). A sensor with 2048 columns and 1536 rows

Figure 1. An image is formed of the object with height H, projected on the image plane with height h.

Figure 2. Two points ΔH apart, appear on the image plane δh apart.

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Figure 4. The electromagnetic spectrum, showing the visible range from ~400-700nm.

Figure 5. Image projected by the lens of points A and B is captured by the sensor as A' and B’.

Figure 6. Continuous distribution (green curve) is converted to discrete voltages per pixel.


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of pixels has a resolution of 3,145,728 pixels. Sensor pixel resolution is typically

described in megapixels (or millions of pixels), in this example 3 megapixels.

Pixel sizeThe physical size of a single element of the sensor, or pixel, varies between 5 and 15 μm (Figure 8). More usually, pixel size p is taken to mean the logical pixel size, which is the ratio of the dimension l of an object to the number of pixels n its projection occupies:

The logical pixel size depends on physical pixel size, optical magnification and spatial sampling. If 1 mm of a real object is projected on to 40 pixels, the logical pixel size is 25 μm For sensors with square pixels, the logical pixel size in X and Y will be identical; this is most often the case.

radiometric image resolutionWe have already seen the analogue to digital conversion during quantizing of the image on the sensor. Continuous values over a range become compartmentalized to discrete values. Radiometric resolution is the number of discrete levels that this

value may have.Commonly used sensors use an 8-bit

representation, resulting in 256 different values.

The higher the radiometric resolution, or the more discrete values available, the better small differences in object characteristics can be represented. (Figure 9)

algorithmic resolutionOverall system resolution depends on all the factors explained above, but it is not limited by them.

Smart algorithms make it possible to perform very precise measurements. Consider the imaging of a laser scan of a PCB. The scanning of the PCB produces a height profile (see Figure 10) where the height of the object scanned is directly proportional to the displacement of the line from the base line. The accuracy of simple pixel counting is limited to the logical pixel size, in the example image, the logical pixel size is 20 μm.

The number of pixels between the base line and the deposit may be counted in 20 μm steps.

However, this image has a radiometric resolution of 256. Using sub-pixel line detection algorithms the exact position of

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Figure 7. Voltages are converted to integer values, an 8 bit integer gives 256 discrete values.

Figure 8. An object projected onto the pixel grid.



the line can be determined. Each line has a certain width, with somewhat blurred edges. The middle of each line has pixels with high intensity (above 220) towards the edge the pixels become darker until there is no longer a measurable reflection (value of 0). Each pixel row is a one dimensional function of integer values; they can be plotted as in Figure 12a.

To find the edges, the second order derivative of the line is found (Figure 12b). Edges are located at the zero-crossing of the

second order derivative. By interpolation of the points around the zero crossing we can define a continuous function, which gives the exact point of the zero crossing in sub-pixel accuracy.

Considering the sub pixel result, a more accurate line can be calculated which is independent of the logical pixel size.

The described technique can deliver a tenfold improvement in accuracy, in the case of a 20 μm logical pixel, the accuracy of the measurement can be up to 0.2 μm.

Igor Sosman is a Software Developer at ORPRO Vision GmbH specialising in

Algorithm design. Adam Shaw is R&D Manager at ORPRO

Vision GmbH.

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Figure 10. A height profile obtained by imaging a reflected laser beam from paste deposits of a PCB. The thin line is the board, the thick lines represent 3 distinct deposits.

Figure 11. A section of the white line overlaid with the 20 μm grid.

Figure 12. Pixel values plotted in X, with intensity in Y (black spots) and 12b. Second order derivative of the line is found.

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The use of electronics is no longer limited to environments that are friendly to the electronic circuit board. These days, circuit boards are confronted with aggressive environments that shorten the lifetime of an electronic circuit drastically. Circuit boards can be protected against these influences using conformal coating. During this international event, speakers from leading companies in the conformal coating industry will give their view on latest developments in the industry.

Choice of coating material• Cleaning before coating• Application method• Curing• Quality control • Repair• Automation• Safety•

Register NOW! Learn about the process and be prepared!

Q U A L I T Y S I N C E 1 9 8 9

str. 15

2.4 / označení společnosti / doprovodné logo / barevné varianty

Doprovodné logo společnosti k vnější prezentaci. Uvedené varianty rozlišují realizační možnosti jednotlivých aplikací a jejich použití při rozdílných technologiích zpracování s ohledem na použitou velikost, stejně jako pro zdůraznění či potlačení apelu sdělení.

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Teaming for improved ruggedized product reliability

introductionThe process starts with an initial design review meeting to ensure that both the customer and contractor agree on the PCBA’s desired performance characteristics. This drives the product specification.

In this example, the product was a redesign of an existing product that had been in the field for five years. Strong focus was placed on bringing predecessor design failure modes and failure records into consideration in developing the new design. The contractor’s field return analysis discipline simplified this process.

Goals for the new design included conversion to RoHS compliance, elimination of failures driven by mishandling in the field and improvements in design for manufacturability (DFM) related to both the RoHS conversion and changes in placement equipment. Additionally, the customer had a build-to-order (BTO) requirement that caused some PCBAs to sit in queue within the manufacturing process. The design

qualification process needed to evaluate whether or not the additional queue time impacted solderability.

Design changes included:• Converted the PCBA to RoHS

compliant material.• Ground lines within the PCB had been

shortened to address previously seen issues in EMI performance.

• Free standing pins were replaced with a molded header. The product could be field programmed, however if a poor connection was made due to bent pins, field programming could become corrupted and generate a nonfunctional return.

• Moved/reoriented small footprint chip devices from the edge of the PCBA. The prior design had a snap-from panel, rather than routed break to reduce cost. The change in layout was a DFM improvement.

• Converted current sensing devices from axial lead precision shunt resistors to an SMT sense resistor.

When industrial ruggedized products fail in the field, printed circuit board assemblies (PCBAs) and/or subassemblies are typically not repairable because encapsulation or conformal coating processes make rework impossible. As a result, building a reliable product from day one is desirable. The challenge becomes identifying weak links in the product design. In some cases, the issue may be related to manufacturing, but in other cases the issue may be related to mishandling or hostile conditions in the field. When manufacturing is outsourced, the necessary information needed to understand the root cause of field failures may not be clearly communicated between the customer and the contractor. This article looks at how Kimball Electronics Group is changing that dynamic by applying tools such as failure mode and effects analysis (FMEA) and product qualification processes such as highly accelerated life testing/highly accelerated stress screening (HALT/HASS) to support early identification of design-based reliability issues for its industrial products customers. The benefits of this process are illustrated in a case study of board-level design modifications made as a result of early identification of potential reliability issues in an industrial product.

Dennis Gradler, Kimball Electronics Group, Jasper, Indiana, USA


Figure 1. Picture of cross section of two PCBs with differing Tg values.



Global SMT & Packaging – March 2010 – 38

One item present on the previous design that didn’t change was the pass mark at final functional test. The design review identified this as a best practice and mandated it as a required practice.

Validating assumptionsFollowing PCBA layout, an FMEA qualification plan was developed. For each characteristic identified, there was a set of tests defined to expose the part to conditions that would generate a failure

mode.Since some of the failure modes

would not be generated without long-term exposure to stressful environmental conditions, accelerated life testing was used. In this case the chosen tools were HALT and HASS profiling. A control group of PCBAs with a known performance level was tested under the same conditions as PCBAs utilizing the new design. The goal was to select new design options that had the same or

better life as the control group units and to understand which components failed first. The reason for interest in initial component failures was to investigate whether it was a failure driven by the component or by the attachment method.

In addition to validating the design changes, testing was done to validate assumptions on:• Thermal exposures. Design

specifications called for the PCBA to withstand up to four thermal exposures

Figure 2. Pad layout of area under PowerFET AFTER changing the pad size. Figure 3. Pad layout of area under PowerFET prior to layout change toincrease (slightly) the pad size.



during manufacturing. • Effect of aging on solderability. HASS

was used to determine the effect of aging on solderability with various PCB finishes to support the additional wait state requirement driven by BTO.

• Adherence of potting material. Effect of process variations during wave soldering that could impact adherence of potting material. The impact of solder mask finish (glossy vs. matte) was also evaluated.

The HALT powered test found that powerFETs were overheating. This drove a change in the PCB to increase the thickness of the copper under that particular component. The design team anticipated that the change would solve the problem and performed a HASS test using a new control group and variant. They found marginal improvement because in converting the PCB to RoHS compliance, a change in the laminate increased its Tg. The unintended result of that change was increased thermal resistance, which decreased the anticipated thermal

dissipation associated with the increase in copper thickness. The design was respun again with a larger area of copper increase to compensate for this and HASS showed the desired result was achieved. The HALT included vibration. Results of the test indicated that some failures were precipitated by the forming of the leads on a radial capacitor. This drove changes in the forming tooling to increase the radius of the bend and remove small nicks that were creating the stress risers which were driving premature mechanical failure.

The testing also validated the contractor’s recommendation to convert the axial lead precision shunt resistor to an SMT sense resistor. The customer had been reluctant to make the change, but the data indicated that the alternative recommendation performed equally well. The SMT alternative was cheaper and more manufacturable.

resultsUse of accelerated life testing helped the team quickly identify which of their design assumptions were correct and

which needed to be modified. The biggest surprise in testing results was the impact of the RoHS conversion on thermal dissipation. Being able to correct the issue at the design stage, rather than after it showed up as a root cause of field failures, saved both money and time. The product subsequently won an industry best-in-class design award. The first year reliability rate data showed significant improvement over the prior product. The first year reliability rate goal for the prior product had been 99.7%. The actual first year reliability of the new product was 99.91%, based on 73,000 assemblies in the field.

Dennis Gradler is Kimball Electronics Group Industrial Solutions’ director of business

development. Prior to joining Kimball he was (Production Manager / Technical Team Leader)

with Flextronics and has over 20 years in the electronics industry in a variety of management and technical positions. He holds a B.S. degree

from Hilbert College. He can be reached at [email protected].


NEPCON Shanghai opened its doors to a flurry of activity on Tuesday, April 22nd. Healthy domestic demand coupled with the return of overseas consumer demand made for an exciting and busy week.

Show report: NEPCON lights shine brightly

However, this year there were some notable differences. The quality of Chinese manu-factured equipment is definitely on the rise. We saw some new ovens, printers and inspection equipment that were equal to, and in some cases exceeded, their western counterparts.

The major theme this year was LEDs—almost every manufacturer had a printer or mounter specifically tailored for the LED market. The LED market is destined to become one of the biggest industries for SMT equipment and materials in the next few years. Like the PV industry, LEDs will open up a whole new seam of opportuni-ties for manufacturers of lighting, flat panel TV and signage. The big difference from PV, however, is the LED business is market-driven as opposed to PV, which is driven by government policy.

Here are some of the key developments from the show floor:

MIRTEC continued the rollout of their new 15-megapixel camera on their MV 7L AOI system, which was first de-

buted at APEX in Las Vegas. The company established their own in-house camera development team and plan to utilize the latest camera technologies across their product range. The ISIS (Infinitely Scalable Imaging Sensor) has an 18 μm lens capable of inspecting a 87 x 67 mm board in 55 seconds.

JUKI unveiled the JX100 LED pick and place machine. Particularly suited for the LED market with its 800 mm wide board size, the JX100 places 15,300 cph (IPC). It has an accuracy of ±0.05 mm at 3 sigma. The JX100 has a special library of nozzles for all types of LED components and has a feeder capacity of 30 + 30.

Another new development on the JUKI booth was a fixed feeder bank option, reducing the cost of trolleys for those com-panies doing mid- to high-volume manufac-turing. The fixed feeder bank has splicing functions built-in.

JUKI also gave us a preview of the KE-3020L, which is due to be released in July. The KE-3020L is fitted with electric feeders

that can handle IC placement and a wide range of other components from 01005. The electric feeders are faster and have a more stable ratio compared to the mechani-cal feeders. The KE-3020L is fitted with 40 + 40 feeders and has a placement speed of 18,000 cph (IPC)

SONY also debuted a range of place-ment machines, and printers for the LED market. The SI-F130AI/WK LED mounter has a maximum board width of 600mm and a placement rate of 25,000 cph. It can accommodate 40 + 40 feeders. SONY also introduced a 700 mm wide stencil printer for the large flat panel market.

Europlacer didn’t need to develop a new machine for LEDs. The inneo with its 1610 x 600mm board size is tailor made for this new market and is already finding new customers.

GKG had one of the most interesting new products at the show. Again, targeted at the LED market, the G5 Pmax is a stencil printer that can print board sizes up to 1000 x 800 mm. The manufacturers

Photos courtesy Reed Exhibitions



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claim it is the biggest stencil printer on the market. The Pmax won two EM Asia awards during the show.

WKK is no stranger to innovation. The difference this year is that the innova-tion was developed by them and not a third party equipment vendor. The iFlow 1020N is a 12 zone oven (10 heating + 2 cooling) that operates as reliably as any other oven they have sold in the past, and the price point is considerably more competitive. Complementing the iFlow 1020N is a new x-ray that has an x-y table,

a moving image intensifier that can achieve acute angles up to 60˚.

KYZEN have seen significant growth in Asia driven by an increased demand for reliability, smaller geometries and increased conformal coating. Asia manager Erik Miller noted that “quality is increas-ingly becoming more important in China. They are also becoming more environ-mentally-friendly and have a desire to use proven chemistries, rather than cheaper solvents that caused deaths recently as a result of using Hexane.” All KYZEN prod-

ucts are hexane-free.MICROSCAN

is another company on an aggressive growth path. Since acquiring the Siemens vision divi-sion two years ago, the company has expanded rapidly in the areas of electron-ics, life sciences and automotive. In the past 12 months they have registered over 60 patents and have a further 30 in the works. MICROSCAN

provides a range of vision systems for fac-tory automation and inspection. Their key products employ track, trace and control and can perform anything from simple bar code scanning to full AOI inspection.

Acculogic unveiled the Scorpion 980 DXI flying prober, which is 40% faster than its predecessor. The Scorpion is a double-sided board tester and also performs ICT and functional test. The maximum board size is 26” x 41” making it the largest flying probe machine on the market.

Cyberoptics demonstrated the new QX500 AOI system—using SIM modules and strobe lighting, it seamlessly performs inline inspection at 100 cm per second. The QX500 uses a 5-megapixel camera and has a resolution of ±17 μm.

VI Technology demonstrated their new 2K HS (high speed) AOI system. With a maximum board size of 350mm², the 2K HS is aimed at the Asian cell phone market.

—Trevor Galbraith


Title

SMT/HYBRID PACKAGING stand 7-531B


When we solder FR1 board, we are facing problems with bubbles. What will be the possible reasons and how do we eliminate this issue?

A: Most likley humidity. Check your screen printers humidity and temprature controls and make sure they are functioning properly. This has been the problem when we had bubbles or blow holes. This may require a solder paste brand change. —jk

A: The laminate might have absorbed moisture. You could try baking it before use.

Removing the stencil is making peaks in paste—We are getting small peaks of solder paste at the ends of the deposits when we separate the stencil from the board on 0.020” pitch print. What’s the best way to solve this?

A: Try reducing your separation speed.

A: You’ve got “dog ears.” I expect you have rectangular apertures and the paste is adhering to the stencil in the corners. Try oblong apertures which typically give you better paste release.

A: What thickness of stencil are you using? If it’s 6 thou (0.15 mm) then try a 5 thou (0.127 mm) stencil.

A: Try and determine if the PCB is held stationary during stencil release. If there is lateral movement you will experience deformation of the solder deposits with the slightest movement. What tooling support are you currently using?

A: To insure repeatble prints, vacuum supports of the PCB will eliminate movement of the PCB upon stencil separation.

A: If you are printing on contact, try printing off contact, with a snap off that is equal to three times the stencil thickness. Rather than having a shift

during separation, the stencil will release under its own tension behind the squeegee.—Stephanie Henninger, Director of Technical Services, IIT, Inc.

Solder not flowing w/ENIG board. When we are wave soldering a double sided multilayer ENIG finished pcb, we are having a problem where the solder won’t flow from the bottom to the top side of the through hole. Advice?

A: Have had you problem with other surface finishing too? Penetration of the flux in the hole OK? Preheat of the board OK? Dipping of the board in the solderbath OK? (2/3)

Pls. check this: http://www.globalsmt.net/troubleshooter/wave_soldering.htm

A: I presume its because youre using lead-free solder, the surface tension properties of which mean it won’t flow up a through hole to give you maximum reliability.

Use proper tin-lead solder which wets the surface and wicks up the hole, and does it at a lower temperature.

Banning lead from paint and petrol—fine.

Banning lead from solder was one of the stupidest EU decisions.

The decision was made because lead can be made to leach out of CRT glass with acetic acid, but it turns out that in practice lead in landfill does not leach out.

We refuse to jeopardise the reliability of our products and insist on using tin-lead solder. Making unreliable products does not help our customers or the planet. Replacing the lead with tin, which costs 10 times as much because it takes 10 times the resources to extract, does not help the planet.

So long as you drive down the street and see two square meters of lead flashing on 90% of the roofs and so long as the Houses of Parliament have two acres of lead on them, all out in the rain, that remains our decision.—Paul Mardon MA (Eng Cambridge), Managing/Technical Director, Pulsar Light of Cambridge Ltd.

A: There is issue of hole diameter. It is equal to lead size. It should be greater then lead. Please check hole diameter. Thanks. —Narendra

Losing Test points fast? We are having more trouble keeping test points on our PCBs as high-speed SerDes buses move to 6gig and PCIe Gen 3 is 8 Gig. Anybody have ways to keep test points at 6, 8 or soon 10 Gig on SerDes so I can keep using my ICT?

A: Do you have back drilled vias?

A: It seems your ICT has reached its limitations. My suggestion: purchase a Boundary Scan system, either stand-alone or integrated in your ICT. That’ll be the solution....

A: You can use flying prober, which can access small component pads (3 mil only) and remove test points.

SMT AnswersSMT Answers, found online at answers.globalsmt.net, offers a place for members of the electronics manufacturing community to ask and answer questions—it’s a community-based ‘help board.’ Registration is not required for participation. Here are some recent questions and answers. Jump online any time to ask your own questions or help others out.

These questions and answers are the opinion of the author(s). The Publisher does not accept responsibility for the accuracy or veracity of the information contained on this page.

SMT Answers


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Case Study: High quality manufacturing need not mean high production costs

If you make products for the automotive market, quality and reliability are not negotiable. The costs of field returns are out of all proportion to component costs, so for automotive customers Right First Time manufacturing is an absolute requirement. Because of this, Alps Electric Co. has created a reputation for quality in its subassemblies and other automotive products that it protects jealously. And as a decidedly high-end manufacturer, it builds the same high quality into its radio frequency tuners and low-noise block converters (LNBs) for the consumer market, too (Figure 1). The company produces for many household name manufacturers, including Samsung, Sony, Sharp, Ford, Volvo, Volkswagen, Technisat and Kathrein.

Alps Electric Czech has a Sebranice-based manufacturing plant that has consistently achieved best-in-class manufacturing. The company recently needed to modernize its pick & place equipment, and the single major requirement was to retain or improve quality levels, but without increasing manufacturing costs. That of course also meant keeping uptime and production efficiency at a maximum. Alps also needed a future-proof equipment platform for placing the smallest possible components like 01005 chips that will be needed in

medium to high volumes. Alps had been using Assembléon’s

previous generation FCM equipment, along with Fuji CP3, CP4 & CP6 machines. This time, they decided on an all Assembléon line-up. They chose the AX-301 and AX-501 high volume machines, with the Topaz xi and xi2 for (amongst other things) their useful co-planarity testing for QFPs. The true parallel placement on AX-301 and AX-501 has established itself as the industry benchmark for placement quality at high output. The machines combine speed, flexibility, accuracy and low defect rates with the industry’s lowest cost per placement.

“As important, though, was

Assembléon’s 24/7 technical support,” says James Waddilove, Alps’ RF production unit manager. “We do most calibration, maintenance and repair actions in-house, so don’t often need technical support. However, when we do, we need instant answers and instant solutions to problems. We have constant Internet and phone access to Assembléon’s engineers, and they can link into our system straight through the router. This is a very useful feature and allows Assembléon to test the network remotely and even upload software revisions onto our system. Assembléon’s partner, Elso, provides valuable local support with site visits when needed, and hands-on training.”

Perfecting the art of electronicsWaddilove stresses Alps’ commitment to “perfecting the art of electronics.” That means the best balance between price, functions, quality and environmental considerations, like energy and resource conservation. The low power consumption of Assembléon’s A-Series (around half that of its nearest competitor) was therefore a bonus, but not the main reason Alps made their decision.

Assembléon’s A-Series has a fully controlled pick-to-place cycle using a parallel robot system and constant component


Figure 1. Alps Electric is organized into three business units: automotive, consumer RF and Mechatronics/materials/process.


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SMT/HYBRID PACKAGING stand 6-306



monitoring to ensure high production yield. The machines are designed for six-sigma accuracy, with automatic calibration maintaining accuracy even with changing environmental variables like temperature. There is artwork recognition, multi-level bad-mark reading and adaptive pick. High-resolution laser alignment brings placement accuracy of 40 microns, even in 01005 applications.

“The Assembléon machines have greatly helped us improve our quality levels. These were previously better than 300 ppm for the whole production line (screen printing, pick & place and reflow soldering) which at the time was very competitive,” says Waddilove. “The A-Series machines have helped us cut that by an order of magnitude to only 27 ppm by, for example, virtually eliminating missing and misplaced components. To reach that figure, we made several major improvements to our lines, including tighter control of solder paste delivery and improving the cleanliness of the production room to below ten 5-micron particles per cubic meter.”

Maximum output per hour is 165k components/hour for the AX-501 and 99k for the AX-301 (IPC 9850 output is 121k for the AX-501 and 77k for the AX-301). “In 2007, we had eight production lines making a total of 170 million placements a month. In 2008, we added another five robots to each of the AX-301 and AX-501 machines. That pushed up production levels to 240 million components from the same eight lines and even with the same machine footprints,” adds Waddilove. “This gave us the major benefit that we no longer needed to subcontract work out. It is always difficult maintaining in-house quality levels when you farm out manufacturing to subcontractors; keeping production in-house eliminates a whole lot of possible problems.”

Most of Alps’ products combine large and small components on the same

board, so it helps to control each part individually. The AX-301 and AX-501 have a placement force that is adjustable between 1.5 N and 8 N. Although Alps does not normally need to adjust the placement force, it is essential for reliably placing components like connectors on the same board as micro-miniature chip components.

instant support “We have been greatly impressed by Assembléon’s field support,” remarks Waddilove. “It doesn’t feel at all like a normal customer/supplier relationship but much more like a true partnership. Assembléon has greatly helped us with our continuous process improvement program, with the stress being on optimizing the production line as a whole. That has been essential for us, since we have an absolute need for reliability of both equipment and service.”

“We have very strict maintenance routines, regularly running the calibration software and checking equipment like index and stepper motors,” continues Waddilove. “We already had good experience of Assembléon’s ITF intelligent tape feeders from our FCM machines. We quickly calibrate and repair the feeders, with automated software messages alerting us when to change spare parts. With over 1000 feeders in the factory, we perform routine maintenance on each of them at least every two months. That guarantees that our production runs smoothly at all times.”

The AX-501 and AX-301 allow up to 260 and 156 tape feeding positions respectively. Alps has used up to 240 of these on the AX-501 and 144 for the AX-301. It has also made extensive use of Assembléon’s Tray Extension Module, which allows up to 47 tray positions. The machines can be configured and re-configured in 6k steps from 30k to 77k (AX-301) or 121k (AX-501) components/ hour to match exact capacity requirements.

Fast changeover between family products Alps tends to produce long runs of products from a single family, and so doesn’t have to change component tapes and trolleys between runs. Changeover times are only 2 to 3 minutes between products of the same family. Changeovers between product families need to be made less often. They involve additional actions like opening up and cleaning the screen printer, and changing trolleys and occasionally robot heads

“The average changeover between families only takes around 10 to 15 minutes. That includes checking the first board, along with all the actions we need to take for traceability – essential for automotive products,” says Waddilove. “We actually have total traceability, logging every change to the process including board and component suppliers, tapes, screens, solder batches, and even operators. That is something else that subcontractors find very difficult or even impossible.”

Assembléon’s Management Information System helps Alps optimize its factory processes efficiently. That helps minimize parts consumption and optimize maintenance practices and operational processes. The company’s CoOps program helps improve Costs of Operation. It also helps get the best from equipment by optimizing output and yield of the entire line to maximize Value of Operations. “With a total defect rate of 27 ppm for equipment that places an average of 1-2 billion components a year, we believe that our reliability is something special” concludes Waddilove. A belief confirmed by Assembléon: even with the single-digit ppm rates of Assembléon’s A-Series, a whole line defect rate of below 30 ppm for such high volumes is virtually unique in the industry.


Title


MyDaTa announces Job Sequence optimizerMYDATA has released MYPlan version 4.1, which includes a new Job Sequence Optimizer. The powerful optimization algorithm will calculate the best production sequence and changeover strategy, for any mix of products and batch sizes. The software eliminates unnecessary feeder movements while maintaining highest possible uptime and throughput, and in that way saves both time and resources. The new module will automatically calculate an optimized job sequence, using an advanced optimization algorithm that takes both machine speed and feeder loading effort into account. Jobs that are suitable to run together based on part commonality, will be placed in family kits. Other jobs will be run separately, with different changeover strategies depending on batch size and priority. Prototypes, large batches, variants of similar products, it doesn’t matter. MYPlan 4.1 will find the fastest way to get the job done, with a minimum of manpower! www.mydata.com

New SiPlace import function for irregular BGas

Until now the irregular ball distances have made irregular BGA devices difficult and time-consuming to describe and program. For these components, Norbert Heilmann, SIPLACE technology scout, and the SIPLACE team in close cooperation with Todd Harris and the Intel Customer Manufacturing Enabling Team have developed a new solution that enables the SIPLACE Vision Teaching Station to import the Intel design data directly. This avoids transmission errors

and significantly reduces the time required to process irregular BGAs. Importing the design data and the X/Y coordinates for each ball directly into the SIPLACE Pro programming system prevents transcription errors and significantly speeds up the time required to describe irregular BGAs. As a result, the whole line becomes a lot more productive—especially for new product introductions. www.siplace.com

customer feedback tells Manncorp to add intelligent soldering to product mix

Through a recent customer survey and other market research, Manncorp has learned that selective soldering systems rank high on equipment buyers’ wish lists. As a result, IS-450 is now part of the company’s extensive equipment line. The IS-450 automatically solders through-hole components onto mixed technology PCBs using an under-board mini-wave that precisely solders connectors, capacitors and

high-power devices onto boards at lead-free process temperatures of 250˚ to 330˚C. The IS-450 is quick to achieve payback since it solders from three to eight times faster and with higher accuracy than hand soldering. Defects common to both hand and wave-soldered boards, such as bridging, lifted pads, measling, etc., never occur with the IS-450. The system is introductory-priced at $59,995, valid until June 14, 2010. www.manncorp.com

Multitest introduces e.services to optimize spare parts processingMultitest introduces e.services, the new online tool created to significantly save costs and time in spare parts processing. The easy-to-use online service allows users to minimize efforts for spare parts in both the operation and purchasing departments. Additionally, the online tool makes all related information readily available and easy to find. e.services optimizes the spare order process, and is an excellent real-time planning basis for lead times. With e.services, all necessary information regarding configuration requirements and part updates are easily accessible. Users may create online RFQs and track their order status at any time. www.multitest.com/e.services

universal’s Dimensions linechart identifies production inefficiencesUniversal Instruments has bolstered its Dimensions line software suite with

New Products

New productsNew Products

henkel’s Multicore lF620 lead-free solder paste sets the new benchmark for the lead-free eraHenkel has developed and launched Multicore LF620: a new lead-free solder paste that effectively delivers on a broad range of demanding requirements, essentially offering a lead-free paste that has it all. This latest product from the global materials leader is a no-clean, halide-free, Pb-free solder paste that has a broad process window for printing, reflow and humidity resistance. In fact, the rigorous engineering at the foundation of Multicore LF620 ensures its consistent print performance with minimal hot slump even in regions with temperatures of 30°C (86°F) or more and relative humidity (RH) upwards of 80%. This makes Multicore LF620 well-suited for electronics firms that wish to use a single material for their worldwide operations, as its performance is unfailing regardless of extreme climate changes. www.henkel.com/electronics

www.globalsmt.net

the introduction of Linechart™, a performance-monitoring software module designed to increase utilization rates to over 90%. This new multi-vendor reporting software provides complete visibility into all production lines and quickly identifies factory inefficiencies. Linechart helps to maximize utilization by monitoring production lines and providing graphical feedback for several key performance indicators across both Universal and non-Universal pick-and-place equipment. When productivity falls below acceptable levels, the deficiency is easily identified. Linechart displays data down to the feeder and nozzle level, taking all the guesswork out of debugging issues. www.uic.com

Practical components supplies Newly updated aiM Print Test Board and Kit Following the success of their 2007 test board and kit, Practical Components and Aim Solder have updated their offering with a new AIM print test board and kit that is designed to include many printing challenges commonly found in manufacturers’ assemblies. The updated version includes new and challenging component technologies that mirror real-life production environments. Added in the updated version are 0.4 and 0.5 mm pitch FusionQuad components, DualRow MLF, 01005 and 0201 resistors as well as other new components. Additionally, the kit contains BGA and microBGA pads, both having circular and square pad designs to test paste release. www.practicalcomponents.com

Tests of multi chip modulesGOEPEL electronic introduces new features to specially support hierarchical tests of multi chip modules (MCM) as new extension of its software platform SYSTEM CASCON™. The enhanced tools provide a hitherto unrivalled automation level for the generation of module and board centric Boundary Scan tests based on hierarchical library models.

“In practice, multi chip modules play a highly important role to implement system-on-chip designs with integrated IEEE 1149.1 structures. Our new system features help to improve the efficiency of hierarchical test generation”, says Thomas Wenzel, managing director of the Boundary Scan division of the GOEPEL electronic GmbH. The MCM models’ full independence from target board design ensures a complete portability of the entire package, and releases users from handling

hierarchical CAD and Boundary Scan data. www.goepel.com

Machine Vision Products announces new software enhancements to existing aoi product portfolioMachine Vision Products (MVP) announced new features within its version 5 software suite and computer technology. As inspection technology drives the need for higher rates of processing power due to increasing performance demands MVP has now introduced 64-bit computing technology to its highest end products. The new 64-bit operating systems will now come with a standard 12 Gig of memory with expansion capabilities up to 72 Gig of memory. The new software also includes integrated Gerber translation utilities, giving users the ability to generate full, production ready, 3D inspection programs from stencil data within five minutes. www.machinevisionproducts.com

ultimus ii applies consistent amount every time, for higher output with less wasteEFD Ultimus II Workstation.jpgAccurate, consistent application of cyanoacrylate is very often a critical in production, due to low viscosity of the liquid. Nordson EFD’s Ultimus II dispensing workstation solves this problem by using a precisely timed air pulse instead of guesswork to determine how much material is dispensed. For optimal control of thin fluids the system has a 0-15 psi ( 0-1 bar) psi pressure regulator and uses a microprocessor-based digital timer with four decimal places for exceptional control of deposit size. Cyanoacrylate is dispensed from a syringe reservoir that can be held like a pen or mounted on an optional arm to leave the operator’s hands free to position or assemble parts. The Ultimus II is an efficient, cost-effective alternate to squeeze bottles, hand syringes and other manual applicators. It eliminates costly rework and cuts adhesive use an average of 50%. www.nordsonefd.com

Fiducial camera auto corrects coating pattern to accommodate board misalignmentPVA (Precision Valve & Automation, Inc.) has released an active fiducial camera option for all PVA350, PVA650, and PVA2000 selective coating platforms. The 640 x 480 CMOS camera provides an unprecedented level of control and accuracy by automatically confirming alignment against a fixed reference point on each board. Each cycle can be corrected


to adjust for any misalignment resulting in a more accurate application process that assures integrity of your keep-out areas while reducing rework, waste, and requirements for additional hard tooling. www.pva.net

introducing electrically conductive epoxy family of adhesives

Creative Materials, Inc., introduces superior two-component conductive epoxy adhesives that are easy to use and offer excellent conductivity and bond strength. The new products—118-15, 123-39, 124-08 and 125-18—are 100% solids silver-filled epoxy systems, designed for attachment of electronic components. They have an easy one-to-one mix ratio by weight, are fast-curing, have a long potlife, and are resistant to thermal shock. With excellent rheological properties, these products are dispensible via syringe or using high-speed jet dispensing systems, allowing dispensing in dots or lines as narrow as 1 to 3 mils. In addition, they have a long shelf life in the two-component system, have low cure temperatures (as low as 80°C), are RoHS compliant, and have low ionics. www.creativematerials.com

Polyonics introduces a flame retardant, halogen free polyimide label material

Polyonics introduces the XF-603, a 1 mil white polyimide, halogen free label material that has been designed and tested to meet the difficult VTM-0 level of flame retardants per the UL94 standard. This unique material uses Polyonics’ Halogen

Free, Flame Retardant Technology that provides significant “self-extinguishing” performance. This label, when used in an electronic device, will not propagate a flame in the case of a fire event. The XF-603 is coated with a high opacity, gloss white topcoat specifically designed for flexo-graphic and thermal transfer printing. When matched with the proper inks or thermal ribbon, images on the XF-603 will withstand the high temperatures, harsh chemicals, and solvents typically used in electronic manufacturing processes. www.polyonics.com

christopher associates introduces new cut sheet laminatorChristopher Assoc CSL-A25T.jpgChristopher Associates Inc. introduces the CSL-A25T cut sheet laminator from C Sun Manufacturing Company. C Sun, Asia’s largest manufacturer of imaging, curing, and photo resist lamination systems, developed the CSL-A25T for flexible and thin core substrates. With the capability to laminate substrates up to 25” wide and from 0.05mm – 3.5mm thick, the CSL-A25T offers the flexibility necessary for today’s manufacturing environment. www.christopherweb.com

New “configurable Kelvin” Pad rol™200K contactorDeveloped for power management and other precision analog applications that require very tight test guard-bands, the Pad ROL™ 200K contactor delivers superior mechanical and electronic performance along with flexibility and value. Key features of this new product include solid force contact and dual touch sense design, self-cleaning wipe action, and field-configurable ‘Kelvin Ready’ design for standard contacting, ‘Selective Kelvin,’ (mixed mode applications) and full Kelvin testing. www.johnstech.com

New Switchcraft sealed power plugs and jacks in stock at Digi-Key corporationElectronic components distributor Digi-Key Corporation is stocking Switchcraft, Inc.’s sealed power plugs and jacks. These weather resistant, waterproof power plugs and jacks are designed for use in harsh environments and have an IP68/NEMA 250 (6P) rating. These connectors are available in several pin diameters and are rated to carry 5A up to 30VDC at 65°C. The sealed power plugs and jacks are designed for outdoor, medical and lighting conditions in which a

weather resistant or waterproof connection is required. Switchcraft’s sealed power plugs and jacks include multiple pin diameters, automatic AC-to-DC switchover allowed by sleeve shunt spring, an optional IP rated cap (JCAP) that protects the jack when not in use, and available over-molded options. Applications include outdoor power supplies, medical equipment, and lighting connections. www.digikey.com, switchcraft.com

SaBic innovative Plastics’ Pc film helps e/e oeMs power up for high-end eco protectionSABIC Innovative Plastics launched a new, breakthrough Lexan polycarbonate (PC) film technology—Lexan EFR film—that delivers non-brominated, non-chlorinated flame retardance (FR) at thinner gauges than flame-retardant polypropylene (FRPP). This new industry-leading material enables electrical/electronics (E/E) OEMs to create flatter, lighter-weight notebook computers and other electronic devices while significantly reducing material costs, giving them a competitive advantage. The new Lexan EFR film is a top-choice environmental solution that increases the ability of global E/E manufacturers to go beyond current environmental directives by voluntarily eliminating halogenated additives in their products. www.sabic-ip.com

aGy introduces ultra-fine yarns for PcB substrates

AGY recently introduced ultra-fine yarns for use in printed circuit board (PCB) substrates. Designed to meet the growing needs of the electronics market where miniaturization and increased functionality are expanding exponentially, these ultra-fine yarns allow PCB suppliers to create thinner laminates for higher layer counts and greater circuit density. What makes them ultra-fine is the small number of fine diameter filaments comprising the yarn. Used as a reinforcement and dielectric, the ultra-fine yarn is woven into fabric and then laminated with epoxy resin and copper foil to produce copper clad laminate - the building block of PCBs.


Ultra-fine yarn is particularly well suited for rigid-flex PCBs. www.agy.com

eSS selective soldering machines from aPS Novastar

Converting from manual or semi-automatic to automated selective soldering has never been easier and more practical than with the new ESS selective soldering machines from APS Novastar. Specifically designed for assemblers wanting to make the transition from manual or semi-automatic to automated selective soldering, the new ESS selective soldering machines provide a new entry point in cost-effective, easy to operate options for short run, batch selective soldering applications. The ESS310 and ESS500 Selective Soldering Machines provide easy to operate, robust systems for batch processing of mixed technology boards that require selective soldering of through-hole components. Automating the soldering process with an ESS selective soldering machine increases reliability of solder joints and reduces production costs. The exceptional accuracy and repeatability, with near “zero defect” solder joint yields, and the flexibility to perform single point, drag, mini-wave or dip soldering, increases solder joint quality and board throughput. www.apsgold.com

count on Tools announces free nozzles for SMT professionalsIn a time of economic recovery, Count On Tools means business when it comes to keeping SMT production on track. That is why Count On Tools is offering every customer the opportunity to try its products before they buy them. The company will send a free sample nozzle for the customer to evaluate in their equipment. The sign-up process is simple: Fill out the request form, get qualified and receive a free trial nozzle. There is

absolutely no cost to the company, and the trial is risk-free. Count On Tools only asks that each qualified entrant provide a brief evaluation and feedback of the product compared to their current consumables after testing it in their equipment. See the website for more details. www.cotinc.com

Flexible, cost-efficient and fully automated depanelingIPTE Factory Automation has revised and expanded its range of depanelers. The FlexRouter I has been completely

engineered. The result of this re-engineering, the FlexRouter II, features a machine cell width of just 1.0 meters—reduced from 1.6 meters. Yet maximum board size has been enlarged to 450 x 500 mm. The performance of the FlexRouter II has also been remarkably improved. Four of the seven axes are

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integrated as extremely precise linear drives. The PCB can be fed, as standard, over a band-type conveyor with adjustable track width, but other configurations are also possible. The modular system kit of the FlexRouter II offers a wide variety of different PCB stacking options, such as twin-tape conveyor feeder, trays, work-piece holder, linear shuttle or rotating table. This way virtually all individual customer requirements in the production process can be fulfilled. www.ipte.com

caledon controls launches new electronic printing inksCaledon Controls Ltd. has launched several new electronic printing inks including new CCA-100A and CCA-140A low resistance silver conductives, CCD-120A20 thermally conductive dielectrics and CCD-130A, a high resolution flex photo imageable dielectric. These inks used alone or in combinations can be used to manufacture the new PEC boards (an alternative to traditional PCB’s), Thermally Conductive circuit structures

(LED applications) or combined to make multi layer Thermally Conductive circuits with specifically designed economical manufacturing processes. www.caledoncontrols.com

Pyralux® TK flexible circuit materials for high speed and high frequency printed circuit boards DuPont Circuit & Packaging Materials (CPM) introduced its newest high-performance laminate for printed circuit boards. DuPont™ Pyralux® TK flexible circuit material is a copper clad laminate and bonding film system specifically formulated with DuPont™ Teflon® fluoropolymer film and Kapton® polyimide film for high speed digital and high frequency flexible circuit applications. DuPont™ Pyralux® TK delivers the lowest dielectric constant (DK) of any thin laminate and bondply material on the market today. www.dupont.com

Microchip Technology expands uNi/o eeProM product line with wafer-level chip-scale and To-92 packagesMicrochip Technology Inc. has announced that its single-I/O bus UNI/O EEPROM devices are now available in miniature, wafer-level chip-scale and TO-92 packages, in addition to the 3-pin SOT-23 package. Measuring at 0.85 mm x 1.38 mm, the wafer-level chip-scale package (WLCSP) is approximately the size of a die, and can support a manufacturing flow using standard pick-and-place machines. The long-leaded, 3-pin TO-92 package is commonly used when the manufacturing flow is a hand-assembly process, or when it is mounted directly on cable assemblies. www.microchip.com

Wash-away™ dissolvable spacers for maintaining consistent spacing between components and PcBsMulti-Seals Inc. introduces Wash-Away™ dissolvable spacers, designed to provide consistent spacing between printed circuit boards and PCB components. Techspray Renew™ precision cleaners from Intertronics

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These organic polymer spacers locate PCB components during soldering operations. After soldering, Wash-Aways dissolve in water or alcohol solvent baths. This leaves uniform spacing between components and boards, which provides free circulation of air, mechanical protection, optimum filleting, and greater accessibility for inspection, cleaning, and conformal coating. www.multi-seals.com

intertronics unveils specialist “green” cleaners for electronics manufactureIntertronics introduces two new environmentally friendly Techspray Renew™ precision cleaners, designed specifically for electronics manufacturing applications: Eco-Stencil™ cleaner and Eco-Oven™ cleaner. Both are effective, safe and eco-friendly, with non-flammable, biodegradable, low VOC, zero GWP, non-ozone depleting characteristics. Eco-Stencil cleaner effectively removes all types of solder paste and uncured adhesive from screens, misprinted boards and equipment. Eco-Oven cleaner cleans reflow ovens, wave soldering systems, and associated heat exchanger systems by removing all types of flux residues. www.intertronics.co.uk


2010 SMT/HYBRID/PACKAGING Technology Preview

Interview—Todd Lovejoy, Victron Inc.

Interview

With its headquarters located in Fremont, California, Victron is an electronic manufacturing services provider that started as a family-owned business in 1983 and was eventually acquired by UIB in 2007. Since then, it has grown to become one of the most versatile and highly qualified EMS companies in the country. Trevor Galbraith spoke to chief operating officer Todd Lovejoy about the strengths of Victron and his ambitious plans for its future.

Victron is ITAR, FDA, ISO9001, 14001 and 13485 approved. Give us an overview of your typical customer segments and the range of job sizes you assemble?

At Victron, we focus primarily on three main market segments: medical, industrial control and monitoring, and military/aerospace. These markets best take advantage of our expertise and systems in managing high-mix and complex programs with highly varied volume requirements. Within these markets, we are able to leverage specific technologies and manufacturing expertise in areas such as high--frequency broad spectrum wireless and GPS technology, complex multi redundant systems integration and complex application specific functional testing. Our PCBA volumes can range anywhere from 25 to tens of thousands a month in Mexico and 10 to 5000 systems a month in our Fremont facility. To put some scope around this, we are successfully managing multiple programs with more than 100 complex product SKUs with a very high mix of volume across their products. Looking to our future requirements and the demands of our military and aerospace customers, we are planning to achieve AS9100 certification in Q3 of this year.

You have a strong and loyal customer base. How much has that helped to underpin your growth and strategy?

Victron has always been very focused on controlled and stable growth with our Fortune 1000 customers. This strategy has allowed us to develop several integral business disciplines in support of these market leading OEMs. One of those disciplines is our ability to flex with our customer’s growth and provide vertically integrated new product introduction services. One of the unique characteristics about Victron is our ability to quickly execute support of our customer’s highly flexible business needs. As an example, many of our customers expressed an interest in us developing additional sites within the United States as well as expanding into other regions around the world. Operational within three and a half months, our Rosarito, Mexico facility is a direct result of our commitment to support our customers’ business strategies. All of this has resulted in extremely loyal customers with an average tenure of over 10 years with Victron.

How did the global recession in 2009 affect Victron, and what steps did you

take to mitigate it?

Unlike many others in our industry, we were fortunate not to have been adversely affected by the global recession in 2009. The key to our success has been our focus on certain market segments. However, a great deal of credit belongs to our customers and their market strengths. We remained in constant communication with our customers through our dedicated Customer Focus Teams to understand and anticipate changes in demand. We implemented multiple continuous improvement programs all emphasizing lean manufacturing in such areas as 5S programs and line side stocking programs and expanded our system integration capacity in support of future growth. All this enabled us to flex with our customers’ business demands. We also maximized our Victron Managed/Vendor Owned (VMVO) supply program, which set the stage for 2010 and our customers’ post-recession growth.

You mentioned the recently opened facility in Mexico. What type of product do you assemble here and what benefits does this offer your customers?

Currently, we are manufacturing and


Interview

in-circuit testing and functional testing PCBA-level products for two of our largest customers. We have spent considerable time analyzing the fit of these products because we want to ensure the best fit of future products into this facility. Generally, our plans are twofold: Victron de Mexico will operate as a compliment to our systems integration facility located in Fremont, supplying fully tested PCBA and sub-assembly level product. In the later half of 2010 and beyond, the bulk of our PCBA and sub-assembly business will be managed through Victron de Mexico. This will allow our Fremont facility as well as future growth sites in the eastern half of the United States to concentrate on high level systems integration, product realization and logistics.

You also have a sourcing facility in Hong Kong. How important is this to your US operation and what benefits does it bring?

We view our International Procurement Office in Hong Kong as a critical part of our supply chain strategy both here and in Mexico. We currently manage multiple suppliers throughout Asia with our dedicated personnel in Hong Kong. This Hong Kong-based office allows us to more closely manage these suppliers and audit new suppliers as they come on board. Having in-country personnel differentiates us from our competitors who attempt to remotely manage their overseas suppliers. Our IPO also opens our global supply chain to more competitive component and custom part pricing from the major Asian distribution chains. Additionally, we are implementing our unique VMVO inventory program into our Mexico facility.

Most ITAR compliant components cannot be sourced offshore. How do you manage your resources with US-based component suppliers to ensure continued supply of key parts?

We are a fully registered ITAR compliant company and very experienced in the requirements for a US-based supply chain. Our ITAR program process controls, training and legal filings ensure we are fully compliant and are an integral part of our supply chain. A major key to our success is our Victron VMVO inventory program. This program ensures at least a 90 day supply of parts at our disposal at all times for our ITAR programs. The parts are located in our facilities for immediate use. Additionally, we are constantly evaluating component lifecycles for risk of availability and immediately communicating this risk to our customers.

How close are you to your design partners and do you achieve real Design for Manufacturing and Design for Test?

Over the years, we have developed very solid long-term relationships with our design partners. Our partners are well versed in our processes and manufacturing and test equipment sets for optimized manufacturability and testability. Supplementing this is the use of our Valor system for an even greater depth of analysis and recommendations to both our design partners and customers. Do we achieve results? No question about it. A great example of our DFx work is on a very complex high-frequency wireless product we manufacture for one of our Fortune 500 customers. Unfortunately, our customer’s original design was yielding just over 40 percent at first pass yield. Working closely with our design partners and our customer, we were able to drive this number to well over 90 percent in a few short weeks. This particular product was extremely challenging in that it had several extreme geometry and spurious signal shielding characteristics.

What is your first pass yield and how many process metrics do you measure and monitor?

The overriding goal at Victron is to deliver the highest quality product possible for our customers. The key to our success is a culture that embraces metrics-driven solutions throughout the organization. At my level, I review with my staff more than 30 business metrics on a monthly basis. Within their organizations, they have second tier metrics numbering in the hundreds, which they review with their respective staffs on a weekly basis. Of course, we have daily operational metrics we review at the manufacturing and test line level. This allows us to react very quickly to any potential issue, in any aspect of our business, and implement an immediate corrective action or improvement program. Examples of some of our world-class metrics include a DPMO rate of less than 100, DPMC and DPMJ rates averaging over 97 percent first pass yield. This is all within a high mix and complex product environment.

You were acquired by Unicorn Investment Bank two years ago. What opportunities have that brought to Victron?

Clearly, having the financial resources that UIB can bring to bear allows Victron to expand at a pace to meet our customers’ business needs. The opening of our Mexico manufacturing operations in

Rosarito, Mexico and our Hong Kong-based International Procurement Office are evidence of their commitment to our expansion strategy. In the future, UIB will play a pivotal role in shaping our growth strategy throughout the United States.

You are planning to make an acquisition on the East Coast. Can you give me some idea of the type of acquisition you are looking for and the key drivers that would influence your decision?

Our expansion within the United States will fulfill two objectives for Victron. First, we will add technical capabilities not currently available at our Fremont or Mexico facilities. These additional capabilities will allow us to better service our current and future military/aerospace and medical customers. The second objective is to provide a regional presence east of the Mississippi. We are in discussion with several economic development agencies and are considering proximity to our customer base, market segment opportunities and the availability of an experienced labor force.

Why do you feel it is important to have multiple sites across the country?

Today, we have customers across the United States and Europe. Many of our customers are located on the East Coast and upper Midwest. As part of our expansion strategy, we feel geographical proximity to our customers and our market segments is a priority. Our facility in the eastern half of the United States will allow us to reach customers on the East Coast, upper Midwest and the South. Rounding out our domestic presence will reduce our customers’ total cost of ownership by locating their product fulfillment centers within the same time zone and effectively reducing their logistics costs.

Every private equity company or, in this case, bank has an exit strategy. What are Victron’s long-term goals?

Currently, Victron and UIB plan to have a long-term relationship. As we build a world-class company, we believe interest from new strategic partners or investors will be a natural progression. At this point, UIB and Victron are focused on fulfilling our strategic vision. We’ve set very aggressive financial goals and are well on our way to meeting our goals.

Todd, many thanks for talking to us today.

—Trevor Galbraith.


2010 SMT/HYBRID/PACKAGING Technology Preview

Last month we covered the process of parallel gap welding, materials, specifications, the repair sequence and quality and inspection. Here we finish up with step-by-step instructions for three methods of repairing and replacing copper pads.

repair and replacement of copper pads on surface mount boards.

Method 11. To repair a damaged and lifted pad,

the pad should be completely removed from the PCB. If the pad is connected to a copper track, this should first of all be cut close to the pad with a scalpel. Be careful to only cut through the copper and not through into the laminate.

2. Clean and roughen the base laminate using a fibreglass brush. This prepares the surface for pad replacement and helps to provide better adhesion.

3. Choose the required size of pad and carefully remove the repair mount. The selection of pad size is best achieved by laying the foil sheet over the repair site to gauge the size. If the new pad is to be connected to a surface track, ensure that the new pad has enough copper track left when removing from the frame to ensure a minimum of 3mm overlap with the existing track on the base laminate. The pads on the repair mount are produced on a 0.020-0.050” pitch; therefore if two adjacent pads on an SOIC (small outline integrated circuit) or PLCC (plastic leaded chip

carrier) are damaged, it will be better to leave them connected together until they are bonded onto the laminate.

4. Using a fibreglass brush, clean one side of the replacement pad and track; this will give a good ‘key’ for the adhesive. This step may be conducted prior to removal from the repair frame. If the pad is not to be connected to a surface track, proceed to step 10(a).

5. Apply a thin film of liquid flux to the newly cleaned track and lightly tin the surface, ensuring that solder does not flow on to the pad. Tinning is best achieved with a fine-tipped soldering iron using a small gauge solder wire. The tinning operation should also be carried out to the track on the base laminate.

6. Using solvent, clean excess flux from both surfaces.

7. Apply a fresh coating of flux to the track on the laminate.

8. Using tweezers, place the replacement pads/track into position and carefully solder the two tracks together.

9. Clean to remove excess flux.10. Apply a thin film of epoxy resin to the

underside of the new pad and carefully push flat to the laminate. Apply a small piece of self adhesive polyimide tape to ensure that the pad does not lift. The pad should be ‘ironed’ flat through the tape using the burnishing tool. Proceed to step 11.a. This stage is only applicable

to isolated pads which are not connected to a surface track.

b. Take a piece of polyimide tape and

place the new pad onto the tape ensuring that the cleaned surface is facing away from the tape. Apply a thin film of adhesive to the copper pad and carefully place the tape onto the laminate ensuring that the pad is correctly aligned. The pad should be ‘ironed’ flat using the burnishing tool.

Polyimide adhesive tape is preferred because it is very thin, leaves no residue and is translucent; therefore it is easy to check the alignment of the pad through the tape. It is sometimes helpful to mask adjacent pads using the tape to ensure the minimum spread of adhesive.

10. Allow adhesive to cure, preferably at 60˚C for one hour.

11. Allow PCB to cool and carefully remove the tape.

12. Carefully clean excess adhesive from around the pad using the fibreglass brush. If any dull patches are visible on the pad after cleaning this shows a presence of adhesive remaining on the pad, therefore the pad should be re-cleaned to achieve a bright uniform finish.

13. Clean using solvent.14. Resolder component to the new pad. If

a component is not to be immediately soldered to the pad the copper should be protected from oxidising by a thin film of liquid flux.

Method 2If the damage is to a multilayer board,

Bob Willis

Basic printed board repair and rework for copper tracks and pads, part 2




PCB eyelets cannot be used to achieve a satisfactory repair—see Repair Method 4 for this type of board.

1. To repair a damaged and lifted pad, the pad should be completely removed from the PCB. If the pad is connected to a copper track this should first of all be cut close to the pad with a scalpel. Be careful to only cut through the copper and not through into the laminate.

2. Clean and roughen the base laminate using a fibreglass brush.

3. Choose the required size of pad and carefully remove from the repair mount. Note: ensure that the new pad has enough copper track left when removing from the frame to ensure a minimum of 3 mm overlap with the existing track on the base laminate.

4. Choose the required size of eyelet to suit the hole in the board, bearing in mind that the hole diameter will be reduced by the wall thickness of the eyelet, therefore it may be necessary to open out the hole to suit. It may also be necessary to open the hole out in the replacement pad. If so the pad should be placed onto a scrap piece of material and held in place with polyimide tape. The hole can then be opened out to the correct size using a high speed drill, (the tape will hold the pad in position during the drilling operation).

5. If the eyelet has the same diameter as the copper pad there is no need to reinforce the pad with adhesive; the eyelet will hold the pad in position. Proceed to Repair Method 3.

6. If the pad is larger than the eyelet, or if the customer specification requires it, a film of epoxy resin will need to be applied to the underside of the pad before placing it into position.

7. Using the fibreglass brush, clean one side of the replacement pad and track. Also clean the bare laminate; this will give a good “key” for the adhesive.

8. Apply a thin film of liquid flux to the newly cleaned track and lightly tin the surface, ensuring that solder does not flow onto the pad. The tinning operation should also be carried out to the track on the base laminate.



11. Using tweezers, the pad should be placed into position over the damaged area—the hole in the pad can be

aligned with the hole in PCB by using a pointed, non solderable probe and the track soldered into position. Note: it is important to ensure that the minimum amount of solder is used for this purpose.

12. Clean off all traces of flux and carefully apply a thin film of epoxy resin to the underside of the pad. Press the pad down onto the PCB and, ensuring that no adhesive gets into the hole, place a small piece of polyimide tape over the pad to hold it in position. The pad should be ‘ironed’ flat through the tape using the burnishing tool.

13. Allow adhesive to cure, preferably at 60˚C for one hour.

14. Allow PCB to cool and carefully remove the tape.

15. Carefully clean excess adhesive from around the pad using the fibreglass brush.

Note: if any dull patches are visible on the pad after cleaning, this shows a presence of adhesive remaining on the pad. The pad should be recleaned to achieve a bright uniform finish.

16. Choose the correct size eyelet and carefully place into the hole through the new pad. The eyelet can then be mechanically secured using the correct setting tools for the particular eyelet.

17. Finally, apply a thin film of liquid flux around the connections and carefully solder both sides of the eyelet to give a good electrical connection.

18. Clean using solvent.

Method 3Replacement of small pads without adhesive

1. Apply a thin film of liquid flux to the newly cleaned track and lightly tin the surface. The tinning operation should also be carried out to the track on the base laminate.



4. Using tweezers, place the replacement pad/track into position, choose the correct size eyelet and place it through the pad and into the hole in the PCB. ‘Tack’ solder the two pads together, ensuring that the solder does not run back around the eyelet.

5. Choose the correct size eyelet and carefully place into the hold through the new pad. The eyelet can then be mechanically secured using the correct setting tools for the particular eyelet.

6. Finally carefully solder both sides of the eyelet to give a good electrical connection. Also, if necessary, resolder the replacement track to give a good connection.

7. Clean using solvent.

repair of damaged pads on multilayer PcBsThe problem with multilayer PCBs is that if the pads are damaged it is important to achieve a satisfactory electrical connection to the plated through hole—which may have been damaged along with the copper pad.

It is not possible to use an eyelet to repair a multilayer board because of the problem of connecting to any inner layers in the inside wall of the PTH. The pad itself can be repaired as per Method 2, but the PTH must be repaired by a plating process_details of this equipment can be supplied if required.

Correct rework and repair of assembled boards will eliminate rework to the level discussed here. A number of rework video tapes and interactive CD-ROMs have been produced by the author and are available at www.bobwillis.co.uk.

Bob Willis is a process engineer providing engineering support in conventional and surface

mount assembly processes.He runs production lines for suppliers at exhibitions and also

provides seminar and workshops world wide. Bob will be presenting Master Classes at SMT

Nurenberg in Germany for those engineers visiting the show. For further information on

how Bob may be able to support your staff contact him via his web site, bobwillis.co.uk

Title


Association & institutes newsAssociation & institutes news

Association & institutes news

update of iPc J-STD-609 provides greater delineation of lead-free solders for marking and labelingIPC—Association Connecting Electronics Industries® released the A revision of IPC J-STD-609, Marking and Labeling of Components, PCBs and PCBAs to Identify Lead (Pb), Lead-Free (Pb-Free) and Other Attributes. This standard presents a marking and labeling system that aids in electronics assembly, rework, repair and recycling, and now provides additional codes for the more precise specification of certain lead-free solders.

J-STD-609A provides explicit guidance on the marking and labeling of components and printed circuit boards using the wide range of solder alloys now available in the market. Specifically, the standard enables clear identification of: assemblies with lead-containing or lead-free solder; components that have lead-containing or lead-free second level interconnect terminal finishes and materials; base materials used in PCB construction, including halogen-free resin; surface finishes; and conformal coatings. In addition, the standard prescribes the maximum component temperature that should not be exceeded during assembly or rework processing. More information: www.ipc.org/609A

updated materials declaration standard iPc-1752a addresses revolving door of environmental regulation changesIPC—Association Connecting Electronics Industries® released IPC-1752A, Materials Declaration Management. The A revision of the standard provides an updated and expanded industry-wide reporting format for material declaration data exchange between companies in the electronic interconnect supply chain.

The IPC-1752A update broadens the scope to address compliance with additional substance restrictions including the EU Registration, Evaluation, Authorisation and Restriction of Chemical Substances (REACH) Regulation and China’s RoHS-type regulation. Perhaps

more importantly, the new standard is set up to more efficiently incorporate additional substance restrictions, promulgated through either existing or new regulations. More info: www.ipc.org/175x

Jack Bramel receives iPc raymond e. Pritchard hall of Fame awardIn recognition of extraordinary contributions to IPC and the electronic interconnect industry, countless hours of volunteer service on IPC standards development committees and exceptional lifetime achievement, Jack Bramel, Jack Bramel & Associates was awarded the 2009 IPC Raymond E. Pritchard Hall of Fame Award. Presented at IPC APEX EXPO™ in Las Vegas, the Hall of Fame Award represents IPC’s highest level of member recognition. www.IPC.org

iNeMi organizes four new packaging initiativesThe International Electronics Manufacturing Initiative (iNEMI) is organizing four new initiatives to address gaps in organic substrate technologies. These initiatives will focus on warpage (understanding the causes of, and establishing methods for measuring), wiring density and holistic modeling.

The four proposed initiatives are:Primary Factors in Warpage: This

initiative will focus on gaining a greater understanding of the causes of warpage, particularly in first and second level assembly, in order to better control it. The team will identify key material properties, process parameters, reflow profiles, package pitches, environmental factors and other contributors that impact warpage.

Warpage Qualification Criteria: Current standards do not adequately predict good yield results at 1st and 2nd level assembly. This initiative proposes to define a qualification method and criteria that will more accurately predict results (e.g., sample size, precondition, variations of material and processes) and establish measurement methods (dimensional and test).

Wiring Density Program: This program plans to develop a system-optimized,

nextgeneration plus one technology that focuses on prioritized areas to achieve maximum wiring density at minimal cost (e.g., material set, low-cost lithography/laser, plating, inspection and test).

Holistic Modeling Process: The goal is to develop a multilevel design tool to optimize package designs for electrical, mechanical and thermal performance. The team proposes to identify critical materials properties and proposed specifications for a specific package type; determine data depth/accuracy in critical materials properties required for model effectiveness; and develop a holistic approach by involving data experts from materials, packaging and substrate suppliers.

These initiatives are still in the organizational stage and anyone who is interested can participate in the regular teleconferences. For details about dates, times and call-in information, contact Jim Arnold (North America) at [email protected] or Haley Fu (Asia) at [email protected].

upcoming SMT Processes certification Dates and locations• ay 18-20 - Toronto, ON - In

conjunction with the International Conference on Soldering & Reliability (ICSR)

• June 22-24 - Minneapolis, MN• July 12-14 - Cleveland, OH

SMTA Certification is intended for manufacturing and process engineers. Additionally, production, design, test and quality engineering personnel, as well as SMT assembly managers who want to confirm their current competence at a fundamental level of overall process technology should also consider participating.

For information on certification or to register, contact Melissa Serres at 952-920-7682 or [email protected] or visit smta.org/certification/certification.cfm


Association News

Over 400,000,000 hand-heldsmade with ALPHA® solder pastein 2009 would reach aroundthe world.

It’s true. If placed end to end, the over 400,000,000hand-helds made with ALPHA® solder paste in 2009would reach around the world at the equator – 24,900miles. We went the distance with hand-held assemblers tomeet their critical demands for device performance andreliability, especially drop shock resistance. They asked us for:• Pb-free with zero halogen content• High throughput with low print cycle time• High resistance to head-in-pillow defects• Maximum first pass print yield, even with fine features• Worldwide applications expertise and process support• Global product consistency and performance

ALPHA® solder paste consistently met their needs in 2009.Challenge us to meet yours in 2010.

For more information go towww.alphasolderpaste.com.

Worldwide/Americas Headquarters • 109 Corporate Boulevard • South Plainfield, NJ 07080 • USA • +1-800-367-5460 • www.alpha.cooksonelectronics.comEuropean Headquarters • Forsyth Road • Sheerwater • Woking GU215RZ • United Kingdom • +44-1483-758-400Asia-Pacific Headquarters • 1/F, Block A • 21 Tung Yuen Street • Yau Tong Bay • Kowloon, Hong Kong • +852-3190-3100© 2010 Cookson Electronics

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Visit us atSMT Nuremburg,

Hall 9 –Stand 624

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International Diary2-4 June Protec JISSO/JPCA Tokyo, Japanwww.jpcashow.com

8-10 June SMT/Hybrid/Packaging Nuremberg, Germanywww.smt-exhibition.com

13-15 July Semicon WestSan Francisco, Californiawww.semiconwest.org

7-10 September electronica India/productronica India Bangalore, Indiawww.productronica-india.com

15-17 September GlobalTRONICS Singaporewww.globaltronics.com.sg

28-20 September IPC Midwest Conference & Expo Schaumburg, Illinois, USAwww.ipcmidwestshow.com

5-7 October GEM Expo Brazil São Paulo, Brazilwww.gemexpobrazil.com24-28 October SMTA International Orlando, Florida, USAwww.smta.org/smtai

31 October-4 November IMAPS Symposium Raleigh, North Carolina, USAwww.imaps2010.org

9-12 NovemberelectronicaMunich, Germanywww.electronica.de

International Diary

Title

International DiaryJULY 13–15 Moscone Center, San Francisco, California

Get back to the business of innovation.

It’s time to get back to work on the ideas and technologies

that advance microelectronics design and manufacturing.

It’s time to discover new opportunities and markets that are

changing the future of the industry. Most of all, it’s time for

SEMICON West.

Register Now:www.semiconwest.org

It’s elemental—plan now to be part of SEMICON West 2010!

the elements of innovation

Brought to You by:

SCW10 ad-GSP-April.indd 1 4/9/2010 2:35:14 PM

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Smart companiesuse Valor.

smart manufacturing just got smarter

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Gerd Koschnick,Manager of Process Technology

Natalia Telwa, SMT Process Manager

Peiker, one of the leading suppliers of components in the sector of communication technologies in vehicles as well as for professional radio applications, recently implemented Valor’s vManage manu-facturing execution software suite in their manufacturing facility in Germany. The implementation of the software in Germany was a success, so that Peiker decided to deploy vManage in their manufac-turing facility in Juarez Mexico, as well. Gerd Koschnick, Manager of Process Technology for Peiker, said: “The traceability requirements in the automotive industry are stringent. We needed a solution which could satisfy all our traceability regulations without adding to the unit costs, and also provides instant visibility into the chain of data from component lot codes to individual PCBs to final product assembly.” Natalia Telwa, SMT Process Manager, added: “What we did not realize was the added value we would receive from Valor’s traceability solutions. Not only do we have immediately accessible and accurate component trace data, but the vManage system also delivers closed loop control of our SMT machine feeder setups, low level warnings to trigger supply of replacement reels and real-time monitoring of our SMT line performance. So we are cutting downtime and improving productivity which lowers our unit costs. Plus: we have the traceability we needed in the first place.” Mr. Koschnick summarizes: “Implementing vManage in Germany was a smart decision. Now we are going to grow the benefits by expanding the deployment to our facility in Mexico.

www.Valor.com

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Documents

Global SMT & Packaging June 2010 (#10.4) - Americas edition