Gilbert Voltagemode Currentmode

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Analog Integrated Circuits and Signal Processing, 38, 83101, 2004c 2004 Kluwer Academic Publishers. Manufactured in The Netherlands.

Current Mode, Voltage Mode, or Free Mode? A Few Sage Suggestions

BARRIE GILBERT Analog Devices Inc., 1100 NW Compton Drive, Beaverton, Oregon, USA

E-mail: [email protected]

Received June 15, 2002; Revised January 7, 2003; Accepted February 14, 2003

Abstract. Many claims have been made about the benets of a current-mode (CM) approach to IC design. Theterm is used to draw attention to some kind of special dependence on currents as signals , often without a clearorientation to the broader eld, referring instead to recent CM papers. Its use suggests a signicant and valuabledistinction over conventional solutions, perhaps in the hope that this perspective, with an element of noveltyat the cell level , will inuence circuit design in the stringent context of IC production. This paper asks: Whatfactors unambiguously dene a current-mode circuit, and formally differentiate it from standard realizations of some function? Can one point to any compelling, and in the most favorable cases unique, advantages? Are thesecells clearly of general value, capable of widespread utility? These issues are examined from the critical viewpointthat no circuits carry the entire functional burden by the exclusive use of either currents or voltages, and very fewfully exploit the specic, but narrow, benets of CM concepts. Real-world product development invariably demandsthe vigilant and full embrace of what might be called the Free Mode perspective, but merely as a mnemonic, not aclassication.

Key Words: current mode; analog design techniques

1. Introduction

This issue testies to the continued interest in currentmode circuits. The bibliography provided at its end,while far from exhaustive, shows that these conceptshave a vigorous following. Yet, to the authors knowl-edge, no rigorous denition of a current-mode circuitcan be found in the literature. Since the term has beenso widely employed, this should strike us as rather sur-prising. Its users presumably have something specicin mind, in choosing to identify their various contribu-tions by appealing to this term, which was originallyused to refer to a certain narrow class of techniques,without any attempt at a broader denition. Today, itall-too often appears to have joined the ranks of ambi-guity, and become just another good word , along withnovel , universal , low power , high speed , low cost , highaccuracy and the like. When was the last time you sawa paper using the words voltage mode in its title? Whatspecial principle would it convey to you?

This ambiguity can be attributed to a casual, and of-ten inappropriate, appeal to the term in publications,at times with insufcient regard for foundations de-

veloped decades ago, referencing instead recent andclosely similar work. Its colloquial application impliesthe use of currents as signals , invariably with a tacitclaim to a degree of novelty , announcing a different ,and in some (unstated and unclear) way, advantageousimplementation of a function formerly realized usingother techniques. It hints at an ingeneousbreak with thetraditional reliance on the use of voltages. But what is avoltage-mode circuit? Clearly, no circuit is deservingof this exclusivedesignation, since none operates in such astrictly-dened and limited manner.Some, like charge-coupled devices and switched-capacitor circuits, comeclose to operating in this pure mode, although in apractical taxonomy, it might be more appropriate to callthese charge mode circuits.

Likewise, no circuit operates entirely in the currentmode. 1 The literature shows that, in the majority of cases, the papers and letters concern the realization of some basic function at the small-cell level , the focusof the work, in which currents are reckoned to playa special role. The fact that the completed circuit (if ever considered) will, at some point in a product de-velopment, place equal reliance on signal voltages is


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conveniently set aside. Indeed, essential voltages (lateridentied as state variables) frequently arise within the

cell . This vision of current mode is far removed fromthe spirit of the rst circuits that fell naturally into thisclass, which placed an essentially exclusive relianceon currents throughout a major portion of the signalchain, or as the variables realizing some special func-tion. In such circuits, the supporting circuitry requiredto interfacewith thevoltage-mode worldwas a trivialand unremarkable part of each complete, stand-alonesolution.

1.1. The Relevance of Analog Power

Electrical theory concerns the conversion, transmis-sion, transformation, control, storage, and utilizationof energy . Electronic circuits address the origination,transmission, transformation, control, storage and uti-lization of information-bearing or control signals , in akaleidoscopic variety of forms. All require the efcientutilization of power, although it is invariably minute inelectronics; it usually plays no discernable role in cir-cuit operation. Thus, in logic design, the emphasis ison voltage mode when considering logic signals at gateinterfaces, and on current mode when considering theirdistribution. However, at the system level, a robust in-

formation mode prevails. The incidental power in thou-sands of logic gates will eventually raise challengesof thermal management, and in analog circuits self-heating can seriously threaten accuracy; but clearly, inno such cases is it a signal.

An obvious exception is transceiver design, wherethe power content of the signals is an essential as-pect of the representation. An electromagnetic (volts-and-current) radio wave induces a minute amount of power on a receiving antenna, which is also respon-sive to the fundamental noise power kT of the sur-roundings.These denethe power-signal-to-noise ratio(PSNR), whose preservation is crucial in processingthese signals, involving amplication (by xed- andvariable-gain cells), frequency translation (by mixers),and the separation of thewanted carrier from others (bylters). Eventually, when extracting the signals pay-load, power considerations become secondary, and thevoltage-mode viewpoint generally prevails during de-modulation. In modern receivers, using digital modu-lation, information-mode takes over beyond this point.

In all cases where the preservation of PSNR is theprimary consideration, the principles of impedance-

matching are identical to the load-matching rules es-sential to the efcient operation of a power-distribution

grid. In impedance-matched systems, both the voltagemagnitude and the current magnitude are of preciselyequal importance. Thus, the nations distribution net-work and your cell-phones transceiver are compellingexamples of the important power mode approach todesign.

In a broader view, analog signals are electrical rep-resentations of temporal, dimensional quantities inthe physical world. They are the continuous-time,continuous-amplitude and scaled tokens for a mea-sured value (such as temperature, pressure, position);a control or actuating variable, an accurate referencesource (voltage, frequency); a time base (in radar, TV,oscilloscopes, sonar); a stream of un-encoded audioor video; and much else. Throughout their process-ing chain, analog signals must have sufcient power tominimize errors, that is, considerably above the ther-mal noise power, kT . This evaluates to 4 1021 Wper Hertz of information bandwidth at T = 290 K,often stated as 174 dBm/Hz . Disregard for signalpower, treating the signal as a pure voltage-mode orcurrent-mode quantity, is a permissible convenienceonly when PSNR considerations can be neglected.This is less common than might be assumed, how-ever. Regrettably, papers about current-mode circuits

often omit any mention of their troublesome noisemechanisms.

1.2. The Dominance of Voltage Mode

For decades, the dominant signal representation modehas been in voltage form. This might sentimentally beidentied with the advent of the triode vacuum tube.In grounded-cathode ampliers, its grid voltage, withnear-zero grid current, modulated the anode current.This was converted back to voltage mode by the anodeload impedance for use by later stages: the tube currentwas an incidental variable . However, the persistenceof voltage mode up to the present has much strongerpractical justications, chiey in the matter of powersources. Voltages can readily be probed by instrumentsto be displayedandaccuratelymeasuredwithout break-ing circuit branches. Even when hiding behind a niteimpedance, they can drive other compatible circuitswith only a moderate effect on their magnitude; theyare of obvious importance in both analog and digitalpractice.


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Current Mode, Voltage Mode, or Free Mode? 85

Thus, for inverter-style CMOS logic in steady state,negligible current ows at its inputs or in the verti-

cal branches of the cell. At moderate frequencies, itsvoltage-modeoutput candrive many similar gateswith-out much concern about loading. While true, this viewis, of course, just a convenient simplication. Transientcurrent must ow at the input to alter the charge on thegate oxide and thus the channel current. The seriouseffects of load capacitance on the delay and transi-tion times, particularly of the interconnects betweengates, are well known. Such currents are clearly notsignals; they are just an unavoidable aspect of circuitoperation. Nevertheless, while incidental, logic designalways requires rigorous consideration of how thesecurrent mode aspects are addressed.

1.3. The Notion of State Variables

The idea of incidental variables takes us closer tothe heart of the matter. In CMOS logic, all the statevariables , those necessarily appearing in the equationswhose solution fully denesa circuit function,are volt-ages. Similarly, all state variables for a current-modecircuit must be currents; the incidental voltages causedby the presence of these currents are of minor interest.Thus: A voltage-mode (VM) circuit is onewhosesignal

states are completely and unambiguously determinedbyits nodevoltages ; a current-mode(CM) circuit is onewhose signal states are completely and unambiguouslydened by its branch currents .

Theoretically, it should make no difference whichmode is used to realize a function; one is simply thedual of the other. Far less latitude prevails in develop-ing practical products. Both circuit types are poweredby voltage sources and perimeter interfaces are obligedto speak voltage. A current-mode realization mightat rst appear to be preferable, even when requiringsignicant alteration to the structure, and the (often in-convenient) use of current-mode interfaces. 2 But whilea straightforward matter to recast signal processing op-erations in an alternate (VM/CM) style, there is no in-herent guarantee, nor should there be any expectation,that eitheroffers a clear andcompelling advantage. Thechoice of the local mode is a pragmatic one, based onissues of convenience, the availability of known andtrusted cell concepts, or the natural and comfortable tof the cell within a product framework. Beyond the cellboundary, and often within it, the representation modewill generally change uidly and frequently.

1.4. The Practical Value of Duality

The concept of duality relates to pairs of circuits havinginterchanged state- and incidental variables, while pre-serving the function. For example, in the LC tank of an RF oscillator there is a periodic exchange of en-ergy between magnetic ux (current mode) and di-electric stress (voltage mode). There is a duality be-tween a series-tuned tank, with its branch current asstate variable, where the inner node voltage is inci-dental (although, as for all such variables, cannot beoverlooked) and a parallel-tuned tank, having voltageas its state variable and incidental circulating currents.The supporting amplier can optionally, and perhapsoptimally, use a local current- or voltage-mode designviewpoint.

A primary voltage source is needed to support signalprocessing. With rare exceptions, current signals andbiases in all types of circuit begin life as a voltages.This is not simply a matter of historical momentum.There is no practical dual for powering current-modecircuits. We do not start with a primary supply of say,5 mA, and divide it up between the various parts of thecircuit, accepting as incidental whatever voltages ap-pear. Current-mode circuit schematicscommonlyshowmany ideal current sources, some of which are depen-dent variables , such as(3 x 1) I 0 , where x is a normal-ized state variable. Often, there is little explanation (ornone) as to how these are, or should be, implemented.

Such casual circuit notions cannot claim to be com-plete. Imperfections in these current sources, such astheir nite conductance and capacitance, could mar thecircuits utility. Performancedetails for any incompletecircuit should be interpreted with critical caution. Onecannd examplesin theliterature of current-modecellswhose practical accuracy , factoring in static, dynamic,matching and thermal aspects of these unspecied cur-rent sources, would probably be considerably poorerthan reported.

Novelty has no intrinsic value. There is no merit inpresenting an elegant-looking current-mode concept if thecompletedcircuit requires theuse of many auxiliaryelements to meet practically meaningful objectives.When it is known that a proposed circuit is actuallymore complex than revealed, or that it under-performswhat can be achieved by well-established means, onemust doubt the legitimacy of its inclusion in the profes-sionalliterature,except as a matterof curiosity. Circuitsarenot products;only thelatter havethe powerto enrichour lives. Cells are merely the fragmentary servants of


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a more complex set of down-to-earth practical needs,of value within the context of product design.

1.5. SourcesVoltage and Current

For decades, circuits have invariably relied on currentsources to support their operation. Thus, in ECL, everylogicgate needsa separatebias current, which is steeredbetween transistors according to the logic state. ECL isan example of current-mode logic (CML). While thismaybe a convenient term forpurposes of classication,the collector and base voltages play an indispensablerole; they are not in any sense incidental (Fig. 1).Indeed, all the state variable s in CML are voltages!

The term gm-mode logic might be used, although thegeneric current-steering logic is more illuminating andprecise.

Referencesxed voltages or currents of known,accurate and stable valueare widely used in elec-tronics. An impeccably accurate value is rarelyneeded,or provides any added value. Common exceptions are(1) in a system demanding absolute accuracy, havinga voltage input and generating a dimensionless codedrepresentation for display, storage, or use by anotherprocessor; and (2) where such a code is converted to avoltage of absolute accuracy. ADCs and DACs are fa-miliar examples. But even here, absolute calibration isunimportant in many applications. In a well-integratedsystem it is often possible to use one voltage as a com-mon reference , V R, for an ADC (into DSP, say) anda subsequent DAC. Thus, the overall scaling does notsignicantly depend on V R. Similarly, one can scale afunction, say, a receivers RSSI voltage and a subse-quent ADC from a common mediocre reference. Suchratiometric operation has many benets [1].

References are needed whenever there is a trans-lation to/from a voltage or current to an unrelated

Fig. 1 . A current-modelogic cell; allstatevariables arevoltages!

dimension. Thus, a voltage-to-frequency converter(VFC) must conform to a function of the form 3 f =(V IN / V R) f S , where f S might be dened by a CR time-constant. Here, V R will often need to be very accu-rate. In a high-frequency VCO used in a PLL, absolutescaling is not needed, and V R may be hidden in thebuilt-in junction potentialof a varactordiode. Likewise,the function of a linear current-mode multiplier/dividermust have the general form I OUT = I X I Y / I U . In thiscase, I U is required to be a reliable constant when usedas a multiplier, and either I X or I Y when used as adivider.

Voltage is fundamentally the ratio energy/charge.The band-gap reference exploits the well-dened en-ergy in a semiconductor, E G , that is required to raiseelectronsfrom thevalenceband to theconduction band,expressed as a voltage by dividing it by the electroncharge q = 1.602 1019 C. In circuit design, it isdened as E GE , its extrapolated intercept at T ABS =0.Within a given technology, this voltage has an almostinvariant value, and thus provides a reliable basis for avoltage reference. In practice, access to E GE is indirect:a band-gapreferencecircuit doesnot inherently providethis exact voltage.To provide a rst-order temperature-stable output, typically about 1.23 V (slightly morethan E GE ), the cell must be designed for a specicprocess [1].

The question arises: What equivalent fundamentalmechanism can provide an accurate current reference?Thedistinctly differentcharacterof this quantity meansthat the accuracy of on-chip currents is inherently poor.They depend on semiconductor doping or lm compo-sition, on thecross-sectionalarea andlength of devices,on temperature (ambient and that due to self-heating)and in some cases the applied voltage (resistance non-linearity) or bias on an associated junction layer (resis-tivity modulation). No physical effect allows the gen-eration of a current to high accuracy, traceable to theAmpere, within a monolithic circuit. To realize a reli-able current source, one starts with a voltage and ar-ranges for it, or some fraction, to appear across a re-sistor. Monolithic resistors do not provide an accuratevalue as fabricated (a standard deviation of 10% is typ-ical) and they have temperature coefcients that maybe as high as 0.2%/ C. Advanced analog-specic pro-cessessupport thin-lm resistors (SiCr or NiCr) of highstability ( < 10 ppm/ C) which may be laser-trimmed toexact value.

In the dual view, current replication emulates thefan-out capability of the voltage-mode reference in


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transposing currents from one part of a system to an-other. The preservation of accuracy here is not only

a matter of careful matching and attention to devicedelineation, using integer or low-fractional ratios of unit devices, common-centroid layout techniques, andthe like.Numerous mechanical and fabrication stressesmust also be anticipated and in some way nulled. A va-riety of circuit modications may be needed to raisethe output resistance of these mirrors, and to ensurethat these secondary reference currents are supply- andtemperature-stable and insensitive to manufacturingtolerances. 4

A single master current can optionally be gener-ated by a high-accuracy off-chip resistor and replicatedor changed in polarity using some type of current-mirroring system. For close matching of several cur-rents, it may be better to distribute a voltage around thedie and use emitter degenerated BJTs or large MOSdevices in each cell. A better practice is to cluster thelarge devices into one bias block in the layout, and dis-tribute their currents to the target cells, adding a smallcascode transistor at the local level to radically reducethe capacitance and raise r OUT ; a common base/gatebias line can be used for these.

While this kind of rigor is well understood by ex-perienced designers of analog monolithic circuits, thecurrent mode notions encountered in the literature

all too often reveal little concern for these practicaldetails, which are of crucial importance in nonlinearcircuits design, where the bias values can affect thescaling of the function, cause signal-path distortion, ordegrade conformance to a desired algebraic form.

1.6. Dynamic Range

The case for current-mode circuits is sometimes basedon their presumed capacity to function over a largerrange of signal values 5 than in the voltage mode.The assertion is not without merit in special circum-stances. Thus, a recent current-input logarithmic am-plier, based on the reliable translinearity of the BJT,accepts inputs from 10 pA to 10 mA, a nine-decaderange (180 dB, but conservatively specied as 160 dB)and converts them to a decibel-scaled voltage with ex-cellent absoluteaccuracy. However,a general argumentfor the preeminence of current-mode processing is notso easily made [2].

The smallest discernible signal is limited either byoffsets or by noise. In the most favorable scenarios, the

peak signal amplitude in voltage-mode circuits is lim-ited by thesupply voltage,whichmay bedictated by the

maximum permissible terminal voltages on the activeelements. As process technologies continue to empha-size packing density and speed, the analog qualities of transistors are degraded and the reduction in voltageswings is severe. It is common to use supply voltagesof 2.75.5 V, although many consumer products allowonly 1.5 V or even less for their supply. Differentialsignal representations are valuable in easing this con-straint. For the present comparative purposes, we cantake theupper endof thevoltage swing as lying roughlybetween 0.5 and 5 V pk - pk .

The lower end of the dynamic range is harder toquantify. In DC systems , offset voltages may set thelimit. Using trimming, this may be as low as a few mi-crovolts; in commodity-grade products, one may haveto settlefor worst-case values ashigh as 5 mV. Thus, thedynamic range of a DC-coupled circuit in an optimisticscenario might be, say, 5 V/5 V or 120 dB, while in apessimistic scenario it might be as low as 0.5 V/5 mVor 40 dBa 10,000:1 range of possibilities! In DC-coupled systems, wide-band noise can be removed byaggressive ltering, but 1 / f noise will often limit thisrange.

The AC dynamic range of a voltage-mode circuitis determined by its internal noise voltages, many of

which are generated by noise currents associated withthe active elements. The wide-band noise-spectral-density (NSD) depends on many biasing details anddevice parameters. The total noise depends not onlyon the information bandwidth (that is, the f ), butalso on the absolute frequency range (that is, whether

f = f 1 f 2 or f 3 f 4). It increases at low frequen-cies, as icker noise intrudes, and again at high fre-quencies, where device power gain falls and secondarysources assert an inuence.

For example, consider a BJT differential pair usedas the transconductance in the rst stage of an open-loop amplier, biased with a xed tail current 2 I T of 1 mA (Fig. 2a). Assuming a total input-referred re-sistance of 100 , the voltage-noise-spectral-density 6

at this current is

1.6 nV/ Hz. For a peak inputswing of 15 mV (10 mV RMS; higher input levelswould generate excessive distortion in this simple cell)and an information bandwidth of 1 kHz, the dynamicrange would be 20 log 10{10 mV/(1.6 nV 1000) },or 106 dB. However, when this same cell is used as thetransconductance input stage of a unity-gain closed-loop amplier, where the input/output signal swing


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Fig. 2 . Basic analog building blocks.

could be more than 4 V (2.8 V RMS)usingdual 5 Vsupplies, the dynamic range is immediately extendedby 20 log10(2.8 V/10 mV) or 49 dB, to 155 dB; andif the at-frequency open-loop gain of this amplier ishigh, the tanh-induced distortion becomes negligible.The dynamic range of voltage-mode circuits can be ex-tended even further, depending on the signal frequencyandpermissibledistortion limit,to over 180dB in manytransducer applications.

What is the equivalent dynamic range for a current-mode circuit? Such comparisons can never be deni-tive. For example, DC offsets may impose a limit onthe dynamic range of a DC-coupled amplier, whiletheir effect in a translinear multiplier or VGA cell

might be to cause even-order distortion.7

A basic BJTlimitation is that due to shot noise. For a collectorcurrent of I C this is 2qI C per Hz. The current-mode noise-limited dynamic range, assuming negligi-ble resistances, is therefore I C / 2q I C , or I C / 2q ,which evaluates to 135 dB/ Hz at I C =10 A. Forthe 1 kHz bandwidth as used in the previous example,this amounts to 105 dB.

However, few if any practically-useful current-modefunctions can be achieved with a single transistor. In allstudies of dynamic range,a quality so freelyinterpretedandoffered as evidenceof a cells value, onemust spec-ify exactly how the term is being used, the specic cir-cuit function, its detailed conguration, many of therelevant device parameters, and all operating condi-tions. In this regard, current-mode notions are oftenpresented with insufcient clarity or precision to assesstheir practical value.

Consider the noise-limited dynamic range of a ba-sic unity-gain current mirror, Fig. 2(b), comparable inutility as a current-mode building block to the differ-ential pair in voltage-mode. Using ideal BJTs, having

high beta and no junction resistances, each transistorexhibits an uncorrelated peak SNR (each bias current

divided by each noise current) of I IN / 2q . The overallSNR is thus simply I IN / q . In practice, the junctionresistances associated with the base ( r bb ) and emitter(r ee ) inuence the overall current noise. It is readilyshown that, for this mirror, the dynamic range benetsfrom emitter resistance (whether internal to the tran-sistor or added as emitter degeneration) increasing atan asymptotic rate of 10 dB/decade above the cornerr ee 2 > kT / qI IN . On the other hand, the dynamic rangedecreases at the same asymptotic rate above the cornerr bb > kT /2qI IN .

It would be easy to continue such armchair explo-rations to discovervariousoptima anddesiderata. How-ever, it is inadvisable to explore only those academicaspects of behavior that just happen to be convenientlytractable, to the neglect of the broader view, involv-ing less-readily quantied effects in the fully-modeleddevice, or demanding thesolution of frustrating nonlin-ear equations. It is likewise unproductive to dwell onlocal optimization, with insufcient concern for per-formance limitations elsewhere in the signal path.

2. Mode Transformations

All analog design has a consistent theme: the liberaluse of translations from one signal representation toanother, reecting the innate necessity of what is herecalled the free mode perspective. Signals undergo nat-ural and uid mode transformations through the por-tals of conductance and resistance, at low frequencies,or of admittance and impedance, whenever the signalfrequencies are high enough for device inertia to ex-ert a signicant effect. These bridges from one modeto another are provided by the active elements, oftensupported by passive components, for a variety of ex-cellent reasons. Wherever at least one time-constantis involved (whether deliberate or incidental) modetransformations are inevitable. On these fundamentalgrounds, we cannot speak of a current-mode lter, acurrent-mode integrator, a current-mode oscillatorand the like.

Conversion from voltage to current mode requires anadmittance or a transadmittance element (more famil-iar in the guise of transconductance, at low frequen-cies). Similarly, transformation from current to volt-age mode requires an impedance or a transimpedance


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Fig. 3 . Some voltage-mode aspects of a current mirror.

(transresistance, at low frequencies). In practice, muchof the design effort will be put into minimizing thedistortion caused by the inherent V - I nonlinearities of the active elements, and in coping with transistor mis-matches and their temperature sensitivities. Thus, bothbridges generally include resistors.

In the current mirror (Fig. 3(a)) the nonlin-ear, frequency- and temperature-dependent (NLFTD)impedance of Q1 converts the current I IN to a NLFTDvoltage, V BE ( I IN , f , T ). This is applied to like deviceQ2 which responds as a NLFTD transadmittance togenerate I OUT . Using currents at both input and out-put, this is regarded as a current-mode cell. But thevoltage at the input node may be ignored only if I IN isprovided by a perfect current. TheNLFTDof themirror

precludes this ippancy when the source of I IN has -nite admittance. Furthermore, for Q2 the precise valueof this voltage is crucial: it must be within

250 V,

a tolerance of roughly 0.03%, for a 1% error in I OUT .

Fig. 4 . The V-mirror: A BJT super-mirror reecting the free mode perspective.

In the schematic, emitters (and sources) should beshown as connected locally and grounded through a

single branch, to remind the layout designer to avoidmetal routing mistakes that could introduce spuriousvoltages (Fig. 3(b)). These can have painful conse-quences, underscoring the voltage-mode alter ego of the mirror. Non-degenerated BJT mirrors should beused sparingly, and only where low accuracy and highnoise are permissible. However, the benets of degen-eration cannot be used when I IN has a wide range of values or when theoutput must swing to almostthe sup-ply rail. Figure4(a) shows a mirror 8 that addressesbothdesiderata. It is an example of a class called Voltage-Following Current Mirrors [3, 4]. The V-mirror exem-plies the free mode aspects of practical cell design.(Notably, this term combines voltage and current inthe one expression). A low voltage gain in its rudimen-tary op amp is sufcient, since the change in V BE isalready small, being 60 mV/decade of I IN ; more im-portant is a low offset voltage. Its bias currents do notaffect I OUT , since i B2 is canceled by i B1 . By a simpledesign modication in the op amp, i B2 is arranged tobe i B1 when Q2 = Q1.The V-mirror has interesting properties. If I IN weretruly a current source, its r OUT would in be principleinnite 9 even for low Early voltages in Q1/Q2, sincetheir collectors are equally biased to V OUT . This makes

it attractive for loading a preceding cell, having a pairof output currents whose balance depends on its col-lectors being equally voltage-biased. With a load resis-tance R L added, r IN = R L; thus, an increase in I INcauses the voltage at node a to decrease . In a simple


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Fig. 5 . A CMOS version of the V-mirror.

mirror, as the V CE of Q2 drops below 150 mVits base

current rises rapidly, robbing I IN which causes I OUT tofallprecipitously. Here,with the basecurrents providedby the amplier, I OUT remains accurate down to verylow values of V OUT , even though the transistors are indeep saturation (Fig. 4(b)). Equal emitters are used inthis illustrative simulation, and the op amps voltagegain is

300. Other Q1/Q2 ratios can be used, over a

wide range, with the same cancellation of V AF errors.Most examples in this paper use BJTs, but

MOS/BiCMOS versions are usually possible with lit-tle change. Figure 5(a) shows a CMOS version of a V-mirror on a 0.35 m process, connected as adifferential-to-single-sided converter: I OUT = I 2 I 1 .The output error is 1% at V OUT 55 mV (Fig. 5(b)).The 3 dB bandwidth for I 1 =100 A, I 2 =150 A,V OUT =1 V and C C =1.5 pF is 180 MHz. In thesebaseline simulations, device matching is assumed tobe perfect. The use of large transistors and common-centroid layout practices is advised.

2.1. Mode Transformations in an Op Amp

While an op amp is correctly classied as a voltage-in, voltage-out element (formally, a voltage-controlledvoltage-source, VCVS), it should not, contrary tothe prevailing popular view, be regarded as a high-gain amplier with limited bandwidth. Rather, itsopen-loop transfer function is essentially that of anintegrator : V OUT = V IN / sT , where T is its character-

istic time constant . The open-loop gain at a signal fre-quency f is dened by T , having a magnitude of unityat f 1 =1/2 T , and f 1 / f at lower frequencies, overa range of many decades below f 1 . Thus, a loosely-named 10 MHz op amp will have a voltage gainV OUT / V IN of only 10 at 1 MHz. The asymptotic open-loop DC gain is rarely of importance, even when usedat high closed-loop gains.

Whenever we encounter a time constant in a cir-cuit function, we need to consider very carefully whatdenes it. In a typical monolithic op amp (Fig. 6)it is dened by the product of a (real) on-chip re-sistor and on-chip capacitor. The resistor is impli-cated in determining the bias current I O , and thus thetransconductance ( gm ) of its input-stage transistors;then the capacitor C C denes the unity-gain angularfrequency 1 =gm / C C . The gain-bandwidth product

Fig. 6 . Mode transformations in an op-amp.


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of practically all monolithic op amps is very poorlydened; consequently, so is the open-loop gain at fre-

quencies above a few Hertz. This key fact is curiouslyunderemphasized in treatments of op amp application.Lets follow the mode transformations for this im-

plementation. Whilerudimentary, the essentials remainthe same after elaboration. Indeed, this actual circuitis of widespread value as shown; using care in de-vice sizing and balance, the inputs may operate downto ground. The differential voltage-mode signal V IN istransformedto a pair of current-modesignals by the I O -determined transconductance, gm , of the input stage.These two currents are then weighed in the balanceof a current mirror, andremain in current mode at itster-minals (although as noted, two mode transformationsoccur internally in any mirror).

The difference I SIG is applied to the voltage-gainstage, a grounded-emitter transistor, Q5, biased at aconstant I C . The difference current I SIG from the mir-ror ows almost entirely in C C (neglecting here the C JCof Q5). At this point, an importantmode transformationoccurs. It hasthe form of current-to-voltage, but notdueto a transresistance. Rather, it is due to the frequency-dependent impedance of C C , that is, j / (2 fC C ). Thesignal, now back in voltage form, is bufferedby a unity-gain output stage, usually capable of delivering a mod-erately large load current, I L . The amplitude of this

output voltage is gm / 2 fC C larger than the input, witha constant phase lag of 90 over a wide range of fre-quencies. Thus, two major and two minor mode trans-formations of thesignal have occurred in this extremelysimple signal path,having the free-modestatevariablesV IN , I SIG and V OUT .

2.2. Denitions and Criteria

A Working Denition is as follows: A current-modecircuit is one in which thestatevariables are exclusivelyin the form of currents . This allows for the fact that, inall real examples, there will, and must be, incidentalvoltages in the circuit. However, these do not appear inthe describing equations of the top-level function; theyare invariably scaled arbitrarily, and often exhibit hightemperature sensitivities. The V BE in the current mirroris such an incidental variable. While a mirror may beconveniently regarded as a current- mode cell, it will beclear that from the circuits viewpoint, this particularvoltage is crucially signicant , being the precursor of the current-mode state variable to follow.

An abbreviated dual of these statements would be: In a voltage-mode circuit the state variables are ex-

clusively in voltage form . In every practical case, therewill be incidental currents. These are invariably scaledarbitrarily while not affecting the overall scaling of thefunction. The load current, I L , in a practical realizationof the output buffer of Fig. 6 can be regarded as an in-cidental variable from a cursory perspective. However,like the V BE of the mirror example, this current couldbe very signicant, in determining the buffers voltagegain, consequently the magnitude of the voltage-modestate variable which is the output, and the ampliersopen-loop gain at all frequencies down to zero.

2.3. Key Criteria

Legitimate examples of current-mode circuits can beidentied by asking these questions:

(1) Does the Working Denition apply? that is, areall of the state variables in current form? or moregenerously, the majority of them?

(2) Is the essential function independent of anydeliberately-introduced time constants?

It is reasonable and informative, though not necessary,

to add these auxiliary questions:

(3) Is the circuit, and its presentation, complete in suf-cientdetail, that is,notdependenton any unspeci-edsupporting agents, such as theparticular valuesof bias currents, or special functional derivatives of the state variables, such as (3 x 1)I O ?(4) If the circuit is addressing some function formerlyimplemented using voltage mode practice, does itoffer any compelling and defensible advantagesover the prior art, or does it merely replicate sucha function in a different, and perhaps interesting,way?

(5) Have the circuits special merits been recognizedand realized by other designers ? Has it becomewidely adopted in actual products , on the basis of these unique merits? If of a totally new form, issuch an outcome likely, with the fourth criterion inmind?

These criteria may appear to be overly strict. Certainly,much that has appeared in the literature as currentmode would not qualify. The rst to be challenged


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92 Gilbert

would probably be the last one, testing the practicalutility of a novel approach. But for the designer

of productswhich must be complete, robust, high-yielding in mass production, inexpensive, benign, freeof artifacts, insensitive to supplies and temperaturethis is the only important criterion . A current-modecir-cuit, just like anyother, must earn its reputationthroughwidespread use, or risk beingsoon forgotten, alongwithhundreds of other curiosities that ll the pages of ourproceedings, transactions, letters, and journals.

3. Examples of Current-Mode Circuits

In the mid-1960s, the author discovered a class of circuits, retrospectively satisfying the rst four of theabove criteria, and for which he coined the term Cur-rent Mode. Within a decade, the last criterion was metin full. 10 The rst of this new family of cells arrived inthe following way. BJT current mirrors and differen-tial pairs were in wide use in 1965. As a linear-circuitelement, the mirror was a truly new form. Its topologywas not found in vacuum-tube design. Tubes require anegative grid bias to reduce the anode current to near-zero, which would not naturally arise if they were usedin place of BJTs. 11

By contrast, the differential pair is a mode-

transforming element . An input voltage , V IN , appliedbetween the bases unbalances the collector currents ,making an output I OUT . Unlike the mirror, this could be realized in vacuum-tube form, and was, in op ampswidely used in control systems and analog comput-ers. It was called a long-tailed pair (LTP) becausethe bias current for the cathodes was provided by ahigh-value resistor (the tail) taken to a large nega-tive voltage. The BJT-LTP had a serious aw: its I OUTvs. V IN relationship is very nonlinear, having the formtanh( qV IN /2kT ), with a quasi-linear region of a few mil-livolts. But its trans conductance is an almost exactlylinear function of the tail current, a property later iden-tied by the name translinear . Thiswasusefulat a timewhen analog multiplication was still of broad generalvalue. Its potential was of specic interest to the authorin 1966, for use as the core of a 500 MHz variable-gain amplier [5]. BJT-LTP cells remain at the heart of many contemporary VGAs, sometimes using anothercirca-mid-1960s linear transconductance concept, themulti-tanh principle [6].

The question arose: Was there some way of merg-ing these two basic cells to realize a super-cell, having

Fig. 7 . From current mirrors to current-mode multiplier.

the linearity of the xed-gain current mirror but thevariable-gain properties of the differential pair, ex-ploiting the excellent linearity of its transconductancevalue with respect to the gain-controlling (tail) cur-rent? It became apparent that this was not only pos-sible, but effortless and natural, leading immediatelyto a current-mode analog multiplication element that was linear with respect to both of its inputs [7]. Thisone-step metamorphosis is shown in Fig. 7. In (a) wehave two independent mirrors, side-by-side; the choiceof complementary input currents will later become ap-parent. The outputs aresimply linear replicationsof theinputs, with or without a current-mode gain/loss factor,depending on the ratio M of the emitter areas 12 Q2/Q1

and Q3/Q4.Now cut the path from the inner emitters to the

ground node, join them, and provide them with a biascurrent 2 I Y , as in Fig. 7(b). With this one, tiny changein topology, we have transformed the inner transistorsfrombeing the hind legsof two separate mirrors, intoa differential pair, resulting in a genuinely new current-mode element with surprisingly broad and valuableproperties. Both of the cells signal inputsthe statevariables 2 I Y and the dimensionless modulation factor x and its signal outputs yI Y are in current mode.The voltage, V BE , generated between the innerbases is incidental . If the world were kind enough tosupply all signals in current form, the variation of thisvoltage with signal currents and temperature wouldhave essentially no bearing on the operation and uti-lization of this cell. In practice, as when the currents I 1and I 2 aregenerated directly by voltage inputsvia resis-tors, the V BE will frequently intrude into the overallcircuit behavior. It is of enough importance to give ita special name: the characteristic voltage . This termwas coined to refer to any situation in which two tran-sistors have a common emitter (source) connection


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and operate at unequal collector (channel) current-densities. For the BJT, it is:

V BE =kT q

log I 1 I 4 =

kT q

log I 2 / M I 3 / M

(1)

The mirror ratio M cancels out, and no longer deter-mines the gain. In practice, it would be made closelyequal to I Y / I X , using a mean value of I Y when thisis a variable. The key property of this cell is that theratio of the currents in Q2/Q3 replicates that in Q1/Q4.This follows directly from Eq. (1), assuming all tran-sistors are operating at a common temperature. 13 Thisrelationship may be stated in quotient or product form:

I 1 / I 4 = I 2 / I 3 or I 1 I 3 = I 2 I 4 (2)Using the complementary currents shown,

(1 + x ) I X (1 y) I Y = (1 + y) I Y (1 x ) I X (3a)which collapses to

y = x (3b)The differential input current is I IN = (2 x 1) I X andthe output is I OUT

=(2 x

1) I Y . Thus, we can state the

function in product form

I OUT = ( I IN I Y )/ I X (4a)or in variable gain form

I OUT = G CM I IN where G CM = I Y / I X (4b)

3.1. The Evolution of Translinear Cells

This was the rst example of a large class of nonlin-ear current-mode circuits. The extension of this ba-sic topology to four-quadrant multiplier operation wasstraightforward [5] and has been widely used. Scoresof other such cells quickly followed [57], numerouspatents, and doctoral theses, notably that of Seevinck [8], which cataloged all the then-known cells as wellas examples of formal synthesis methods. In 1975, theauthor proposed a formal denition of this class of cir-cuits, based on the strict translinear (STL) principle[9], in which all state variables are currents, and allvoltages are incidental.

In recent years, many papers [1012] have exploitedsimilar principles using MOS in weak inversion, where

I DS (V GS ) takes on an essentially exponential form. Insub-micron CMOS this regime extends to useful cur-rent levels (microamps). The large V GS offsets in smalldevices limit theaccuracy of such cells;the useof muchlarger transistors to avoid this problem penalizescircuitspeed. In the main, these papers report on the perfor-mance of MOS in previously-known BJT topologies.Further branches of the evolutionary tree include theidea of dynamic translinear cells [13] and log-domainlters [14, 15], although here the inclusion of time-constants precludes classication as current mode.However, these extensions do not use STL, but exploitthe concept of general translinearity [16].

In another evolutionary direction, MOS transistorsareused in strong inversion [17]. Thecommon assump-tion of quadratic behavior in this regime is incorrect,casting serious doubt on any analysis based on thisapproximation. A further concern seen in analyses of CMOS current-mode circuits is the simplifying as-sumption of the I DS (V GS ) behaviour fora constant drainvoltage, whereas the device behavior is often signi-cantlyaltered by thevoltageswings at this terminal,dueto thevarying V GS of subsequent(driven)cells. Moderndevices exhibit a strongly varying functional form of I DS (V GS ) over a range of I DS , even when V DS V GS .

Thus, in an analysis of sufcient rigor for practicalpurposes, many device parameters persist in the equa-tions dening thecircuit function,that is,thesevoltagesbecome relevant state variables, strongly coloring thefunction of the cell.

The most stunning aspect of Eq. (2) is the number of BJT and circuit parameters that instantly disappeared,being independent of bias levels, temperature andemit-terarea. 14 Eventhe semiconductor material is unimpor-tant: the equations are equally valid for pure Ge or Si,and for SiGe, GaAs or other HBTs. The ascent of BiC-MOS as the process of choice for future mixed-signalICs will preserve these benets of BJT current-modecells.

3.2. The Importance of Interfaces

The valuable properties of basic CM cells have beenwidely exploited in products during the past threedecades. However, this broad appeal should not beattributed to the fact that they locally operate in thecurrent mode. While interesting, this is but another


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94 Gilbert

incidental factor; isolated cells serve no-ones practicalneeds. They are only a starting point, the rudimentary

cores of complete, application-ready products.Further-more, even within translinear CM cores, their intrinsicvoltage-mode aspects require close attention to achievehigh accuracy and low noise. In many contemporarycases where these cells are used, still in their originalforms, it is apparent that this rigor is not always ob-served.

The diversity of these products arises in the wayin which the near-universal requirement for them toslip effortlessly into a voltage-mode world have beenaddressed. This is the function of the supporting cir-cuitry , where the greatest novelty is required, and inwhich individual solutions branch most widely. And,with few exceptions, it is where all the genuine perfor-mances advances are to be found, as demonstrated inSection 3.6. In some cases, such as high-speed/high-frequency/low-noise products, designers are obligedto also pay attention to power-mode and impedance-mode aspects. But in every case, they are pursuing thepractical and unavoidable necessity of the free-modeperspective.

3.3. Two Seminal Cells

The fundamental relationship stated in Eq. (2) can alsobe obtained from a secondfour-transistor core. Figure8shows the xed, essential connections that dene thesetwo seminal forms. It is only changes in the supportingcircuitry that determine the functional variety of allsuch elaborations. These include themethods by whichtheinput currents areaccurately forcedin the collectorsof Q1 and Q2 (using other than the customary diodeconnections); the way the outputs I 1 and I 2 are utilized;the development of the V BE in (a), and the generationof bias currents to provide an accurate CM gain, having

Fig. 8 . The primitives of two general-purpose current-mode cores.

either a linear or a linear-in-dB (exponential or reverseexponential) relationship to a control voltage; and so

on. Note that I 1 and I 2 can also be outputs, in eitherform. The inclusion of the transistor alpha in the lowercurrents in these gures is only a reminder that they arenot precisely equal to the sum of the upper currents.

It cannot too strongly be emphasized that, in com-petitive product design, it is this mode-transformingsupporting circuitry that calls for the greatest inge-nuity. This includes the choice (often, invention) of compact and efcient topologies, where the functionof every element can be fully justied; optimal devicescaling and biasing; the weighing of trade offs; atten-tion to numerous issues of robustness, manufacturing,testability, packaging; and so on. Depending on suchparticulars, the Fig. 8 cores might be expanded intoxed-gain current-mode ampliers; xed-gain, active-feedback voltage-mode ampliers; many varieties of variable-gainamplier;multipliers anddividers; squar-ing and square-rooting circuits; RMS-DC converters;and much else. 15 We can classify these as developed current-mode cells . When this work is completed, andall the perimeter connections to a current-mode cellhave been nally tied to their proper places, the work-ing schematic will put even the most sophisticated of current-mode cores into proper perspective.

3.4. An Illustrative Current-Mode Amplier

Figure 9 shows an essentially complete CM amplier.Only the biasing cells, providing two voltage rails forthe degenerated PTAT and ZTAT current sources, areomitted forclarity. Thethin-lmresistors of the25 GHzCB-SOI process ensure high temperature stability of performance parameters. All internal state variables arein current form. Thesimple interfaces provide directin-terfacing with voltage signals; the rst stage behavesas a linear transconductance for V IN while the outputcurrents are converted to V OUT by the 25 load resis-tors R L1 and R L2 (so the differential output resistanceis a fairly pure 50 ). The peak (clipping-level) outputis 3.2 V pk-pk, using a single 2.7 V supply. Option-ally, with R L1 = R L2 = 50 and R L = 100 theavailable linear power is > 10 mW.

The core is little more than three NPN current mir-rors, having current gains of 6, 34/6, and 190/35, atotal CM gain of 185, supported by PNP sourceswhose degeneration minimizes noise and offsets inthe signal-path. While the actual current values do not


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Fig. 9 . A fully-designed current-mode amplier.

signicantly affect the CM gain, the use of both PTATand ZTAT (zero-TC) currents ensure a temperature-stable overall voltage-mode gain of 48 dB (that is,

251, increasing by only 0.18 dB over a supply rangeof 2.73.3 V), and a constant peak output capacity.With reduced emitter degeneration, operation down to1.2 V is readily achieved.

Thesimulation results of Fig. 10 show theDC outputand incremental gain at 10 MHz, vs. V IN over 6 mV.The deviation from an end-point t (static nonlinear-

Fig. 10 . DC output and AC linearity of current-mode amplier.

ity) is 0.025%, essentially independent of temperature.The AC gain at 40 and 90 C increases by +0.01 dBfrom its 25 C value; the small change ( +0.075 dB) atthe extremities of the V IN range demonstrates good AClinearity. 16 Figure 11 shows the AC response and theinput-referred voltage noise spectral density (VNSD).The 3 dBbandwidth isconstant at255 MHz; the gain-bandwidth product is thus 64 GHz. The phase responseis essentially linear up to 200 MHz. The unloaded out-put noise at 25 C for an information bandwidth of


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96 Gilbert

Fig. 11 . Gain magnitude and input-referred VNSD for current-mode amplier.

1 MHz is

200 V rms; for a signal output of 1 Vrms, the dynamic range is

74 dB.

3.5. Recent Extensions of CM Cells

In a urry of excitement during the late 60s, numer-ous BJT-CM cells were developed. Since then, veryfew distinctly novel strict-translinear cells have ap-peared. The advent of well-balanced complementary

bipolar (CB) processes has added some variety to CMcell topologies, for example [18, 19, 21], but the advan-tageous adoption of these core cells into commercialproducts, as reported in the public domain, appears tobe minimal. Taking full advantageof CB on silicon-on-insulator (SOI) technologies, which provide true three-terminal transistors, the sophistication of the support-ing circuitry that can clothe simple cores with standardvoltage-mode interfaces has continued to show inge-nuity, again underscoring the observation that circuits(cells) are not products.

The progress in log-domain (translinear) lters hasalso been aided by the advent of CB. In one realiza-tion of the form [20], the key cell shown Fig. 12(a),a voltage-controlled current-mirror, is used for tuningthe lter at each basic integrator stage. This cell is of pre-CB vintage [2], using substrate PNPs. But in fail-ing to meet the rst two criteria, log-domain lters areclearly not examples of CM design. In fact, all ltersmust necessarily operate in a free mode fashion, sincethere is an essential interplay between voltage-modeand current-mode state variables. Figure 12(b) showsanother useful mirror [6]. As in the last example, it pro-

Fig. 12 . Voltage- and current-controlled current-mirrors.

vides an independent port for a linear-in-dB variationof the mirror gain ( V M is scaled3 mV/dB at300 K), but

this time using a current as the control variable. Whilethese two mirrors are based on the same principles, theuse of currents at all of the boundary terminals in thesecond example clearly puts this particular realizationinto the class of current-mode circuits, meeting all veof the proposed criteria.

3.6. A Highly-Developed Translinear VGA

To further demonstrate that performance advancesand circuit novelty in products using a current-modecore are invariably found in the supporting free-mode

circuitry , Fig. 13 outlines the structure of a voltage-in/voltage-out variable-gain amplier. Its core is es-sentially the familiar cell of Fig. 8(a), but with someimportantmodications, not shown here. Its CM signalgain is simply I N / I D , and is closely specied over arange of > 100 dB. The denominator current, I D , andthe numerator current, I N , are independentlycontrolledby voltages V G and V M , respectively, applied to high-impedance interfaces.

This VGA is designed to manage a wide range of in-putvoltages(from thenoiseoor to 4V).A linear-in-dB gain law is desirable, and is essential as a practicalmatter with a large gain span. I D has an accurately-scaled exponential response to V G , the primary gain-control voltage of 0 to 1.5 V, scaled 30 mV/dB. A logicinput allows the gain to either increase (050 dB) ordecrease (500 dB) with V G ; both modes are neededin contemporary applications. On the other hand, I N ,thus the overall gain, increases linearly with respectto V M . This also allows the peak output voltage tobe accurately set, useful in driving an ADC. V M de-faults to 0.5 V, for a peak output of 2 V; at its max-imum value of 5 V, the gain is 20 dB higher and the


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Fig. 13 . Basic structure of a high-performance variable-gain amplier.

differential output is then limited by the supply, V S ,(2.76 V) and the rail-to-rail drivers, to (V S 0.5 V).The input-voltage capacity, output amplitude, overallgain, AC response, and scaling of all control interfacesare temperature-stable.

Based on the diverse performance objectives forthis product, the 25 GHz CB-SOI process was used.The internal structure of this enhanced core and its

voltage-mode aspects were key to addressing these is-sues. Transistor geometries were chosen to maintainthe lowest possible junction resistances, which is cru-cial in applying this type of cell to any situation wherecurrent densities varies widely; even minute amountsof ohmic enhancement to the characteristic voltage,

V BE , can impair gain accuracy, gain law confor-mance, and signal-path linearity at a stroke. Perfor-manceerosion due to secondary-tier transistor issuesincluding less-commonly considered basic parame-ters, weak avalanche, self-heating, and otherswasexplored during the design, using a specially-preparedCAD library that allows individual parameters to beselectively included or omitted. This valuable insight-generating hypothesis/test approach to simulation iscalled Foundation Design.

The input voltage, V IN , is immediately converted tocurrent form, V IN / R I , by the two resistors R I / 2. Forthis mode transformation to be accurately scaled andhighlylinear,the magnitudeof theerrorvoltage V E inboth its linear and nonlinear component partsshouldbemuch less than V IN . This requires that theloopampli-er A(s) has high voltage-gain and current-gain, under

all operating conditions. The high voltage gain ensuresthat the V BE is attenuated to insignicance; high cur-rent gain preventsdiversion of signalcurrent away fromthe collectors of Q1 and Q2. This is a very challengingobjective at maximum gain, when V IN / R I and I D aresmallest, and at high signal frequencies.

For example, with a typical full-scale V BE of 50 mV, and a minimum V IN of 5 mV, then, in order

to reduce V E to 5 V (that is, 0.1% of V IN ) the voltagegain A(s) must be 10,000. This may sound like a rea-sonable value for the open-loop gain of a generic opamp. However, for a 100 MHz signal it demands a gain-bandwidth product A(s) of 1000 GHz. 17 A primary objective was to maintain a perfectly constant magnitudeand phase response in the signal path, whether alteredby V G or V M , for a specied total gain span of 100 dB.Figure 14 shows the actual gain and the remarkablystable AC response over a 105-dB gain span, achievedby varying V G and V M in combination so as to pro-vide 22 demanded gain values at 5 dB intervals. In thisstudy, the HF compensation networks were set for ahigher bandwidth (230 MHz) than the more conserva-tive center value (150 MHz) used for the productionpart. The package impedances were also omitted here,since the primary objective was to conrm the theory(see below), free of secondary confusing effects.

This extreme constancy in the AC response of aVGA is unprecedented. It is not unusual in extantproducts to see a focal zone at some high fre-quency in which the actual gain magnitude is almostcompletely independent of the demanded gain. This


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98 Gilbert

Fig. 14 . AC gain and phase response of high-performance translinear VGA.

shortcoming is due to a variety of HF feed-forwardsneak paths, that generate a larger output magnitudethan the primary path; such effects also badly damagea linear phase response. During this design, all AC re-sponses were routinely normalized to the 1 MHz valueto examine the relative deviation at each gain setting(see lower panel of Fig. 14). An arbitrary design objective of 0.05 dB at 100 MHz was posed, and met,during the development. This insight-rich rigor is rec-ommended in every VGA development, as a tool toexplore ne-scale response anomalies.

This solution stems from rst recognizing that thetransconductance of the Q1/Q2 pair, gmD , propor-tional to I D , varies by 1000:1 over a 60-dB gain span.The input stage of the loop amplier is a differen-tial pair with a transconductance gm A, proportionalto I A; an on-chip capacitor C F sets its local unitygain frequency to gm A/ C F . But the feedback factorfrom its output back to its input is gm D R I , which like-wise varies by 1000:1. To achieve a constant overallbandwidth, the product gmD gm A is stabilized by ar-ranging the tail current I A to vary inversely as I D .This is easily accomplished, since I D is of the form I O exp( V G / V T ), in theincreasing-gain mode.Bypro-viding an accurately tracking inverse exponential cur-rent I A = I O exp( V G / V T ), the overall unity-gain fre-quency is gm D gm A R I / C F , and since exp( V G / V T ) exp( V G / V T ) = 1, it is constant. In the gain downmode, the exponentials are reversed. Incidentally, theform of I D and I A provide another example of freemode principles, where I O and V G play an equallyvital role.

Thus, the overall 3 dB frequency is controlled di-rectly by the accurate temperature stable (thin-lm) re-sistors forming R I and the half-sections of C F (MOMcapacitors) multiplied by the gain-independent ratio I D I A/ I 2O . These tail currents vary from about 4 Ato 4 mA, providing 5 dB overlap at each end of the gain range. The RTI voltage noise at full gain is

5 nV/ Hz, which is little more than the noise of

R I alone (4.02 nV/ Hz, using R I = 1 k ). Thecurrent-mode outputs, whose magnitude can be var-ied linearly by I N over a further > 40-dB range, areapplied to a pair of TZAs (wide-band transimpedanceampliers), each with Z T = RO / 2, and converted tobalanced voltage-mode form, behind a well-controlledoutput impedance of 75 per side. Their common-mode voltage level defaults to V S / 2, but can option-ally be set by the user using an unity-scaled override.Figure15 shows themeasuredRTI noise,with theinputterminals ( V IN ) short-circuited, at three temperatures.Figure 16 shows the main gain versus V G in both theGain Up and Gain Down modes, and the measureddeviation (gain linearity), at three temperatures.

This forum does not allow a full discussion of manydetails and trade-offs in the design of this advancedVGAstructure.Nevertheless, it serves to illustratehow,starting once again with the same 40-year-old current-mode core, the elaboration provided by a mixed bagof free mode principles transforms it from just aninteresting cell idea to a powerfulandversatile product ,now in full production. Numerous such elaborations of rudimentarycoreshave generatedan extendedandstill-growing family of such products.However,it wouldnot


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Fig. 15 . Measured RTI noise spectral density vs. V G at threetemperatures.

Fig. 16 . Measuredgain-up and -downand gainerror vs. V G at threetemperatures.

be helpful to present these as current-mode circuits;indeed, the papers that described some of these devel-opments never used that term in their titles.

4. Concluding Reections

Science and engineering are deservedly well-regardedfor their precisionof expression. Rapid reference to nu-merous topics in our communication of ideas requiresthe ongoing development of a taxonomy, an agreedsystem of classication. This process is fueled by thewidespread observance of its specialist terms over asubstantial period of time, and eventually formalizedby an institution such as the IEEE. The boundariesbuilt into our pre-ratied taxonomy of integrated cir-cuit design must be denitive, and its terms should be

both appropriate (as mind-joggers) and unambiguous ,if they are to be of value as a tool of communication.

But however carefully selected,coined and partitioned,the names we give to our topologies, techniques andtricks retain their importance as the vectors of essentialideas only if applied carefully and frugally , with fullrespect for the benets of consensus. Such rigor is notroutinely evident in the broad eld of circuit design,and many cases of the misuse of inadequately-denedterms could be cited.

This paper offers an overdue clarication of themeaning of the term current mode , and proposes aWorking Denition and Five Criteria that a circuitshouldexemplify in order to qualify. It is recommendedthat this useful, but narrow andspecializedterm,shouldbe applied in an appropriately exacting manner. TheCriteria should be used to test concepts that might, onrst impulse, be referred to as current mode in na-ture. In view of the fact that their state variables are aneven mix of currents and voltages, many of the circuitspublished in recent years cannot properly employ thisterm. It is surely in the interest of authors, and the com-munity at large, that paper titles and key words capturethe essential and specic top-level features of each ad-vance in circuit design. This rigor will set the stage forthe subject, and provide the busy reader (all of us) witha clearer pre-viewof both thecontext and thecontent. It

will also facilitate searches, and reduce the number of false positives, the bane of ltering the ever-expandingwarehouse of technical literature.

It was noted that the fastidious management of thevoltage-current product the signal power is oftena designers primary concern. The term impedance-mode might be used in this domain, since the circuittechniques are dominated by considerations of source-load matching and the maximization of power transfer.However,the valueof introducing yetanother class intoan already-bulging taxonomy is debatable. Similarly,little would be gained by referring to charge-coupleddevicesor switched-capacitor circuits by usingthe termcharge mode to draw attention to their exploitation of this particular state variable. For so-called current-mode logic (CML), the term gm mode might be moreappropriate in the quest for precision, since its statevariables are in fact entirely in voltage mode . Buthere, the preferred and well-established term current-steering clearly denes this logic family; and unlikeemitter-coupled logic , it is technology-blind.

Signals in analog circuits are universally charac-terized by frequent mode transformations . Product


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100 Gilbert

designers are obliged to adopt a uid viewpoint, aseach sub-region is developed. Since the term mixed

mode is widely understood to refer to integrated sys-tems in which analog and digital signals co-exist, theterm free mode is proposed. It is emphasized that thisterm is not intended to be used to dene, distinguish orname a class.It simplyrefers to an appropriate perspec-tive on design, useful as a mnemonic . Thus, since alloscillators, lters, pulse-shaping, delaying, timing andrate functions (integration and differentiation) are nec-essarily free mode in form, there would be no point orpurpose in titling a paper, for example, A Free-ModeVoltage-to-Frequency Converter ; they all are!

This papers frequent emphasis on practical valueshould not imply a lack of respect for formal theories,or the pursuit of insight-generating algebraic analyses(even though these often require falling back on ap-proximations). Rather, it stems from the concerned ob-servation that many papers and letters published abouta variety of small-cell notions suggest a very limitedview of the broader sweep and practical needs of to-days IC industry. The merits of another incrementalreconguration of familiar cell topology are often hardto identify. In practicing design with the purpose of solving pressing contemporary problems, and satisfy-ing specic and difcult real-world needs, we mustkeep in mind that the generic circuit fragments and

tricks, that we designers amass in our portfolios overtime, are for the most part servants-in-waiting, for fu-ture and adaptation and deployment in meeting a va-riety of practical objectives. Unless and until they aredeveloped into complete, robust products that are ableto address increasingly-stringent real-world demands,cells remain of little value, except as mental stimulantsand didactic tools.

Our technologies have always had their greatest sig-nicance and inuence when applied within the con-text of everyday life. Very often, their latent valueslie in reserve for years, waiting to be understood andappreciated, and then imaginatively exploited throughthe inventive efforts of the community of pragmaticand resourceful product designers. We must each beself-challenged to pursue genuine novelty, and seek to transform our personal bag of tricks, assorted andmany-modal, into the affordable and reliable productsthat will rapidly leave our realm of the intriguing andarcane, to take their place with all the other modern in-dispensable commodities, and become unremarkablycommonplace.

Notes

1. A super-conducting ring might be classied as a pure current-

mode device, since current is sustained without an associatedvoltage drop. Such a totally-closed loop cannot meaningfully becalled a circuit.

2. Current-mode input or output interfaces aresometimes requiredby the application. Thus, a logarithmic amplier in ber-opticpower-measurement systems must accept its input as a currentfrom a photodiode.

3. More generally, a polynomialof theform f = f O +{(V IN / V R)b(V IN / V R)2 c(V IN / V R)3 . . . } f S .

4. The development of analog cells is 70% bias design and30% signal-path design. This lecture-room maxim is obvi-ously a generalization. Nevertheless, the design of the corefunction of an analog circuit is usually straightforward, whilethe provision of robust and artifact-free biasing requires carefulthought.

5. Theratio of the largest permissible signalto thenoise oor,bothdened as RMS quantities for a stated bandwidth, is commonlyreferred to as dynamic range and specied in decibels. How-ever, this term needs to be carefully dened within a particularcontext, since many interpretations can apply.

6. In theexamples in this paper, theassumedoperatingtemperatureis 300 K, unless otherwise stated.

7. While V BE offset voltages are PTAT, they are partly a manifes-tation of xed, non-unity emitter-area ratios. Such mismatchescause a variety of temperature-invariant errors in current-modecells.

8. When rst used, colleagues called this general form a GCM(Gilbert Current Mirror). The author prefers cell names thatdene structure. Note that, simply as a useful mnemonic, thegure superimposes a V.

9. A nitesource resistance r SRC transformsto r SRC atthe output.However, when used as a differential current balance the r SRCdue to the V AF of the two sources cancel at I 1 = I 2 when thesecurrents are balanced by an outer feedback loop. Thus, as acontrol-loop integrator, the nal error is very small.

10. Exemplifying this criterion, the rst paper on current-mode am-pliers and multipliers in the Journal of Solid State Circuits wasalso the rst to be cited 100 times in later papers. While thecurrent mirror was the rst current-mode cell of notable andenduring value, this term was not in general use at that time.

11. CMOS transistors for use in inverter-style logic requiredthem to be enhancement-mode types, giving the current mir-ror a new lease of life when CMOS was turned to analogapplications.

12. In cases where this gain or loss factor must be robust in produc-tion, integer emitter units would be used. The ratio M could, of course, differ for the two mirrors.

13. But this is not always the case, as discussed in the paper Dis-tortion Due To Self-Heating In Translinear Multipliers UsingThermally-Isolated Bipolar Transistors , to be published at alater date.

14. While this is essentially correct, slight increases in the char-acteristic voltage caused by the devices contacting resistancescorrupt the purity of Eq. (2) even in this basic current-modecell. These voltage-mode aspects of the cells internal behaviordemand careful consideration in many practical applications,


19/19


particularly when the current densities must be high in order tominimize the effective inertia of the cell.

15. For an interesting elaboration of the Fig. 8(b) form, see the DataSheet for the Analog Devices AD538.

16. This form differs from that of an ideal differential pair, whichwould show a reduction of gain of 0.117 dB at 6 mV ( T =25C). The actual form is modied by the choice of biasing anddevice scaling.

17. GBW products much higher than this ( > 50,000 GHz) are rou-tinely achieved in RF logarithmic ampliers; but these usemany cascaded stages without feedback. Here, we have a feed-back system containing two gm stages. The detailed design of the voltage-mode amplier A(s) is the key to this successfulimplementation.

References

1. J. Huijsing, R. van de Plassche, W. Sansen (Eds.), Analog cir-cuit design: Low-noise, low-power, low-voltage; Mixed-Mode Design wit Cad Tools; Voltage, Current and Time References .Kluwer, 1996, pp. 269352.

2. A.F. Arbel, Comparison between the noise performance of current-mode and voltage-mode ampliers. Analog Integrated Circuits and Signal Processing Journal , vol. 7, no. 3, pp. 221242, 1995.

3. GCM in Electronics Letters.4. C. Toumazou, F.J. Lidgey, D.G. Haigh (Eds.), Analogue IC

design: The current-mode approach. IEE Circuits and SystemsSeries 2 , Perigrinus Press, 1990; Chapter 6, B. Gilbert, CurrentMirrors, Sec. 6.5.5.

5. B.Gilbert,A newwideband amplier technique. IEEE Journalof Solid State Circuits , vol. SC-3, no. 4, pp. 353365, 1968.

6. B. Gilbert, The multi-tanh principle: A tutorial overview. IEEE Journal of Solid State Circuits , vol. 33, no. 1, pp. 217,1998.

7. B. Gilbert, A precise four-quadrant multiplier with subnanosec-ond response. IEEE Journal of Solid State Circuits , vol. SC-3,no. 4, pp. 365373, 1968.

8. Later TL cell.9. Unavailable at time of publication.

10. Seevinck thesis.11. B. Gilbert, Translinear circuits: A proposed classication. IEE

Electronics Letters , vol. 11, no. 1, pp. 1416, 1975.12. Many papers using MOS in weak inversion.13. A.G. Andreou and K.A. Boahen, Translinear cicruits in sub-

threshold MOS. Analog Integrated Circuits and Signal Pro-cessing Journal , vol. 9, no. 2, pp. 141166, 1996.

14. B.A. Minch, C. Dioro, P. Hasler, and C.A. Mead, Translinearcircuits using subthresholdoating-gate MOS transistors. Ana-log Integrated Circuits and Signal Processing Journal , vol. 9,no. 2, pp. 167180, 1996.

15. J. Mulder, Dynamic translinear circuits: An overview. Analog Integrated Circuitsand SignalProcessing Journal ,vol.22,no.2,pp. 111126, 2000.

16. D.R. Frey, Log-domain ltering: An approach to current-modeltering. IEE Proceedings , vol. 140, no. 6, pp. 406415, 1993.

17. M. Punzenberg and C. Enz, A compact low-power BiCMOSlog-domain lter. IEEE Journal of Solid State Circuits , vol. 33,no. 7, pp. 11231128, 1998.

18. B. Gilbert, Translinear circuits: An historical review. Analog Integrated Circuits and Signal Processing Journal , vol. 9, no. 2,pp. 95118, 1996.

19. R.J. Weigerink, Computer-aided analysis and design of MOStranslinear circuits operating in strong inversion. Analog Inte-grated Circuits and Signal Processing Journal , vol. 9, no. 2,pp. 181188, 1996.

20. L. Magram and A.F Arbel, Application of complementarytechniques to a bipolar translinear gain cell and a translin-ear CCII +. Analog Integrated Circuits and Signal Processing Journal , vol. 9, no. 2, p. 119, 1996.

21. J. Ahnand N. Fujii,Current-mode continuous-time ltersusingcomplementary current-mirror pairs. Analog Integrated Cir-cuitsand Signal ProcessingJournal , vol.11, no. 2, pp. 109118,1996.

Barrie Gilbert (Life Fellow, IEEE) pursued an earlyinterest in semiconductors and alloy junction transis-tors at Mullard Ltd (UK). In 1964, at Tektronix, he

developed advances in oscilloscopes and their rst in-tegrated circuits. In 197072 he was Group Leader atPlessey Research Labs (UK), working on holographicmemories.He consultedto AnalogDevices Inc. (197277) and later joined that company as their rst ADI Fel-low in 1979. He manages the Northwest Labs, ADIsrst remote design center, in Beaverton, developing avariety of IC products for the communications industry,and holds 65 patents. He has authored papers in JSSCand other journals, is a contributor to several texts,and a co-editor of a recent book. For work on mergedlogic he received the IEEE Outstanding AchievementAward (1970) and for contributions to nonlinear signalprocessing the IEEE Solid-State Circuits Council Out-standing Development Award (1986). He was OregonResearcher of the Year in 1990, and received the Solid-State Circuits Award in 1992, the ISSCC OutstandingPaper Award on ve occasions, the Best Paper Awardat ESSCIRC twice, and several awards for Best Prod-uct of the Year. He received an Honorary Doctoratefrom Oregon State University in 1997. For recreationhe composes music for virtual orchestra, writes poetryand communes with his feline companions.

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Gilbert Voltagemode Currentmode