Upload
dung
View
86
Download
1
Tags:
Embed Size (px)
DESCRIPTION
GFX-One Guitar Processor. Team Carpal Tunnel October 6 th 2005. Team Members. Mason Stone Henock Negassa Tony Sawyer Nael Cassier. Refresher: What is GFX-One?. GFX-One is a digital audio effects processor. - PowerPoint PPT Presentation
Citation preview
Capstone Fall 2005Capstone Fall 2005
GFX-One Guitar GFX-One Guitar ProcessorProcessor
Team Carpal TunnelTeam Carpal TunnelOctober 6October 6thth 2005 2005
Capstone Fall 2005Capstone Fall 2005
Team MembersTeam Members
Mason StoneMason Stone Henock NegassaHenock Negassa Tony SawyerTony Sawyer Nael CassierNael Cassier
Capstone Fall 2005Capstone Fall 2005
Refresher: What is GFX-Refresher: What is GFX-One?One?
GFX-One is a digital audio effects GFX-One is a digital audio effects processor.processor.
It is designed specifically for use with It is designed specifically for use with guitar, but can process any monaural guitar, but can process any monaural analog audio input.analog audio input.
Capstone Fall 2005Capstone Fall 2005
Functional Block DiagramFunctional Block Diagram
MP3 player
Guitar or any other
analog input
Input
A/D16-bit,
44.1KHz
FPGASpartan 3
Push Buttons
CLOCK20MHz
EPROM
DSPStarter Kit
Audio Amplifier
Box/User Interface Output
Mono SpeakerMixer
Stereo D/A16-bit,
44.1KHz
EMIF
McBSP0
McBSP1
Stereo Headphone
Mono to Amp.
2 analog
CI 2
CI 2
Stereo
LCD
GFX-One
Capstone Fall 2005Capstone Fall 2005
DSP ImplementationDSP Implementation Will implement DSP using a Texas Will implement DSP using a Texas
Instruments TMS3206713 Instruments TMS3206713 Development BoardDevelopment Board
The board allows for easy The board allows for easy configuration and testing of the configuration and testing of the processor functionality and effects processor functionality and effects routinesroutines
Capstone Fall 2005Capstone Fall 2005
Development Board Development Board InterfaceInterface
The development board will be accessible The development board will be accessible to the rest of the system through an 80 pin to the rest of the system through an 80 pin memory expansion portmemory expansion port
The processor will be accessible to the The processor will be accessible to the programmer through a JTAG USB portprogrammer through a JTAG USB port
The on-board codec (ADCs, DACs, mixer) The on-board codec (ADCs, DACs, mixer) will be bypassed in favor of components will be bypassed in favor of components that we will lay out and implementthat we will lay out and implement
Capstone Fall 2005Capstone Fall 2005
DSP Core SoftwareDSP Core Software Code Composer Studio Code Composer Studio
will be the software will be the software package used to package used to program the processorprogram the processor
The effects algorithms The effects algorithms as well as all other code as well as all other code will be written in C++will be written in C++
Using the development Using the development board will allow for board will allow for more effective more effective debugging of our design debugging of our design codecode
Capstone Fall 2005Capstone Fall 2005
DSP Development DSP Development BoardBoard
Capstone Fall 2005Capstone Fall 2005
DSP Development DSP Development BoardBoard
Capstone Fall 2005Capstone Fall 2005
Communication with FPGACommunication with FPGA Memory Expansion ConnectorMemory Expansion Connector
– External Memory Interface (EMIF)External Memory Interface (EMIF) 16 bits data16 bits data 6 bits address6 bits address Chip enableChip enable
Peripheral Expansion ConnectorPeripheral Expansion Connector– 2 Multi-channel Binary Ports (McBSP)2 Multi-channel Binary Ports (McBSP)
Accessed by reassigning multiplexer on-Accessed by reassigning multiplexer on-boardboard
7 pins per port—don’t need all of them7 pins per port—don’t need all of them 3.3V Input/Output buffers3.3V Input/Output buffers
Capstone Fall 2005Capstone Fall 2005
FPGA: Xilinx XC3S400FPGA: Xilinx XC3S400 20 MHz oscillator input20 MHz oscillator input
– Digital Clock Manager (DCM) provides phase-Digital Clock Manager (DCM) provides phase-locked clock inputs to A/D and D/Alocked clock inputs to A/D and D/A
Communication with DSP boardCommunication with DSP board– EMIFEMIF– McBSPMcBSP
Data converters (A/D, D/A)Data converters (A/D, D/A)– Data format can be converted from I2C to Data format can be converted from I2C to
McBSPMcBSP User interface to LCD and ButtonsUser interface to LCD and Buttons JTAG InterfaceJTAG Interface
Capstone Fall 2005Capstone Fall 2005
FPGA: Xilinx XC3S400FPGA: Xilinx XC3S400
Capstone Fall 2005Capstone Fall 2005
Schematic version of our FPGA
Capstone Fall 2005Capstone Fall 2005
Serial InterfaceSerial Interface
Capstone Fall 2005Capstone Fall 2005
Mixed Signal InterfaceMixed Signal Interface Signal from Analog Signal from Analog
amplifier is fed to amplifier is fed to A/D Converter.A/D Converter.
Converts input Converts input voltage from voltage from analog signal in to analog signal in to Digital bitDigital bit
Synchronized with Synchronized with 44.1KHz Clock 44.1KHz Clock
16 Bit digital signal16 Bit digital signalMAX 195
Capstone Fall 2005Capstone Fall 2005
A/D schematic A/D schematic
Capstone Fall 2005Capstone Fall 2005
Mixed Signal InterfaceMixed Signal Interface Digital to Analog (D/A) Digital to Analog (D/A)
conversion methodsconversion methods– Data is fed from DSP to Data is fed from DSP to
D/A Converter.D/A Converter.– Standard D/A Standard D/A
converters translate an converters translate an array of digital bits into array of digital bits into a bias voltagea bias voltage
– Synchronized with Synchronized with 44.1KHz Clock44.1KHz Clock
– 16 Bit digital signal16 Bit digital signal– I2c interfaceI2c interface
AD 1866
Capstone Fall 2005Capstone Fall 2005
D/A Schematic D/A Schematic
Capstone Fall 2005Capstone Fall 2005
Analog Signal MixerAnalog Signal Mixer We are going to use We are going to use
voltage adder voltage adder (summer) Op Amp (summer) Op Amp circuit as analog circuit as analog signal mixersignal mixer
A good recording A good recording mixer lets you route a mixer lets you route a variety of input signals variety of input signals and combine them and combine them into one signal.into one signal.
For a potential Add-on For a potential Add-on output signal from output signal from MP3 player will mix MP3 player will mix with signal from D/A with signal from D/A converter converter
Capstone Fall 2005Capstone Fall 2005
Audio AmplifierAudio Amplifier Analog signal from Mixer Analog signal from Mixer
is going to be amplified is going to be amplified and routed to speaker and routed to speaker
Amplifier is transistor Amplifier is transistor based based
stereo audio power stereo audio power amplifieramplifier
––0.3 V to 6 V supply0.3 V to 6 V supply
Capstone Fall 2005Capstone Fall 2005
PowerPower Regulated 3.3 and 2.5 V power buses from 9V DC Regulated 3.3 and 2.5 V power buses from 9V DC
adapter.adapter. 5V5V
– LCDLCD– D/A converterD/A converter– A/D converter +5 & -5 A/D converter +5 & -5
3.3 V3.3 V– Compact FlashCompact Flash– Audio AmplifierAudio Amplifier– Data lines to and from FPGAData lines to and from FPGA– FPGA VCCFPGA VCC
2.5 V2.5 V– FPGA JTAGFPGA JTAG
Capstone Fall 2005Capstone Fall 2005
User InterfaceUser Interface
4
6
1 2
3
5
Bypass
Power In Out Mix
EQ
I/O
Capstone Fall 2005Capstone Fall 2005
LCD CodeLCD Code
Capstone Fall 2005Capstone Fall 2005
LCD CodeLCD Code
Capstone Fall 2005Capstone Fall 2005
User Interface SchematicUser Interface Schematic
Capstone Fall 2005Capstone Fall 2005
Project ScheduleProject Schedule
Capstone Fall 2005Capstone Fall 2005
Division of LaborDivision of LaborNameName TaskTask
Nael CassierNael Cassier User Interface/FPGA User Interface/FPGA ConfigurationConfiguration
Mason StoneMason Stone DSP IntegrationDSP Integration
Tony SawyerTony Sawyer DSP Core ImplementationDSP Core Implementation
Henock Henock NegassaNegassa
A/D Component IntegrationA/D Component Integration
Capstone Fall 2005Capstone Fall 2005
Hardware ListHardware ListComponent Part Number Manufacturer Quantity Ordered?
FPGA XC3S400-TQ144 Xilinx 2 Yes
DSP Starter Kit TMS320C6713DSK T.I. 1 Yes
EPROM XCF02V020C Xilinx 2 Yes
CLOCK EC1100HSTS-20.000M ECLIPTEK 2 Yes
A/D MAX195BEPE MAXIM 2 Yes
D/A AD1866N Analog Devices 2 Yes
Audio Amplifier TPA6021A4 T.I. 2 Yes
3.3V Regulator LT1764AET-3.3 Linear Technologies 2 Yes
-5.0V Regulator Radio Shack Radio Shack 2 Yes
2.5V Regulator Radio Shack Radio Shack 2 Yes
5.0V Regulator LM7805 FairChild 2 Yes
Level Shifter SN74LVC4245ADWRE4 T.I. 8 Yes
LCD CFAH1602A CrystalFontz 2 Yes
Push Buttons ZF-2U-OA-C ITT 16 Yes
On/Off Button ZF-2U-EE-C ITT 3 Yes
Audio Jacks JB Saunders JB Saunders 6 Yes
Power Supply Adapter JB Saunders JB Saunders 1 Yes
Passive Components JB Saunders JB Saunders N/A No
Capstone Fall 2005Capstone Fall 2005
Milestone Deliverables Milestone Deliverables Milestone 1Milestone 1 Milestone 2 Milestone 2
Design Schematics Design Schematics CompletedCompleted
Solder PCBSolder PCB
Board Layout Board Layout CompletedCompleted
PCB Debug PCB Debug Completed Completed
PCB Ordered and PCB Ordered and Delivered Delivered
DSP Code Completed DSP Code Completed (Alpha)(Alpha)
LCD Code CompletedLCD Code Completed FPGA Code FPGA Code Completed (Alpha)Completed (Alpha)
Capstone Fall 2005Capstone Fall 2005
Questions?Questions?