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Generating Supply Voltage Islands In Core-based System-on-Chip Designs Final Presentation Steven Beigelmacher Gall Gotfried www.ece.cmu.edu/~ggall 04/26/2005

Generating Supply Voltage Islands In Core-based System-on-Chip Designs

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Generating Supply Voltage Islands In Core-based System-on-Chip Designs. Final Presentation Steven Beigelmacher Gall Gotfried www.ece.cmu.edu/~ggall 04/26/2005. Overview. Review What are we doing? How are we doing it? How We Did It Methodology Experimental setup Results - PowerPoint PPT Presentation

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Page 1: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Generating Supply Voltage Islands In Core-based System-on-Chip Designs

Final PresentationSteven Beigelmacher

Gall Gotfriedwww.ece.cmu.edu/~ggall

04/26/2005

Page 2: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Overview Review

What are we doing? How are we doing it?

How We Did It Methodology Experimental setup Results Future directions

Page 3: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Review

Voltage islands are regions where nearby IP blocks use a supply voltage different from the full-chip supply

We propose reducing energy consumed in a core-based SoC design by generating these voltage islands

A coarse-grained placement problem

Page 4: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Review Different classes of placement algorithms exist

Integer Linear Programming, Recursive, Iterative We went with an iterative solver

Want to avoid greedy algorithms Simulated annealing – locally bad choices can be

globally good Parquet – S. Adya, H. Chan, I. Markov

Pronunciation: pär-'kA to make of parquetry Parquetry -- work in the form of usually geometrically

patterned wood laid or inlaid especially for floors http://vlsicad.eecs.umich.edu/BK/parquet

Page 5: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Review Simulated annealing loops are

made up of two phases What are the set of perturbations I

can make to the current solution? (move function)

What is the relative “goodness” of that change? (cost function)

Move Function Move block to spot (x,y), swap two

blocks, block rotation, block scaling, etc

Page 6: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Review Cost Function

Calculate a number quantifying the “goodness” of the solution

How good a solution is will depend on the area, aspect ration, wire length, etc

What are we doing? Analyzing the most effective way of

detecting possible voltage islands Modifying the cost function to take into

account these voltage islands Quantifying energy savings

Page 7: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Sequence Pairs Used to speed up and simplify

move functions Simple graphical approximation

Rectangular coordinate system Approximates relative location of

blocks in graph Blocks represented by sequential

numbering in X and Y directions

Page 8: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Simulated Annealing (Parquet)

The initial locations of blocks in S.P. Arbitrary Only used to simplify the simulated

annealing move function Upon completion of a random move

Sequence pairs Get matched up with (x,y) coordinates Checked and adjusted to not overlap and

meet aspect ratio requirements

Page 9: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

X Y

Sequence Pair Example

X < 3 2 5 4 1 >

Y < 1 2 3 4 5 >

Page 10: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Selecting a Move

Randomly picking which move to make

Making the move

Page 11: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Checking the Cost Parquet uses different linear cost

functions depending on emphasis of aspect ratio, wire length, or area AR and minWL

AR

minWL

None

Calculation of these delta components changes as t 0

Page 12: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Cost Function Measures How do we assess the “goodness” of

current solution with respect voltage islands? Number of islands Number of nodes in islands Size of the largest island Reduction in power

The above are all important to our modified cost function

Page 13: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Tread Lightly

Need solutions that increase the quantity of any of the previous parameters to have reduced cost …but without breaking up the entire

placer Voltage islands with blocks laid on top of

each other don’t do us much good Make voltage island friendly solutions

good, without making them too good

Page 14: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Calculating the Modified Cost Calculate the cost (delta) as before If a perturbation improves one of the

voltage island parameters, scale delta

Scaling is cumulative Scaling is weighted towards certain

measures Stop doing this as t0 Why do we do this?

Page 15: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Accepting a Move

Accept good moves

Else, accept bad moves with some probability that decreases as t 0

Once t equals 0, run a few more greedy iterations

Page 16: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

What Did Our Changes Do? A delta < 0 is always accepted

A voltage island friendly solution that was already good will still be accepted

A delta > 0 is accepted with some probability (declines over time) Scaling increases the probability of

being accepted, without forcing it Only effective on solutions that

weren’t that bad to begin with

Page 17: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Methodology Benchmarks are tested with set vdd’s

and checked for “power” saved after placement

We define “power saved” as (Num-nodes in an island)*(voltage of the

island) Quantified by the amount of power saved by

reduction in voltage converting FIFO’s Less islands means more voltage conversion

hence more power consumed

Page 18: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Methodology Purpose

Our experiments were designed to show Function of 4 cost functions

Voltage islands Nodes in islands Power saved!!! (emphasis here)

Page 19: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Experimental Setup Before applying any cost functions we

calculate the total initial “power saved” by the pre-placed islands These are islands created by luck in the

initialization phase The total initial “power saved” is used

Compare and determine worth of solution Initial power saved – Current power saved ->

more negative numbers mean better solution Determine the percent saved in final

solution

Page 20: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Benchmarks usedami33 ami49

Blocks Vdd assigned Blocks Vdd assigned4 2 6 26 3 7 39 4 12 43 5 16 55 6 3 66 7 5 7

15 52 66 7

Total Blocks 33 Total Blocks 49hp6 hp11

Blocks Vdd assigned Blocks Vdd assigned2 2 4 54 6 3 3

2 42 6

Total Blocks 6 Total Blocks 11

Page 21: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Results AMIami33 Island Stats

05

10

1520

20% 30% 50% 60% 70%

Target Power Savings

Number DistinctVoltage Islands

Number Nodes inIslands

Maximum Nodesin Islands

ami49 Island Stats

0

10

20

30

20% 30% 50% 60% 70%

Target Power Savings

Number DistinctVoltage Islands

Number Nodes inIslands

Maximum Nodesin Islands

AMI33 has room to increase nodes in islands to save power

AMI49 has even vdd node distribution

Cost function becomes more sensitive

increasing distinct voltage islands to save power

Page 22: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Results HPhp6 Island Stats

0

24

6

8

20% 30% 50% 60% 70%

Target Power Savings

Number DistinctVoltage Islands

Number Nodes inIslands

Maximum Nodesin Islands

hp11 Island Stats

0

5

10

15

20% 30% 50% 60% 70%

Target Power Savings

Number DistinctVoltage Islands

Number Nodes inIslands

Maximum Nodesin Islands

HP6 has majority of blocks with high vdd Less room for

optimization

HP11 shows an increase in nodes in islands used to save power

Attributed to the fact more nodes have higher vdd

Page 23: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

Future Work We have created an open source vdd/vt

island creation tool Move function must be modified to

account for multiple voltages in selecting moves

Cost functions can be easily extended To create various placements based on

multiple VDD islands To create placements based on multiple Vt

islands

Page 24: Generating Supply Voltage Islands  In Core-based System-on-Chip Designs

You Got Questions

We Got Answers

Thank You