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Abstracts 32-Bit Synchronous Latency Insensitive Processor The constantly shrinking feature size of nano-scale technology leads to several challenges that the synchronous design paradigm struggles to cope with. Latency insensitive design is proposed as a solution for the wire-delay challenge, where buffers can be arbitrarily inserted in channels to alter the latency of channels without modifying the behavior of the design. In this project, we have designed and implemented in VHDL, a 32-Bit processor that is latency-insensitive. The processor implements a turing complete subset of the MIPS instruction set architecture. We have also demonstrated the LI properties of the implementation. 1/14/20163
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Gabriel Kainz
Chair
January 21, 2012
Regional Committee Meeting
Red River Valley Section Report
2011 Section Most Important Accomplishment
Student Design Contest– University of North Dakota– North Dakota State University
05/03/232
Abstracts32-Bit Synchronous Latency Insensitive Processor
The constantly shrinking feature size of nano-scale technology leads to several challenges that the synchronous design paradigm struggles to cope with. Latency insensitive design is proposed as a solution for the wire-delay challenge, where buffers can be arbitrarily inserted in channels to alter the latency of channels without modifying the behavior of the design. In this project, we have designed and implemented in VHDL, a 32-Bit processor that is latency-insensitive. The processor implements a turing complete subset of the MIPS instruction set architecture. We have also demonstrated the LI properties of the implementation.
05/03/233
AbstractsSelf Balancing UnicycleOur project creates an easy form of energy efficient transportation in a compact vehicle. In order to keep the unicycle stable and balanced, implementation of a control system is necessary. A motor mounted to the unicycle is driven with a speed and direction based on the tilt of the unicycle. The tilt of the unicycle is measured by an Inertial Measurement Unit, combining an accelerometer and a gyroscope to gain an accurate measurement of the tilt at all times.
05/03/234
AbstractsAutomated Efficiency MeterWe have designed a system that will quickly and accurately measure the efficiency of switching mode voltage regulators. Our device is capable of taking four power measurements simultaneously in order to calculate efficiency with an accuracy of 0.05%. Our device is capable of automatically taking many measurements without human intervention, greatly reducing the man hours that are required to do such testing manually.
05/03/235
05/03/236
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05/03/238
Results
Self Balancing Unicycle (NDSU)Mini-UAS Search and Rescue Payload (UND)32-bit Synchronous Latency Insensitive Processor (NDSU)
05/03/239
2011 Section Most Important Accomplishment
ExComm Meeting– Held over internet– Plans for future meetings
05/03/2310
R4 Can Most Help My Section By…
25th Anniversary– R4 leadership in attendance– We want to make a bigger deal out of this
meeting
05/03/2311
