FPGA implementation of a video-based system for GNSS ...ersat-ggc.eu/doc/RAIL2018_Rihab_HMIDA_C12.pdf · Presentation of the system architecture FPGA processing modules . Institut

FPGA implementation of a video-based system

for GNSS reception characterization along a

railway line

Rihab HMIDA

Fourth International Conference on Railway Technology: Research, Development and Maintenance

3-7 September 2018 | Sitges, Barcelona, Spain

Institut français des sciences et technologies des transports, de l’aménagement et des réseaux

www.ifsttar.fr 2

Context and Goals

Presentation of the system architecture

Presentation of the embedded algorithm

Experiments and Discussion

Conclusion and Future works

Plan


www.ifsttar.fr 3

Satellites transmit

The receiver on the train

receives

The train calculates its

position

The train sends its

position to the server

Global Navigation Satellite Systems

Train location is of main use in railway signaling applications. Currently, sensors are installed along the lines to detect the presence of a train.

However, in order to reduce the global cost of the system relying on balises – including maintenance, the use of Global Navigation Satellite Systems (GNSS) is investigated.

Context and Goals


www.ifsttar.fr 4

Balise !

=> The longer term advantages of such an evolution would be to increase the frequency of the trains and to reduce the energy consumption, thanks to adapted algorithms that optimizes the speed of circulation with respect to the profile of the lines.

B5 62 01 35 1C 01 B0 9C BE 1C 01 17 00 00 00 07 µb.5..°.¾.......

0010 20 0E 28 01 1E 00 1F 19 00 00 00 08 28 31 28 01 .(.........(1(.

0020 0A 00 1F 19 00 00 00 0A 29 37 7D 00 FE FF 1F 19 ........)7}.þÿ..

0030 00 00 00 0B 1A 08 09 01 1D 00 1F 19 00 00 00 0D ................

0040 18 03 09 00 38 FC 14 19 00 00 00 0F 17 0A 29 00 ....8ü........).

0050 ED FF 1C 19 00 00 00 10 22 28 B7 00 F0 FF 1F 19 íÿ......"(·.ðÿ..

0060 00 00 00 12 23 14 F7 00 E8 FF 1F 19 00 00 00 14 ....#.÷.èÿ......

0070 28 31 4C 00 F7 FF 1F 19 00 00 00 15 22 1B 43 00 (1L.÷ÿ......".C.

0080 11 00 1F 19 00 00 00 1A 19 0E AB 00 44 FE 14 19 ..........«.Dþ..

0090 00 00 00 1B 2B 58 62 01 06 00 1F 19 00 00 00 1E ....+Xb.........

00A0 23 0A 44 01 28 00 1F 19 00 00 06 01 18 2B 4B 00 1F 19 ........./D.H...

0120 00 00 B1 E2

Geographic Data base

B5 62 01 35 1C 01 B0 9C BE 1C 01 17 00 00 00 07 µb.5..°.¾.......

0010 20 0E 28 01 1E 00 1F 19 00 00 00 08 28 31 28 01 .(.........(1(.

0020 0A 00 1F 19 00 00 00 0A 29 37 7D 00 FE FF 1F 19 ........)7}.þÿ..

0030 00 00 00 0B 1A 08 09 01 1D 00 1F 19 00 00 00 0D ................

0040 18 03 09 00 38 FC 14 19 00 00 00 0F 17 0A 29 00 ....8ü........).

0050 ED FF 1C 19 00 00 00 10 22 28 B7 00 F0 FF 1F 19 íÿ......"(·.ðÿ..

0060 00 00 00 12 23 14 F7 00 E8 FF 1F 19 00 00 00 14 ....#.÷.èÿ......

0070 28 31 4C 00 F7 FF 1F 19 00 00 00 15 22 1B 43 00 (1L.÷ÿ......".C.

0080 11 00 1F 19 00 00 00 1A 19 0E AB 00 44 FE 14 19 ..........«.Dþ..

0090 00 00 00 1B 2B 58 62 01 06 00 1F 19 00 00 00 1E ....+Xb.........

00A0 23 0A 44 01 28 00 1F 19 00 00 06 01 18 2B 4B 00 1F 19 ........./D.H...

0120 00 00 B1 E2

B5 62 01 35 1C 01 B0 9C BE 1C 01 17 00 00 00 07 µb.5..°.¾.......

0010 20 0E 28 01 1E 00 1F 19 00 00 00 08 28 31 28 01 .(.........(1(.

0020 0A 00 1F 19 00 00 00 0A 29 37 7D 00 FE FF 1F 19 ........)7}.þÿ..

0030 00 00 00 0B 1A 08 09 01 1D 00 1F 19 00 00 00 0D ................

0040 18 03 09 00 38 FC 14 19 00 00 00 0F 17 0A 29 00 ....8ü........).

0050 ED FF 1C 19 00 00 00 10 22 28 B7 00 F0 FF 1F 19 íÿ......"(·.ðÿ..

0060 00 00 00 12 23 14 F7 00 E8 FF 1F 19 00 00 00 14 ....#.÷.èÿ......

0070 28 31 4C 00 F7 FF 1F 19 00 00 00 15 22 1B 43 00 (1L.÷ÿ......".C.

0080 11 00 1F 19 00 00 00 1A 19 0E AB 00 44 FE 14 19 ..........«.Dþ..

0090 00 00 00 1B 2B 58 62 01 06 00 1F 19 00 00 00 1E ....+Xb.........

00A0 23 0A 44 01 28 00 1F 19 00 00 06 01 18 2B 4B 00 1F 19 ........./D.H...

0120 00 00 B1 E2

B5 62 01 35 1C 01 B0 9C BE 1C 01 17 00 00 00 07 µb.5..°.¾.......

0010 20 0E 28 01 1E 00 1F 19 00 00 00 08 28 31 28 01 .(.........(1(.

0020 0A 00 1F 19 00 00 00 0A 29 37 7D 00 FE FF 1F 19 ........)7}.þÿ..

0030 00 00 00 0B 1A 08 09 01 1D 00 1F 19 00 00 00 0D ................

0040 18 03 09 00 38 FC 14 19 00 00 00 0F 17 0A 29 00 ....8ü........).

0050 ED FF 1C 19 00 00 00 10 22 28 B7 00 F0 FF 1F 19 íÿ......"(·.ðÿ..

0060 00 00 00 12 23 14 F7 00 E8 FF 1F 19 00 00 00 14 ....#.÷.èÿ......

0070 28 31 4C 00 F7 FF 1F 19 00 00 00 15 22 1B 43 00 (1L.÷ÿ......".C.

0080 11 00 1F 19 00 00 00 1A 19 0E AB 00 44 FE 14 19 ..........«.Dþ..

0090 00 00 00 1B 2B 58 62 01 06 00 1F 19 00 00 00 1E ....+Xb.........

00A0 23 0A 44 01 28 00 1F 19 00 00 06 01 18 2B 4B 00 1F 19 ........./D.H...

0120 00 00 B1 E2

server

Context and Goals


www.ifsttar.fr 5

The EU ERSAT GGC starting project intends to work on methodologies for the GNSS reception characterization of the lines in order to evaluate opportunities of virtual balises concept and its use efficiency.

In applications where high precision is required, the GNSS performance is not enough sufficient because of several errors (atmospheric, multipaths … etc.)

By using complementary sensors measures to aid GNSS positioning, the accuracy can be substantially improved.

Context and Goals


www.ifsttar.fr 6

Context and Goals

Use of sky video recording system in addition to GNSS receiver

Limit the number and time of experimentation compaigns


www.ifsttar.fr

- Mutli-sensor fusion : use of low-cost, small size and flexible platforms which is a challenge in the next generation of navigation systems.

- Contribution : develop an embedded system that combines and merges different data sets around a novel architecture based on FPGA technology.

FPGA Platform allowing the control of the sensors,

acquisition, synchronization, processing and fusion of coming

data sets

Video Assist Monitor UART

HDMI

HDMI PPS

PC Monitor USB

Ublox GPS

Fish-eye camera

HW logics

SW program

Using FPGA-based system offer designers the maximum flexibility to customize system architecture. Co-designing software and hardware is also an option offered for parallel computation.


7


www.ifsttar.fr

1- Received GNSS and HDMI data are recovered in pipeline and independently within the FPGA circuit to be treated. 2- GNSS data extraction and decoding module. 3- Synchronize received HDMI data with respect to the pulse per second (PPS) signal and GPS time.

8

FPGA circuit

HDMI data

GNSS data

Adaption and Transferring

Deserializing and Transferring

Decoding and Transferring

To SD card

Synchronize and Time-stamp

1 2

3

3

HDMI data 1

Adaption

Transferring

SW

HW

FPGA processing modules



www.ifsttar.fr 9

- A UART receiver module is developed in VHDL. Serial coming data are collected by bytes, at 54MHz, using a FSM process.

- Video data transmission (PCLK, RGB, audio, synchronization) is performed using FPGA hardware resources. Communication channels (HPD, SDA, CEC, …etc) are performed via the embedded processor of the FPGA

1- Received GNSS and HDMI data are recovered in pipeline and independently within the FPGA circuit to be treated :




www.ifsttar.fr 10

Receiver Protocol Specification

1- Received GNSS and HDMI data are recovered in pipeline and independently within the FPGA circuit to be treated. 2- GNSS data extraction and decoding module: Based on the Receiver Protocol Specification that describes GNSS frames contents, a processing diagram is defined to read, identify UBX frames and extract useful data. 3- Synchronize received HDMI data with respect to the pulse per second (PPS) signal and GPS time.




www.ifsttar.fr 11

1- Received GNSS and HDMI data are recovered in pipeline and independently within the FPGA circuit to be treated. 2- GNSS data extraction and decoding module. 3- Synchronize received HDMI data with respect to the GPS time. At each PPS signal, a new GPS time is acquired and saved. An image acquisition delay ∆T is calculated using the FPGA clock. When a new image frame is detected, it is time-stamped with a combination of GPS time, image acquisition delay and the clock bias.




www.ifsttar.fr

3

12

1- Received GNSS and HDMI data are recovered in pipeline and independently within the FPGA circuit to be treated. 2- GNSS data extraction and decoding module. 3- Synchronize received HDMI data with respect to the pulse per second (PPS) signal and GPS time.

2

1

1

1

3

Sw


FPGA HW/SW design


www.ifsttar.fr 13

Presentation of the embedded algorithm

FPGA Design Flow Diagram


www.ifsttar.fr 14

GPS Ublox M8T RS232 output

Patch Antenna GPS Supply

(5V)

RS232 communication

FPGA Board Stratix IV GX

Board Supply (12V)

HDMI-RX and HDMI-TX interfaces

Fish-eye camera HDMI output

Alimentation caméra

Black Magic Recording system

HDMI input/output 2 x SD card (256 GB)



www.ifsttar.fr 15



www.ifsttar.fr 16

TIMEUTC : E2 07 07 0D 0D 39 12 Epoch Timestamp : 1531490242 Image Acquisition Delay : 5B 02 Clock Bias : 3C 06 µs

Delay = Hex2dec (5B 02) × 20 ns = 12,06 µs Clock Bias = 1596 µs

TIMEUTC : 2018/07/13 13:57:18 Hex2dec

Hex2dec

Hex2dec x clock Epoch Timestamp : 1531490242



www.ifsttar.fr 17

1sec 2sec 3sec 4sec

13:57:18 13:57:19 13:57:20 13:57:21



www.ifsttar.fr 18

Identification LOS / NLOS

Image Classification

Place Satellites on Image

Enhance the precision of the train position based on LOS / NLOS signals classification



www.ifsttar.fr 19

Interferences ?

Masking

Reflected signals ?

Optimal conditions of GNSS reception

ERSAT GGC ERTMS on SATELLITE Galileo Game Change

Multipath ?

Classify track areas as suitable or not for locating Virtual Balises



www.ifsttar.fr 20

The tool will be used in the ERSAT GGC project: Measures and data acquisitions are planned at the beginning of 2019 on train railway lines.

Conclusion

The prototype is almost finalized : lab tool compact and transportable system,

First experiments have been performed on July 2018 to test the system behavior under real environmental conditions,

Methodologies of data fusion and image analysis are post-processed in order to illustrate the potential of the tool,

Perspectives

Amelioration of the real-time recording system : image processing algorithm will be embedded on the FPGA circuit in order to calculate the train position during its running,


www.ifsttar.fr

Thank you for your attention

Rihab HMIDA

IFSTTAR

France

[email protected]

www.ifsttar.fr

mailto:[email protected]

Documents

FPGA implementation of a video-based system for GNSS ...ersat-ggc.eu/doc/RAIL2018_Rihab_HMIDA_C12.pdf · Presentation of the system architecture FPGA processing modules . Institut