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MICROPROCESSOR 8085 AND MICROCONTROLLER 8051 1.To put the 8085 microprocessor in the wait state a) lower the HOLD input b) lower the READY input c) raise the HOLD input d) raise the READY input 2.The microprocessor 8085 has _____ basic instructions and _____ opcodes. a)80, 246 b) 70, 346 c) 80, 346 d) 70, 246 3.In 8085, the status that cannot be operated by direct instructions is a) Cy b) Z c) P d)AC 4.Adress line for RST 3 is a) 0020H b) 0028H c)0018H d) 0038H 5.In 8051,After reset the SP register is initialized to address________. a)8H b) 9H c)7H d) 6H 6.In 8051 an external interrupt 1 vector address is of ________ and causes of interrupt if ____. a)000BH, a high to low transition on pin INT1 b)001BH, a low to high transition on pin INT1 c) 0013H, a high to low transition on pin INT1 d) 0023H, a low to high transition on pin INT1 7. The opcode for DAD D & ADD H a)20 &84 b) 19&85 c)19&84 d)20&85

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MICROPROCESSOR 8085 AND MICROCONTROLLER 8051

1 .To pu t t he 8085 mic rop roces so r i n t he wa i t s t a t e

a) lower the HOLD input

b) lower the READY input

c) raise the HOLD input

d) raise the READY input

2.The microprocessor 8085 has _____ basic instructions and _____ opcodes.

a)80, 246 b) 70, 346 c) 80, 346 d) 70, 246

3.In 8085, the status that cannot be operated by direct instructions is

a) Cy b) Z c) P d)AC

4.Adress line for RST 3 is

a) 0020H b) 0028H c)0018H d) 0038H

5.In 8051,After reset the SP register is initialized to address________.

a)8H b) 9H c)7H d) 6H

6.In 8051 an external interrupt 1 vector address is of ________ and causes of interrupt if ____.

a)000BH, a high to low transition on pin INT1

b)001BH, a low to high transition on pin INT1

c) 0013H, a high to low transition on pin INT1

d) 0023H, a low to high transition on pin INT1

7. The opcode for DAD D & ADD H

a)20 &84 b) 19&85 c)19&84 d)20&85

8.In 8051, the baud rate can be doubled by using the register ______

a)PCON b)TCON c)SCON d)TMOD

9.What is the address(SFR) for SCON, PCON &PSW respectively?

a)98H,87H&D0H b)88H,87H&98H

c)98H,88H&D0H d)88H,98H&D0H

10.The target location of short jump is within ________ bytes of the current PC.

a)-256 to +255 b) 0 to 255

c) 0 to 127 d)-128 to 127

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11. After execution of call instruction, the contents of SP & PC _________

Mem address Instructions

2000 LXI SP,0100

2003 PUSH H

2004 PUSH D

2005 CALL 2050H

2006 POP H

2007 HLT

a) 0107&2050 b)00FA&2050

c) 00FA&2006 d)0107&2006

12. What is the function of watchdog timer?

a) The watchdog Timer is an external timer that resets the system if the software fails to operate

properly.

b) The watchdog Timer is an internal timer that sets the system if the software fails to operate

properly.

c) The watchdog Timer is an internal timer that resets the system if the software fails to

operate properly.

d) None of them

13.When the 8051 is reset and the line is LOW, the program counter to the first program

instruction in the ________

a) internal code memory b) external code memory

c)internal data memory d)external data memory

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14. For the 8085 assembly language program given below, the content of

theaccumulator after the execution of the program is

3000 MVI A, 45H

3002 MOV B, A

3003 STC

3004 CMC

3005 RAR

3006 XRA B

a) 00H b)45H c)67H d) E7H

15.In serial communication modes, mode 1 the Baud rate ____________a) BR=2SMOD/32 * (Timer 0 over flow rate) b) BR=2SMOD/16 * (Timer 1 over flow rate) c) BR=2SMOD/16 * (Timer 0 over flow rate) d) BR=2SMOD/32 * (Timer 1 over flow rate)

16. In microcontroller and LCD interface which line will instruct the LCD that microcontroller is sending data?

a)DB0 b) RW c) EN d) RS

17.Resolution of ADC is defined as a) 1/ (2N – 1) b) 2N-1 c) 1/ (2N-1) d) 2N-1

18. Which pin of port 3 is has an alternative function as write control signal for external data memory? a) P3.8 b) P3.3 c) P3.6 d) P3.1

19.The advantage of memory mapped I/O over I/O mapped I/O isa) Faster b) Many instructions supporting memory mapped I/O c) Require a bigger address decoder d) All the above