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FiniteStateMachines
CS64:ComputerOrganizationandDesignLogicLecture#15Fall2018
ZiadMatni,Ph.D.
Dept.ofComputerScience,UCSB
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Administrative
• TheLast2WeeksofCS64:
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Date L# Topic Lab LabDue11/26 13 CombinatorialLogic,
SequentialLogic8(CL+SL) Sun.12/2
11/28 14 SequentialLogic12/3 15 FSM 9(FSM) Fri.12/712/5 16
FSM,
CSEthics&Impact10(Ethics) Fri.12/7
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Administrative• NewLab#9issuedtomorrow– DueFriday
• PracticeExamwillbeonlinev.soon–
LookforPiazzaannouncement
• YourfinalexamisonWednesday,Dec.12that8:00AM
– Inthisclassroom– BeONTIME!Arrive10minutesEARLY!
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LectureOutline
• FiniteStateMachines
– Moorevs.Mealytypes
– StateDiagrams
– FiguringoutacircuitforaFSM
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IfacombinationallogiccircuitisanimplementationofaBooleanfunction,
thenasequentiallogiccircuitcanbeconsideredanimplementationof
afinitestatemachine.
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FiniteStateMachines(FSM)
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Anabstractmachinethatcanbeinexactlyoneofafinitenumberofstatesatanygiventime
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It’saverysimplemodelofacomputationalmachine,unlikePushdownAutomatonsandTuringMachines–
You’lldiscovertheseinotherCSupper-divclasses
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FiniteStateMachines(FSM)•
TheFSMcanchangefromonestatetoanotherinresponsetosome
externalinputs
• Thechangefromonestatetoanotheriscalledatransition.
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AnFSMisdefinedbyalistofitsstates,itsinitialstate,andtheconditionsforeachtransition.
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STATE“A”
StartingpointSTATE“B”
TransitionA->B
TransitionB->A
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ExampleofaSimpleFSM:TheTurnstile
initialstateStateTransitionTable
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CurrentState
Input NextState
Output
Locked Coin Unlocked
Unlockstheturnstilesothatthecustomercanpushthrough.
Locked Push Locked Nothing–you’relocked!J
Unlocked Coin Unlocked Nothing–youjustwastedacoin!J
Unlocked Push Locked
Whenthecustomerhaspushedthrough,lockstheturnstile.
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ExampleofaSimpleFSM:TheTurnstile
initialstateStateTransitionTable
12/3/18 Matni,CS64,Fa18 9Source:Wikipedia
CurrentState
Input NextState
Output
Locked Coin Unlocked
Unlockstheturnstilesothatthecustomercanpushthrough.
Locked Push Locked Nothing–you’relocked!J
Unlocked Coin Unlocked Nothing–youjustwastedacoin!J
Unlocked Push Locked
Whenthecustomerhaspushedthrough,lockstheturnstile.
Thisiscalledastatediagram
à
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GeneralFormofFSMs
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Example
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A
CLK
Q*
Q*=QO.A
Onthenextrisingedgeoftheclock,theoutputoftheD-FFQ(Q*)willbecome
thepreviousvalueofQ(QO)ANDthevalueofinputA
QoCombinatoriallogic
StateregisterClocksignal
Output-to-inputfeedback
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FSMTypes
Thereare2types/modelsofFSMs:• Mooremachine–
Outputisfunctionofpresentstateonly
• Mealymachine–
Outputisfunctionofpresentstateandpresentinput
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MooreMachine
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Outputisfunctionofpresentstateonly
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ExampleofaMooreMachine(with1state)
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A
CLK
Z
Z=(Q*+B)=(QO.A+B)Onthenextrisingedgeoftheclock,theoutputoftheentirecircuit(Z)
willbecome(thepreviousvalueofQ(QO)ANDthevalueofinputA)NORB
NOTE:CLKisNOWHEREINTHEEQUATION!!!
B
Q
Outputisfunctionofpresentstateonly
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MealyMachine
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Outputisfunctionofpresentstateandpresentinput
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ExampleofaMealyMachine(with1state)
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A
CLKB
Z
Z=(Q*+A+B)=(QOXORA)+(A+B)
Onthenextrisingedgeoftheclock,theoutputoftheentirecircuit(Z)willbecome…etc…
Q
Outputisfunctionofpresentstateandpresentinput
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ExampleofaMooreMachine
WASHER_DRYER
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Let’s“build”asequentiallogicFSMthatactsasacontrollertoasimplisticwasher/dryermachine
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Thismachinetakesinvariousinputsinitsoperation(we’llonlyfocusonthefollowingsensor-basedones):
• Thismachinealsoissues1outputwhilerunning:
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Coinisin(vsitisn’tin)Soapispresent(vsit’susedup)
Clothesarestillwet(vsclothesaredry)
“Done”indicator
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MachineDesign
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Wewantthismachinetohave4distinctstatesthatwegofromonetothenextinthissequence:
1. InitialState– Wherewearewhenwearewaitingtostartthewash
2. Wash– Wherewewashwithsoapandwater
3. Dry– Wherewedrytheclothes
4. Done
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CombiningtheInputs
• Let’screateavariablecalledGTNS(i.e.GoToNextState)
• GTNSis1ifanyofthefollowingistrue:– Coinisin–
Soapisnolongerdetected– Clothesarenowdry–
Iassumethatthese3inputstobemutuallyexclusive
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Coinisin(vsitisn’tin)Soapisnolongerdetected(vsit’sstillthere)
Clothesarenowdry(vsclothesarestillwet)
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What’sGoingtoHappen? 1/2
• Westartatan“Initial”statewheneverwestartupthemachine–
Let’salsoassumethisstageiswhenyou’dputinthesoapandclothes–
Onceinput“Coinisin”is1,GTNSisnow1–
Thiseventtriggersleavingthecurrentstatetogotothenextstate
• Thisisfollowedbythenextstate,“Wash”–
“Coininserted”isnow0atthispoint(soGTNSgoesbackto0)–
Whilesoapisstillpresent,GTNSgoesbackto0–
Whentheinput“Soapisnolongerpresent”goesto1,GTNSgoesto1–
Thiseventtriggersleavingthecurrentstatetogotothenextstate
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Coinisin(vsitisn’tin)Soapisnolongerdetected(vsit’sstillthere)Clothesarenowdry(vsclothesarestillwet)
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• Thisisfollowedbythenextstate,“Dry”–
Thisnewstatesetsanoutputthattriggersatimer–
Theinput“Soapisnolongerpresent”goesto0,soGTNSis0also–
Whiletheinput“Clothesarenowdry”is0,GTNSremainsat0too–
Whentheinput“Clothesarenowdry”is1,GTNSchangesto1–
Thiseventtriggersleavingthecurrentstatetogotothenextstate
• Thisisfollowedbythenextandlaststate,“Done”–
Whenyou’rehere,yougobacktothe“initial”state–
Noinputstoconsider:youdomovethisregardless
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What’sGoingtoHappen? 2/2
Coinisin(vsitisn’tin)Soapisnolongerdetected(vsit’sstillthere)Clothesarenowdry(vsclothesarestillwet)
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StateDiagramforWasher-DryerMachine
Wash
Done
InitialState
GTNS
DONE=1
DONE=0
inputs
outputsstate
transition
GTNS
GTNS
1
Dry
GTNS
GTNS=COIN_IN+NO_SOAP+CLTHS_DRY
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UnconditionalTransitions
• Sometimesthetransitionisunconditional–
Doesnotdependonanyinput–itjusthappens
• Wethendiagramthisasa“1”(for“alwaysdoesthis”)
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State2State0K=1
State1
K=01
K=0K=1
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RepresentingTheStates•
HowmanybitsdoIneedtorepresentallthestatesinthisWasher-Dryer
Machine?
• Thereare4uniquestates(including“init”)– So,2bits
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Ifmystatemachinewillbebuiltusingamemorycircuit(mostlikely,aD-FF),howmanyoftheseshouldIhave?–
2bits=2D-FFs
• Thereisanotherschemetodothiscalled“OneHotMethod”.–
Moreonthislater…
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State S1 S0Initial 0 0Wash 0 1Rinse 1 0Dry 1 1
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ExampleofaMooreMachine2DETECT_1101
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Let’sbuildasequentiallogicFSMthatalwaysdetectsaspecificserialsequenceofbits:1101
• We’llstartatan“Initial”state(S0)•
We’llfirstlookfora1.We’llcallthat“State1”(S1)
– Don’tgotoS1ifallwefindisa0!
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We’llthenkeeplookingforanother1.We’llcallthat“State11”(S2)
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ExampleofaMooreMachine2DETECT_1101
• Then…a0.We’llcallthat“State110”(S3)
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Thenanother1.We’llcallthat“State1101”(S4)–thiswillalsooutputaFOUNDsignal
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Wewillalwaysbedetecting“1101”(itdoesn’tend)So,asSOONasS4isdone,wekeeplookingfor1sor0s
• Example:iftheinputstreamis111101110101101000011111011011
wedetect“1101”at ññññ ñ
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111101110101101000011111011011
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StateDiagram2
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“1” “11”
“110”“1101”
InitialState
Input=0 Input=1
Input=1
Input=0
Input=0
FOUND=1
Input=1
S0
S4 S3
S2S1
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RepresentingTheStates•
HowmanybitsdoIneedtorepresentallthestatesinthis
“Detect1101”Machine?
• Thereare5uniquestates(including“init”)– So,3bits
• HowmanyD-FFsshouldIhavetobuildthismachine?– 3bits=3D-FFs
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State B2 B1 B0
Initial 0 0 0Found“1” 0 0 1Found“11” 0 1 0Found“110” 0 1
1Found“1101” 1 0 0
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DesigningtheCircuitfortheFSM
1. WestartwithaT.T– Alsocalleda“StateTransitionTable”
2. MakeK-Mapsandsimplify–
Usuallygiveyouranswerasa“sum-of-products”form
3. Designthecircuit– HavetouseD-FFstorepresentthestatebits
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1.TheTruthTable(TheStateTransitionTable)
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State B2 B1 B0 I B2* B1* B0* FOUND
Initial 0 0 0 0 0 0 0 0
1 0 0 1 0
Found“1” 0 0 1 0 0 0 0 0
1 0 1 0 0
Found“11” 0 1 0 0 0 1 1 0
1 0 1 0 0
Found“110” 0 1 1 0 0 0 0 0
1 1 0 0 0
Found“1101” 1 0 0 0 0 0 0 1
1 0 1 0 1
CURRENTSTATE NEXTSTATEINPUT(S) OUTPUT(S)
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2.K-MapsforB2*andB1*
• Youneedtodothisforall3stateoutputs
• B2*=!B2.B1.B0.I– Nofurthersimplification
• B1*=!B2.!B1.B0.I +B2.!B1.!B0.I +!B2.B1.!B0
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B2.B1B0.I
00 01 11 10
00
01
11 1
10
B2.B1B0.I
00 01 11 10
00 1
01 1 1
11 1
10
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2.K-MapforB0*OutputFOUND
• B0*=!B2.!B1.!B0.I +!B2.B1.!B0.!I
• FOUND
=B2.!B1.!B0– NotethatFOUNDdoesnotneedaK-Map.Itisalways“1”(i.e.True)whenweareinstateS4(i.e.whenB2=1,B1=0,B0=0)
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B2.B1B0.I
00 01 11 10
00 1
01 1
11
10
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3.DesigntheCircuit
NotethatCLKistheinputtoALLtheD-FFs’clockinputs.Thisisasynchronousmachine.Notetheuseoflabels(example:B2orB0-bar)insteadofroutingwiresallovertheplace!NotethatIissuedbothBnandBn-barfromalltheD-FFs–itmakesiteasierwiththelabelingandyouwon’thavetouseNOTgates!Notethatthesoleoutput(FOUND)doesnotneedaD-FFbecauseitisNOTASTATEBIT!
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