FiniteStateMachines

CS64:ComputerOrganizationandDesignLogicLecture#16

ZiadMatni

Dept.ofComputerScience,UCSB

Administrative

•  LESSTHAN2weeksleft!!!!!!OMGOMGOMGOMGOMGOMG!!!!!!!!!!!!!!

•  FinalexamisonWednesday,June13thfrom12:00–3:00PM.– Detailswillbegivennextweek

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LectureOutline

•  FiniteStateMachines

– Moorevs.Mealytypes

– StateDiagrams

– “OneHot”Method

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AnyQuestionsFromLastLecture?

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IfacombinationallogiccircuitisanimplementationofaBooleanfunction,

thenasequentiallogiccircuitcanbeconsideredanimplementationof

afinitestatemachine.

FiniteStateMachines(FSM)

•  Anabstractmachinethatcanbeinexactlyoneofafinitenumberofstatesatanygiventime

•  It’saverysimplemodelofacomputationalmachine,unlikePushdownAutomatonsandTuringMachines–  You’lldiscovertheseinotherCSupper-divclasses

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FiniteStateMachines(FSM)•  TheFSMcanchangefromonestatetoanotherinresponsetosome

externalinputs

•  Thechangefromonestatetoanotheriscalledatransition.

•  AnFSMisdefinedbyalistofitsstates,itsinitialstate,andtheconditionsforeachtransition.

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STATE“A”

StartingpointSTATE

“B”

TransitionA->B

TransitionB->A

ExampleofaSimpleFSM:TheTurnstile

initialstateStateTransitionTable

5/31/18 Matni,CS64,Sp18 8Source:Wikipedia

CurrentState

Input NextState

Output

Locked Coin Unlocked Unlockstheturnstilesothatthecustomercanpushthrough.

Locked Push Locked Nothing–you’relocked!J

Unlocked Coin Unlocked Nothing–youjustwastedacoin!J

Unlocked Push Locked Whenthecustomerhaspushedthrough,lockstheturnstile.

ExampleofaSimpleFSM:TheTurnstile

initialstateStateTransitionTable

5/31/18 Matni,CS64,Sp18 9Source:Wikipedia

CurrentState

Input NextState

Output

Locked Coin Unlocked Unlockstheturnstilesothatthecustomercanpushthrough.

Locked Push Locked Nothing–you’relocked!J

Unlocked Coin Unlocked Nothing–youjustwastedacoin!J

Unlocked Push Locked Whenthecustomerhaspushedthrough,lockstheturnstile.

GeneralFormofFSMs

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Example

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A

CLK

Q*

Q*=QO.A

Onthenextrisingedgeoftheclock,theoutputoftheD-FFQ(Q*)willbecome

thepreviousvalueofQ(QO)ANDthevalueofinputA

QoCombinatoriallogic

StateregisterClocksignal

Output-to-inputfeedback

FSMTypes

Thereare2types/modelsofFSMs:•  Mooremachine–  Outputisfunctionofpresentstateonly

•  Mealymachine–  Outputisfunctionofpresentstateandpresentinput

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MooreMachine

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Outputisfunctionofpresentstateonly

ExampleofaMooreMachine(with1state)

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A

CLK

Z

Z=(Q*+B)=(QO.A+B)

Onthenextrisingedgeoftheclock,theoutputoftheentirecircuit(Z)willbecome

(thepreviousvalueofQ(QO)ANDthevalueofinputA)NORB

B

Q

Outputisfunctionofpresentstateonly

MealyMachine

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Outputisfunctionofpresentstateandpresentinput

ExampleofaMealyMachine(with1state)

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A

CLKB

Z

Z=(Q*+A+B)=(QOXORA)+(A+B)

Onthenextrisingedgeoftheclock,theoutputoftheentirecircuit(Z)willbecome…etc…

Q

Outputisfunctionofpresentstateandpresentinput

DiagramingStateMachines

•  AsimpleFSMexample•  2states:– Dooropened– Doorclosed

•  Thisiscalledastatediagram

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ExampleofaMooreMachine1

WASHER_DRYER

•  Let’s“build”asequentiallogicFSMthatactsasacontrollertoasimplisticwasher/dryermachine

•  Thismachinetakesinvariousinputsinitsoperation(we’llonlyfocusonthefollowingsensor-basedones):

•  Thismachinealsoissuesoutputswhilerunning:

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Coinputin(vsitisn’t) Timerisunder30minutes(vsitisn’t)Soapispresent(vsusedup) Wetnessindicator(vsclothesaredry)

“TimerBegin”indicator “Fill-Water”indicator“Drain-Then-Refill”indicator “DrainCompletely”indicator

ExampleofaMooreMachine1WASHER_DRYER

•  Beforewebegin,themachineisinaninitialstatethatiswaitingforyoutoinsertacoin.We’llcallthatthe“InitialState”

•  Themachinewillstartawashertimerassoonasacoinisinserted.–  Byissuinganoutput,“TimerBegin”

•  Thetimeriscontrolledbyasignal(i.e.inputvar)calledTIMER_LT_30,whichisalwaysinitializedtobe1(i.e.True).

•  Wethustransitionfrom“InitialState”to“WashState”

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ExampleofaMooreMachine1WASHER_DRYER

•  WashState:Thiswilloutputasignaltofillthewasherwithwater(FILL_WATER).

•  Aslongasthetimerisbelow30mins(TIMER_LT_30=1),thecyclecontinues.

•  Whenthetimersurpasses30mins(i.e.TIMER_LT_30=0),thisstatewillend

•  Wethustransitionfrom“WashState”to“RinseState”

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ExampleofaMooreMachine1WASHER_DRYER

•  RinseState:Thiswilloutputasignaltodrainthewaterandthenrefillwithnewwater(DRAIN_REFILL=1).

•  Aslongasthesoapsensorison(SOAP=1),thecyclecontinues.

•  Whenthesoapsensorturnsoff(i.e.SOAP=0),thisstatewillend

•  Wethustransitionfrom“RinseState”to“DryState”

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ExampleofaMooreMachine1WASHER_DRYER

•  DryState:Thiswilloutputasignaltodrainthewaterforgoodandbegindrying(DRAIN=1).

•  Aslongasthewetclothessensorison(WET=1),thecyclecontinues.

•  Whenthewetclothessensorisoff(WET=0),wewillstop!•  Thismeansgoingbacktothe“InitialState”

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StateDiagramforWasher-DryerMachine

Wash Rinse

Dry

InitialState

COIN=0

TIMER_LT_30=0

DRAIN=1

SOAP=1

WET=0

TIMER_LT_30=1

TIMER_BEGIN=1

FILL_WATER=1DRAIN_REFILL=1

WET=1

inputs

outputsstate

transition

UnconditionalTransitions

•  Sometimesthetransitionisunconditional–  Doesnotdependonanyinput–itjusthappens

•  Wethendiagramthisasa“1”(for“alwaysdoesthis”)

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State2State0K=1

State1

K=01

K=0K=1

RepresentingTheStates

•  HowmanybitsdoIneedtorepresentallthestatesinthisWasher-DryerMachine?

•  Thereare4uniquestates(including“init”)–  So,2bits

•  Ifmystatemachinewillbebuiltusingamemorycircuit(mostlikely,aD-FF),howmanyoftheseshouldIhave?–  2bits=2D-FFs

•  Thereisanotherschemetodothiscalled“OneHotMethod”.–  Moreonthislater…

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State S1 S0Initial 0 0Wash 0 1Rinse 1 0Dry 1 1

ExampleofaMooreMachine2DETECT_1101

•  Let’sbuildasequentiallogicFSMthatalwaysdetectsaspecificserialsequenceofbits:1101

•  We’llstartatan“Initial”state(S0)•  We’llfirstlookfora1.We’llcallthat“State1”(S1)

–  Don’tgotoS1ifallwefindisa0!

•  We’llthenkeeplookingforanother1.We’llcallthat“State11”(S2)•  Then…a0.We’llcallthat“State110”(S3)•  Thenanother1.

We’llcallthat“State1101”(S4)–thiswilloutputaFOUNDsignal

•  Wewillalwaysbedetecting“1101”(itdoesn’tend)•  Example:iftheinputstreamis 111101110101101000011111011011

wedetect“1101”at ññññ ñ

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StateDiagram2

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“1” “11”

“110”“1101”

InitialState

Input=0 Input=1

Input=1

Input=0

Input=0

FOUND=1

Input=1

S0

S4 S3

S2S1

RepresentingTheStates

•  HowmanybitsdoIneedtorepresentallthestatesinthis“Detect1101”Machine?

•  Thereare5uniquestates(including“init”)–  So,3bits

•  HowmanyD-FFsshouldIhavetobuildthismachine?–  3bits=3D-FFs

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State S2 S1 S0Initial 0 0 0Found“1” 0 0 1Found“11” 0 1 0Found“110” 0 1 1Found“1101” 1 0 0

DesigningtheCircuitfortheFSM

1. WestartwithaT.T2. MakeK-Mapsandsimplify3. Designthecircuit

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1.TheTruthTable

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State S2 S1 S0 I S2* S1* S0* FOUNDInitial 0 0 0 0 0 0 0 0

1 0 0 1 0Found“1” 0 0 1 0 0 0 0 0

1 0 1 0 0Found“11” 0 1 0 0 1 1 0 0

1 0 1 0 0Found“110” 0 1 1 0 0 0 0 0

1 1 0 0 0Found“1101” 1 0 0 0 0 0 0 1

1 0 1 0 1

2.K-Maps

•  Example:forS2*–  Youneedtodothisforall4outputs

S2*=!S2.S1.!S0.!I +!S2.S1.S0.I = !S2.S1.(!S0.!I+S0.I) =!S2.S1.!(S0+I)

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S2.S1S0.I

00 01 11 10

00 10111 110

3.DesigntheCircuit

•  Seeblackboard…

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The“OneHot”Method•  MostpopularlyusedinbuildingFSMs•  Giveeachstateit’sownD-FFoutput

–  #ofFFsneeded=#ofstates–  YouendupusingMORED-FFs,buttheimplementationiseasier

toautomate

•  InputstotheFFsarecombinatoriallogicthatcansimplifiedintoa“sum-of-products”typeofBooleanexpression

•  CurrentCADsoftwarecandothisautomatically•  Implementationisusuallydoneonasimulator(software),or

prototypehardwareIntegratedCircuit(FPGA)5/31/18 Matni,CS64,Sp18 33

EncodingourStatesPerthelastexample:Wehad5separatestates:NAME BinaryCode“OneHot”Code OUTPUTS•  InitialState S0 000 00001 •  “1” S1 001 00010•  “11” S2 010 00100•  “110” S3 011 01000•  “1101” S4 100 10000 FOUND

•  Advantageofthis“OneHot”approach?–  Whenweimplementthemachinewithcircuits,wecanuseaD-FFfor

everystate(so,inthisexample,we’duse5ofthem)

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Usingthe“OneHot”CodetoDeterminetheCircuitDesign

•  Everystatehas1D-FF•  Wecanseethat

(followthearrows!!):S1*=S0.IS2*=S1.I+S2.I+S4.IS3*=S2.IS4*=S3.IS0*=S0.I+S1.I+S3.I+S4.IAlso,whenS4happens,FOUND=1,i.e.FOUND=S4WehavenowdescribedALLtheoutputsofthemachineascombinationsofcertaininputs

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“1” “11”

“110”“1101”

InitialState

Input=0 Input=1

Input=1

Input=0Input=0

FOUND=1

Input=1

S0

S4 S3

S2S1

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ImplementingtheCircuit

YourToDos

•  Lab#8isdueMonday!•  Lab#9isonFSMandwillbeissuedtomorrow– Dueonthelastdayofclasses

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