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Field Effect TransistorsField Effect TransistorsCHAPTER 6
IntroductionIntroduction Two main types of FET:
- JFET Junction field effects transistor- MOSFET Metal oxide semiconductor field effect transistor
- D-MOSFET ~ Depletion MOSFET- E-MOSFET ~ Enhancement MOSFET
Similarities:-Amplifiers-Switching devices-Impedance matching circuits
Differences:-FETs are voltage controlled devices whereas BJTs are currentcontrolled devices.-FETs also have a higher input impedance, but BJTs have highergains.-FETs are less sensitive to temperature variations and more easilyintegrated on ICs.- FETs are also generally more static sensitive than BJTs.
Construction and characteristics of JFETConstruction and characteristics of JFET
N-channel device will appear as theprominent device with paragraph andsection devoted to the impact of using ap-channel.
Major part of structure is n-type material. Top of the n-type channel is connected
through an ohmic contact to a terminalreferred to as the drain (D)
The lower end-connected through anohmic contact to a terminal referred assource (S)
P-type materials are connected togetherand to the gate (G) terminal.
JFET has two p-n junctions under no-biasconditions.
Construction and characteristics of JFETConstruction and characteristics of JFET
JFET operation can be compared to a water spigot:
The source of water pressure accumulated electrons at the negative pole ofthe applied voltage from Drain to Source
The drain of water electron deficiency (or holes) at the positive pole of theapplied voltage from Drain to Source.
The control of flow of water Gate voltage that controls the width of the n-channel, which in turn controls the flow of electrons in the n-channel fromsource to drain.
N-Channel JFET Circuit Layout
Construction and characteristics of JFETConstruction and characteristics of JFET
JFET Operating CharacteristicsJFET Operating Characteristics
There are three basic operating conditions for a JFET:
A. VGS = 0, VDS increasing to some positive
value
B. VGS < 0, VDS at some positive value
C. Voltage-Controlled Resistor
VVGSGS == 00, V, VDSDS increasing to some positiveincreasing to some positivevaluevalue
Three things happen when VGS = 0
and VDS is increased from 0 to a
more positive voltage:
the depletion region between p-gate and n-channel increases as electrons from n-channelcombine with holes from p-gate.
increasing the depletion region, decreasesthe size of the n-channel which increases theresistance of the n-channel.
But even though the n-channel resistance is
increasing, the current (ID) from Source to
Drain through the n-channel is increasing. This
is because VDS is increasing.
VVGSGS == 00, V, VDSDS increasing to some positiveincreasing to some positivevaluevalue The flow of charge is relatively uninhibited and limited solely by
the resistance of the n-channel between drain and source.
The depletion region is wider near the top of both p-typematerials.
ID will establish the voltage level through the channel.
The result: upper region of the
p-type material will be reversed biased by
about 1.5V with the lower region only
reversed biased by 0.5V (greater
applied reverse bias, the wider
depletion region).
VVGSGS == 00, V, VDSDS increasing to some positiveincreasing to some positivevaluevalue IG=0A p-n junction is reverse-biased for the length of the
channel results in a gate current of zero amperes.
As the VDS is increased from 0 to a few volts, the current will
increase as determined by Ohms Law.
VDS increase and approaches a level referred to as Vp, the
depletion region will widen, causing reduction in the channel
width. (p large, n small).
Reduced part of conduction causes the resistance to increase.
If VDS is increased to a level where it appears that the 2 depletion
regions would touch (pinch-off)
VVGSGS == 00, V, VDSDS increasing to some positiveincreasing to some positivevaluevalue
Vp = pinch off voltage.
ID maintain the saturation level defined as IDSS Once the VDS > VP, the JFET has the
characteristics of a current source.
As shown in figure, the current is fixed at ID =
IDSS, the voltage VDS (for level >Vp) is determined
by the applied load.
IDSS is derived from the fact that it is the drain-
to-source current with short circuit connection
from gate to source.
IDSS is the max drain current for a JFET and is
defined by the conditions VGS=0V and VDS > |
Vp|.
VVGSGS == 00, V, VDSDS increasing to some positiveincreasing to some positivevaluevalue
At the pinch-off point:
any further increase in VGS does
not produce any increase in ID.
VGS at pinch-off is denoted as Vp.
ID is at saturation or
maximum. It is referred to as IDSS.
The ohmic value of the channelis at maximum.
Typical JFET operationTypical JFET operation
JFET modeling when ID=IDSS, VGS=0, VDS>VP
VVGSGS
VGS
VGS
Characteristic curves for NCharacteristic curves for N--channel JFETchannel JFET
VoltageVoltage--Controlled ResistorControlled Resistor
The region to the left of the pinch-off point is called the ohmic region.
The JFET can be used as a variable
resistor, where VGS controls the
drain-source resistance (rd). As VGSbecomes more negative, the
resistance (rd) increases.
2
P
GS
od
)V
V(1
rr
And as summary in practicalAnd as summary in practical
pp--Channel JFETSChannel JFETS
p-Channel JFET acts the same as the n-channel JFET,except the polarities and currents are reversed.
PP--Channel JFET CharacteristicsChannel JFET Characteristics
As VGS increases more positively:
the depletion zone increases
ID decreases (ID < IDSS)
eventually ID = 0A
Also note that at high levels of
VDS the JFET reaches a
breakdown situation. ID
increases uncontrollably if
VDS> VDSmax.
JFET SymbolsJFET Symbols
There is a convenient relationship between IDS and VGS. Beyond pinch-off
Where IDSS is drain current when VGS= 0 and VGS(off) isdefined as VP, that is gate-source voltage that justpinches off the channel.
The pinch off voltage VP here is a +ve quantity because itwas introduced through VDS(sat).
VGS(off) however is negative, -VP.
2
)(
1
offGS
GSDSSDS
V
VII
II--V characteristicsV characteristics
II--V characteristicsV characteristics
The transconductance curveThe transconductance curve
The process for plotting trans-conductancecurve for a given JFET:
Plot a point that corresponds to value ofVGS(off).
Plot a point that corresponds to value ofIDSS.
Select 3 or more values of VGS between 0 Vand VGS(off). For value of VGS, determine thecorresponding value of ID from
Plot the point from (3) and connect all theplotted point with a smooth curve.
Transfer CharacteristicsTransfer Characteristics
The transfer characteristic of input-to-output is not asstraight forward in a JFET as it was in a BJT.
In a BJT, indicated the relationship between IB (input)and IC (output).
In a JFET, the relationship of VGS (input) and ID (output) isa little more complicated:
2
P
GSDSSD )
V
V(1II
Transfer CharacteristicsTransfer Characteristics
Transfer Curve
From this graph it is easy to determine the value of ID for a given value of VGS.
Plotting the Transfer CurvePlotting the Transfer CurveShockleys Equation Methods. Using IDSS and Vp (VGS(off)) values found in a specification sheet, the
Transfer Curve can be plotted using these 3 steps:
Step 1:
Solving for VGS = 0V:
Step 2:
Solving for VGS = Vp (VGS(off)):
Step 3:
Solving for VGS = 0V to Vp:
2
P
GSDSSD )
V
V(1II
0VVII
GSDSSD
2
P
GSDSSD )
V
V(1II
PGSD
VV0I
A
2
P
GSDSSD )
V
V(1II
Plotting the Transfer CurvePlotting the Transfer Curve
Shorthand method
VGS ID
0 IDSS
0.3VP IDSS/2
0.5 IDSS/4
VP 0mA
Specification Sheet (JFETs)
This information is also available on the specification sheet.
Case Construction and Terminal Identification
MOSFETsMOSFETs
MOSFETs have characteristics
similar to JFETs and additional
characteristics that make them
very useful.
There are 2 types:
1. Depletion-Type MOSFET
2. Enhancement-Type MOSFET
DepletionDepletion--Type MOSFET ConstructionType MOSFET Construction
The Drain (D) and Source (S) connect to the to n-doped regions. These N-
doped regions are connected via an n-channel. This n-channel is connected
to the Gate (G) via a thin insulating layer of SiO2. The n-doped material lies
on a p-doped substrate that may have an additional terminal connection
called SS.
DepletionDepletion--Type MOSFETType MOSFETConstructionConstruction
VGS is set to 0V by the direct
connection from one terminal to
the other.
VDS is applied across the drain-to-
source terminals.
The result is an attraction for the
positive potential at the drain by the
free electron of the n-channel and a
current similar to that established
through the channel of the JFET.
In the figure, VGS has been set at a
negative voltage (-1V)
DepletionDepletion--Type MOSFETType MOSFETConstructionConstruction
Negative potential at gate will tend to pressureelectron towards the p-type substrate andattract holes from the p-type substrate.
Depending on negative bias established byVGS, a level recombination betweenelectron and hoes will occur.--- it willreduce the number of free electron in then-channel available for conduction.
The more negative bias, the higher therate of recombination
ID decrease, negative bias for VGS increase
Basic OperationBasic Operation
A Depletion MOSFET can operate in two modes: Depletion or Enhancement mode.
DepletionDepletion--type MOSFET in Depletiontype MOSFET in DepletionModeMode
Depletion modeThe characteristics are similar to theJFET.When VGS = 0V, ID = IDSSWhen VGS < 0V, ID < IDSSThe formula used to plot the TransferCurve still applies:
2
P
GSDSSD )
V
V(1II
DepletionDepletion--type MOSFET in Enhancementtype MOSFET in EnhancementModeMode
Enhancement modeVGS > 0V, ID increases above IDSSThe formula used to plot theTransfer Curve still applies:
(note that VGS is now a positivepolarity)
2
P
GSDSSD )
V
V(1II
pp--Channel DepletionChannel Depletion--Type MOSFETType MOSFET
The p-channel Depletion-type MOSFET is similar to the n-channel exceptthat the voltage polarities and current directions are reversed.
SymbolsSymbols
EnhancementEnhancement--Type MOSFET ConstructionType MOSFET Construction
The Drain (D) and Source (S) connect to the to n-doped regions.These n-doped regions are connected via an n-channel. TheGate (G) connects to the p-doped substrate via a thin insulatinglayer of SiO2. There is no channel. The n-doped material lies
on a p-doped substrate that may have an additional terminalconnection called SS.
EnhancementEnhancement--Type MOSFETType MOSFETConstructionConstruction
VGS=0, VDS some value, the absence of an n-channel will result in acurrent of effectively 0A
VDS some positive voltage, VGS=0V, and terminal SS is directlyconnected to the source, there are in fact 2 reversed-biased p-njunction between the n-doped regions and p substrate to opposeany significant flow between drain and source.
VDS and VGS have been set at some positive voltage greater than 0V,establishing the D and G at a positive potential with respect to thesource
The positive potential at the gate will pressure the holes in the psubstrate along the edge of the SiO2 layer to leave the area andenter deeper regions of the p-substrate
The result is a depletion region near the SiO2 insulating layer voidof holes
EnhancementEnhancement--Type MOSFETType MOSFETConstructionConstruction
The electrons will in the p substrate will be attracted to
the +G and accumulate in the region near the surface
of the SiO2 layer
The SiO2 layer and its insulating qualities will prevent
the negative carriers from being absorbed at the gate
terminal
VGS increase, the concentration of electrons near theSiO2 surface increase until eventually the induced n-type region can support a measurable flow between Dand S
The level of VGS that results in the significant increasein drain current is called the threshold voltage, VT.
VGS increase beyond the VT level the density of thecarriers in the induced channel will increase and ID alsoincrease
EnhancementEnhancement--Type MOSFETType MOSFETConstructionConstruction
If VGS constant and increase the
level of VDS, ID will eventually reach
a saturation level as occurred for
the JFET
Applying Kirchoffs voltage law tothe terminal voltage of the MOSFET
VDG = VDS- VGS
If VGS fixed at some value, 8V, VDSincreased from 2 5V, the VDG willdrop from -6V to -3V and the gatewill become less and less positivewith respect to the drain
EnhancementEnhancement--Type MOSFETType MOSFETConstructionConstruction
VGS is always positiveAs VGS increases, ID increasesBut if VGS is kept constant and VDS is
increased, then ID saturates (IDSS)
The saturation level, VDSsat isreached.
TGSDsat VVV
The Enhancement-type MOSFET only operates in the enhancement mode.
EnhancementEnhancement--Type MOSFETType MOSFETConstructionConstruction
To determine ID given VGS:
where VT = threshold voltage or voltage at which the MOSFET turns on.k = constant found in the specification sheet. k can also be determined byusing values at a specific point and the formula:
VDSsat can also be calculated:
2)( TGSD VVkI
2TGS(ON)
D(on)
)V(V
Ik
TGSDsat VVV
pp--Channel EnhancementChannel Enhancement--Type MOSFETsType MOSFETs
The p-channel Enhancement-type MOSFET is similar to the n-channel except that the voltage polarities and current directionsare reversed.
SymbolsSymbols
Specification SheetSpecification Sheet
MOSFET HandlingMOSFET Handling
MOSFETs are very static sensitive. Because of the verythin SiO2 layer between the external terminals and thelayers of the device, any small electrical discharge canstablish an unwanted conduction.
Protection: Always transport in a static sensitive bag
Always wear a static strap when handling MOSFETS
Apply voltage limiting devices between the Gate and Source,such as back-to-back Zeners to limit any transient voltage.
VMOSVMOS
VMOS Vertical MOSFET increases the surface area of thedevice.
Advantage:This allows the device to handle higher currents byproviding it more surface area to dissipate the heat.
VMOSs also have faster switching times.
CMOSCMOSCMOS Complementary MOSFET p-channel and n-channel MOSFET on the same
substrate.
Advantage:
Useful in logic circuit designs
Higher input impedance
Faster switching speeds
Lower operating power levels
Summary TableSummary Table