Fast and Area-Efficient Phase Conflict Detection and Correction in Standard-Cell Layouts Charles Chiang, Synopsys Andrew B. Kahng, UC San Diego Subarna

Fast and Area-Efficient Phase Conflict Detection and Correction in Standard-Cell Layouts

Charles Chiang, SynopsysAndrew B. Kahng, UC San DiegoSubarna Sinha, SynopsysXu Xu, UC San Diego

Outline Introduction of AAPSM AAPSM Conflict Detection AAPSM Conflict Correction Conclusions

AAPSM: Enabling TechnologyAlternating Aperture Phase Shift Mask (AAPSM): Phase-modulation at the mask level to increase resolution capabilities of optical lithography.

Mask

Wafer

AAPSM: Enabling TechnologyAlternating Aperture Phase Shift Mask (AAPSM): Phase-modulation at the mask level to increase resolution capabilities of optical lithography

Mask

180 o phase-shifter

Wafer

AAPSM: Enabling TechnologyAlternating Aperture Phase Shift Mask (AAPSM): Phase-modulation at the mask level to increase resolution capabilities of optical lithography.

Mask

180 o phase-shifter

0 180Shifters

Mask

Wafer

Wafer

Feature

0.11m

Printed using a 0.35 um nominal process

AAPSM: Enabling Technology

Benefits:- Smaller feature sizes.- Better optical resolution - Extend equipment life

Alternating Aperture Phase Shift Mask (AAPSM): Phase-modulation at the mask level to increase resolution capabilities of optical lithography.

Outline Introduction AAPSM Conflict Detection AAPSM Conflict Correction Conclusions

Additional Layout Rules Feature Rule:

Shifters of the same feature must have different phases

Overlapping Rule: Overlapping shifters must have the same phase

0 180

Feature

Shifters

Overlapping Shifters

Conflict: A pair of shifters violate the rules after phase assignment

Legal Layout: No conflicts

Conflict Detection Problem Formulation Conflict correction lead to increased area Given: A layout (a set of shifters) Conflict weights = area increase for

correcting the conflict Assign: phases to shifters To minimize the total area increase of all conflicts

Conflict Area increase after correction

AAPSM Conflict Detection FlowLayout

Conflict Cycle Graph Construction



Graph Planarization



Graph Planarization

Graph Legalization / Phase Assignment



Graph Planarization


Check Removed Edge During Planarization



Graph Planarization


Check Removed Edge During Planarization

Set of AAPSM conflicts for correction

Review of Work in Conflict Detection Conflict Graph Construction

Feature Graph (Kahng et al. ASPDAC 2003) Phase Conflict Graph (Chiang et al. DATE 2005) Conflict Cycle Graph (Non-bipartite Formulation)

Graph Legalization Iterative Voronoi Graph (Kahng et al. BACUS 98) T-join based bipartization for planar graph

(Berman et al. TCAD 2000) Spanning Tree-Based Algorithm (Kahng et al.

ASPDAC 2003) Modified T-join algorithm for non-bipartite graph

Conflict Cycle Graph Node represents a shifter Feature edge connects two nodes of the same feature

Nodes of the feature edge have different phases

Overlap edge connects overlapping nodes

Nodes of the overlap edge have the same phase

Edge weight = conflict weight Remove one edge = correct the corresponding conflict

Overlap edge

Feature edge

Conflict Cycle and Conflict Face Conflict cycle = cycle with odd # feature edges Legal cycle = cycle with even # feature edges

ConflictFact: Legal Layout No conflict cycles

Phase Conflict Graph

(DATE 2005)

9 edges

Conflict Cycle

Graph (Proposed)

5 edges

Comparison with Previous Graph

After removing

uncorrectable edges

2 edges

Uncorrectable edges can be removed with

non-bipartite formulation

Min-Weight Edge-DeletionFact: A planar graph has no conflict cycle if

Remove even number of edges for legal faces Remove odd number of edges for conflict faces

Legal FaceConflict Face

Min-Weight Edge-Deletion

Problem Formulation Given: A planar conflict cycle graph G(V,E) Find: a set of edges E’ to be deleted such that

For each legal face, the number of edges in E’ is even For each conflict face, the number of edges in E’ is odd

To minimize the total weight of edges in E’

Flow to optimally solve the problem Conflict cycle graph Dual graph (T-join problem) Dual graph Gadget graph (Perfect matching problem) From optimal matching solution edges to be deleted

Conflict Cycle Graph Dual Graph

12 3

56 face node

dual edgeedge

Conflict Graph

2

1

3

5 6

4

Dual Graph

Conflict face Conflict node Legal face Legal node

4

T-join Problem Formulation Given: A graph GD(V, E, T) (T is the set of all conflict nodes) Find: a set of edges E’ to be deleted such that

For each node v, the edge number in E’ is odd iff To minimize the total weight of edges in E’

12 3

56

Conflict Graph

42

1

3

5 6

4

Dual Graph

face node

dual edgeedge

Tv

Dual Graph Gadget Graph

node gadget2

13

5 6

4

Dual Graph

true nodeedge

T-join problem min-weight perfect matching

1

5

63

4

2

Gadget Graph

Perfect Matching

Perfect Matching

Delete edges 1 and 2+ Phase assignment1

2 3

5 64

12 3

56

4

1

5

63

4

2

1

5

63

4

2

Experiments Setup

Implement proposed algorithms in C Use 4X400M Ultra-Sparc II with 4G RAM Ten large industry testcases

90 nm designs # features from 10,274 to 159,070

Conflict Detection Results

5.9x

Faster

0

2

4

6

8

10

1 2 3 4 5 6 7 8 9 10

Speedup

Ten Test Cases

Conflict Detection Results# Conflicts

Ten Test Cases

0

5000

10000

15000

20000

25000

30000

1 2 3 4 5 6 7 8 9 10

Proposed

DATE 2005

3.88%

Reduction


Mask-level Conflict Correction

Modify shifters on mask. Split shifter region whenever two shifters of

opposite phase overlap.

• Pros: no design modification

• Cons: Increases mask complexity, correction not

always possible Can negatively affect process latitude

Split

Widen Feature

Increase width of certain features to make them non-critical

No shifters needed for

widened feature

Widen

• Pros: small change in layout

• Cons: performance degradation

Add Spacing

Insert vertical or horizontal gaps between overlapping shifters of different phases.

Spacing

• Pros: small performance penalty as width of gate features remains unchanged

• Cons: larger area increase

Our focus

Insert gap locally

Introduce new conflict

Local versus Global Spacing

Insert gap across the whole layout

Large area increase

PSM Conflict Correction

Divide layout into rows

Divide each row into cells

Original Layout


Insert gap across the cell to remove conflicts



Original Layout



Adjust cell distance to avoid new conflicts



Adjust row distance

Original Layout



Adjust cell distance to avoid new conflicts



Adjust row distance

Original LayoutModified Layout

Generalized Correction Scheme

1 2

3

54

6

H

V VV

H H H HH

1 2 3 54 6

Solve conflicts within each region From the bottom of the tree

Insert spacing along the slicing line to avoid the conflicts between features of different regions

Conflict Correction ResultsDesign Area Conflict %Area Increase

new old

1 25173 937 1.0 18.1

2 16397 995 4.5 23.1

3 31416 1589 4.0 26.8

4 25715 1724 4.8 28.8

5 40409 1720 3.3 32.1

6 61705 6257 4.3 57.4

7 58414 5100 4.7 59.1

8 94178 10141 6.0 80.2

9 14823 18657 7.1 >100


Conclusion AAPSM Conflict Detection:

First non-bipartite graph based approach 5.9x runtime improvement 3.88% conflict reduction

AAPSM Conflict Correction: Hierarchical layout modification Small area increase on the average ( 6.1% ) for

large testcases Future Work:

Incorporate feature widening as an option Timing-driven PSM conflict correction

Thank You!

Documents

Fast and Area-Efficient Phase Conflict Detection and Correction in Standard-Cell Layouts Charles Chiang, Synopsys Andrew B. Kahng, UC San Diego Subarna