Familiarization With Dsp Kit

8/11/2019 Familiarization With Dsp Kit

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FAMILIARIZATION WITH DSP KIT

DSP STARTER KIT

The Code Composer StudioTMIDE is a development environment that tightly integrates the

tools needed to create winning DSP applications. It is designed for the Texas Instruments TI! high

performance TMS"#$C%$$$ C%$$$! and digital signal processor DSP! platforms.

The Key components of the Code Compose St!d"o IDE "nc#!de$

o Tuning tools for optimi&ing applications

o C'C(( Compiler) *ssem+ly ,ptimi&er and -iner Code /eneration Tools!

o 0eal1Time ,perating System DSP'2I,S!

o *+ility to dynamically connect and disconnect from targets

o 0eal1Time Data Exchange +etween host and target 0TD3!

o 4pdate *dvisor

o Instruction Set Simulator

o *dvanced Event Triggering

o Data 5isuali&ation

The Code Composer Studio IDE 5ersion ".$ Tuning Edition! integrates all host and target

tools in a unified environment. It also simplifies DSP system configuration and application design

to help designers get started faster than ever +efore.

The Code Composer Studio IDE) an integral component of TI.s software strategy) includes

the features necessary to tae you through each step of the application development flow. *ll of

these features are provided in an integrated product allowing developers to focus their energy on

innovation.

Code Composer Studio Setup is a utility that is used to define the target +oard or simulator


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the user will use with the Code Composer Studio IDE. This information is called the system

configuration and consists of a device driver that handles communication with the target plus other

information and files that descri+e the characteristics of your target) such as the default memory

map. The Code Composer Studio IDE needs this information to esta+lish communication with

your target system and to determine which tools are applica+le for the given target.

*s DSP applications +ecome more complex) it is important to structure them in an

efficient) maintaina+le manner. This re6uires use of a real1time ernel that ena+les system

functions to +e allocated to different threads. The DSP'2I,S ernel provides an efficient set of

ernel) real1time analysis) and peripheral configuration services) eliminating the need to develop

and maintain custom DSP operating systems. DSP'2I,S is an integral part of the Code Composer

Studio IDE. The ernel o+7ect +rowser displays the state of operating system o+7ects such as tass

and semaphores!) and provides data on stac usage and stac overflow'underflow. Thesecapa+ilities mae it easier to de+ug applications and optimi&e usage of ,S and system resources.

DSP'2I,S consists of four parts8 a real1time ernel) real1time analysis services) peripheral

configuration li+raries) and a graphical configuration tool. 9or each supported processor)

DSP'2I,S includes a set of peripheral management functions and macros nown as the Chip

Support -i+rary CS-!. The CS- supports on1chip peripherals for all TMS"#$C:$$$ and

TMS"#$C%$$$ devices and is fully integrated into the DSP'2I,S Configuration tool. The CS-

supports +oth graphical and programmatic peripheral configuration and control) eliminating the

need to remem+er individual register flags settings or painstaingly calculate +itmaps.

Code Composer Studio IDE;s open plug1in architecture called

The Code Composer Studio IDE includes fully integrated code editing environment tunedfor writing C) C(( and DSP assem+ly code. The editor provides standard editing features such as8

eyword highlighting) printing) cut and paste) drag and drop) etc. The maximum num+er of lines

per file is #)=>?)>@")%>@ and the maximum num+er of characters per line is ":$$.

The Code Composer Studio compile tools shifts the +urden of optimi&ation from hand1coded

assem+ly to the C Compiler. Aith these tools it is possi+le to exploit the high performance of TI;s


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DSP platforms without ever writing hand1coded assem+ly.

De%!&&e

The Code Composer Studio de+ugger maes it easy to find and fix errors in realBtime

em+edded applications. 9or example) de+ugger commands ena+le you to control program

execution. De+ugger windows and dialogs allow you to view source code and trac the values of

program varia+les in memory and registers. 2reapoints ena+le you to stop execution at a specified

location and examine the current state of the program.

Re'#(T"me D't' E)ch'n&e *RTD+,

0TD3 allows designers to monitor continuously their systems and gain realBtime insights

into running applications. It also allows data to +e streamed with *ctive3Bcompliant application

such as Excel) -a+5IEA or M*T-*2. Ahen displaying 0TD3 data) host applications can readeither live or saved data. The IDE also supports 0TD3 with multiple processors on either the same

or different scan paths.

App#"c't"on Code T!n"n&

The Code Composer Studio IDE now offers a series of tools called Tuning Tools! to help

developers to optimi&e applications. These tools allow users to set goals and trac progress

towards goals +y collecting different sets of data. * new *dvice Aindow provides on1the1fly

recommendations a+out how to mae code meet user goals.

The IDE has two -ayouts) tuning layout and standard layout!) which can +e toggled from the

main tool+ar. Standard layout is the default) while tuning layout represented +y a tuning for icon

on the tool+ar! opens advice windows on the left side. The tuning layout focuses attention on the

optimi&ation needs of the user.s program. The advice window wals the user through the

optimi&ation'tuning process specific to the DSP device and a selected goal.

D't' -"s!'#".'t"on

Code Composer Studio IDE incorporates an advanced signal analysis interface that ena+les

developers to monitor signal data critically and thoroughly. The new features are useful indeveloping applications for communications) wireless) and image processing) as well as general

DSP applications. Time'fre6uency) Constellation plot) Eye diagram) Image display etc are the

various graphs that can +e drawn.

Re'#(T"me An'#ys"s

0eal1time analysis tools help developers to see time1related interactions +etween code


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sections. They can reveal su+tle real1time pro+lems that otherwise might go undetected. Code

Composer Studio IDE allows developers to pro+e) trace and monitor a DSP application while it

runs. Even after the program has halted) information already captured through real1time analysis

tools can provide invalua+le insight into the se6uence of events that led up to the current point of

execution.

/ene'# E)tens"on L'n&!'&e */EL,

The /eneral Extension -anguage /E-! is an interpretive language similar to C that lets

you create functions to extend Code Composer Studio IDE;s usefulness. *fter creating /E-

functions using the /E- grammar) you can load them into Code Composer Studio IDE. Aith /E-)

you can access actual'simulated target memory locations and add options to the IDE;s /E- menu.

/E- is particularly useful for automated testing.

CONCL0SION

Code Composer Studio IDE v".$ represents the evolution of the DSP development

environment. It contains functionality needed +y today;s larger) distri+uted) glo+al pro7ect teams.

2y reducing time spent on repetitive tass and tool development) the IDE gives the developer more

time to focus on innovation.


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SOFTWARE DE-ELOPMENT FLOW IN TMS PROCESSORS

Too#s Desc"pt"ons

The following list descri+es the tools that are shown in 9igure =1=8

The C1C22 comp"#e translates C'C(( source code into assem+ly language source code.

The compiler pacage includes the #"%'y(%!"#d!t"#"ty) with which you can +uild your

own runtime li+raries.

The 'ssem%#e translates assem+ly language source files into machine language C,99

o+7ect files. Source files can contain instructions) assem+ler directives) and macro

directives. ou can use assem+ler directives to control various aspects of the assem+ly

process) such as the source listing format) data alignment) and section content.The


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'ssem%#e translates assem+ly language source files into machine language C,99 o+7ect

files. The TMS"#$C:>x)::x tools include two assem+lers. The mnemonic assem+ler

accepts mnemonic assem+ly source files. The alge+raic assem+ler accepts alge+raic

assem+ly source files. Source files can contain instructions) assem+ler directives) and

macro directives. ou can use assem+ler directives to control various aspects of the

assem+ly process) such as the source listing format) data alignment) and section content.

The #"n3e com+ines relocata+le C,99 o+7ect files created +y the assem+ler! into a single

executa+le C,99 o+7ect module. *s it creates the executa+le module) it +inds sym+ols to

memory locations and resolves all references to those sym+ols. It also accepts archiver

li+rary mem+ers and output modules created +y a previous liner run. -iner directives

allow you to com+ine o+7ect file sections) +ind sections or sym+ols to addresses or within

memory ranges) and define or redefine glo+al sym+ols.

The 'ch"4e collects a group of files into a single archive file. 9or example) you can

collect several macros into a macro li+rary. The assem+ler searches the li+rary and uses the

mem+ers that are called as macros +y the source file. ou can also use the archiver to

collect a group of o+7ect files into an o+7ect li+rary. The liner includes in the li+rary the

mem+ers that resolve external references during the lin.

The mnemon"c(to('#&e%'"c 'ssem%#y t'ns#'to !t"#"ty converts an assem+ly language

source file containing mnemonic instructions to an assem+ly language source file

containing alge+raic instructions.

The #"%'y(%!"#d !t"#"ty +uilds your own customi&ed C'C(( runtime1support li+rary.

Standard runtime1support li+rary functions are provided as source code in rts.src and as

o+7ect code in rts.li+.

The TMS"#$C:>x)::x Code Composer Studio de%!&&eaccepts C,99 files as input) +ut

most EP0,M programmers do not.

The he) con4es"on !t"#"ty converts a C,99 o+7ect file into TI1tagged) Intel) Motorola) orTetronixo+7ect format. The converted file can +e downloaded to an EP0,Mprogrammer.

The '%so#!te #"ste accepts lined o+7ect files as input and creates .a+s files as output. ou

assem+le .a+s files to produce a listing that contains a+solute rather than relative addresses.

Aithout the a+solute lister) producing such a listing would +e tedious and re6uire many

manual operations.


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The coss(efeence #"ste uses o+7ect files to produce a cross1reference listing showing

sym+ols) their definitions) and their references in the lined source files.

The C,99 d"s'ssem%#eonly in c::x! accepts o+7ect files and executa+le files as input

and produces an assem+ly listing as output. This listing shows assem+ly instructions) their

opcodes) and the section program counter values. The disassem+ly listing is useful for

viewing the8

*ssem+ly instructions and their si&e

Encoding of assem+ly instructions

,utput of a lined executa+le file

The o%5ect f"#e d"sp#'y !t"#"typrints the contents of o+7ect files) executa+le files) and'or

archive li+raries in +oth human reada+le and 3M- formats.

The n'me !t"#"ty only in c::x! prints a list of names defined and referenced in a C,99

o+7ect or an executa+le file.

The st"p !t"#"ty removes sym+ol ta+le and de+ugging information from o+7ect and

executa+le files.

The purpose of this development process is to produce a module that can +e executed in a C:>x

target system. ou can use one of several de+ugging tools to refine and correct your code.

*vaila+le products include8

*n instruction1accurate software simulator

*n evaluation module E5M!

*n 3DS emulator

These de+ugging tools are accessed within Code Composer Studio.


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TMS 678 DSP PROCESSORS

TMS"#$ DSP family consists of fixed1point) floating1point) and multiprocessor digital

signal processors DSPs!. The TMS"#$ DSP architecture is designed specifically for real1timesignal processing. The following characteristics mae this family the ideal choice for a wide range

of processing applications8

1 5ery flexi+le instruction set

1 Inherent operational flexi+ility

1 igh1speed performance

1 Innovative parallel architecture

1 Cost1effectiveness

1 C1friendly architecture

Today) the TMS"#$ DSP family consists of three supported DSP platforms8

TMS"#$C#$$$) TMS"#$C:$$$) and TMS"#$C%$$$. Aithin the C:$$$ DSP platform there are

three generations) the TMS"#$C:x) TMS"#$C:>x) and TMS"#$C::x.

The C:>x DSP has a high degree of operational flexi+ility and speed. It com+ines an

advanced modified arvard architecture with one program memory +us) three data memory

+uses) and four address +uses!) a CP4 with application1specific hardware logic) on1chip memory)

on1chip peripherals) and a highly speciali&ed instruction set. Spinoff devices that com+ine the

C:>x CP4 with customi&ed on1chip memory and peripheral configurations have +een) and

continue to +e) developed for speciali&ed areas of the electronics maret.

The C:>x devices offer these advantages8

Enhanced arvard architecture +uilt around one program +us) three data +uses) and four

address +uses for increased performance and versatility

*dvanced CP4 design with a high degree of parallelism and application specific hardware

logic for increased performance

* highly speciali&ed instruction set for faster algorithms and for optimi&ed high1level

language operation


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Modular architecture design for fast development of spinoff devices

*dvanced IC processing technology for increased performance and low power

consumption

-ow power consumption and increased radiation hardness +ecause of new static designtechni6ues

9:6 TMS678C;G1words program) %>G1words data)

and %>G1words I',!) with extended program memory in the C:>@) C:>F) C:>$#) C:>=$)

and C:>#$.

Inst!ct"on set

Single1instruction repeat and +loc repeat operations

2loc memory move instructions for +etter program and data management

Instructions with a "#1+it long operand

Instructions with #1 or "1operand simultaneous reads


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*rithmetic instructions with parallel store and parallel load

Conditional1store instructions

9ast return from interrupt

,n1chip peripherals

Software1programma+le wait1state generator

Programma+le +an1switching logic

,n1chip phase1loced loop P--! cloc generator with internal oscillator or external cloc

source. Aith the external cloc source) there are several multiplier values availa+le from

one of the device

Speed$ #:'#$'=:'=#.:'=$1ns execution time for a single1cycle) fixed1point+ instruction >$

MIPS':$ MIPS'%% MIPS'@$ MIPS'=$$ MIPS!8

Po=e

Power consumption control with ID-E =) ID-E #) and ID-E " instructions for power1down

modes

Control to disa+le the C-G,4T signal

Em!#'t"on8 IEEE Standard ==>F.= +oundary scan logic interfaced to on1chip scan1+ased emulation

logic

Intod!ct"on to the TMS678C;;)

The TMS"#$C::x digital signal processor DSP! represents the latest generation of ;C:$$$

DSPs from Texas Instruments. The ;C::x is +uilt on the proven legacy of the ;C:>x and is source

code compati+le with the ;C:>x) protecting the customer;s software investment. 9ollowing the

trends set +y the;C:>x) the ;C::x is optimi&ed for power efficiency) low system cost) and +est1in1

class performance for tight power +udgets. The TMS"#$C::x is a low1power) general1purpose

signal processing architecture with an instruction set optimi&ed for efficiency) ease of use) and

compactness. *lthough the ;C::x instruction set is much more powerful and flexi+le than that of

previous generations) the architecture is completely compati+le with TMS"#$C:>x instructions.

This allows programs developed on the ;C:>x to +e re1assem+led and executed on the ;C::x with

+it1exact results. * highly parallel architecture complements the ;C::x instruction set


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and ena+les increased code density while reducing the num+er of cycles re6uired per operation.

The union of an efficient) compact instruction set with a highly parallel architecture provides a

high1performance signal processing engine while minimi&ing code si&e and power consumption.

The ey features of TMS"#$C::x are

* "# x =%1+it Instruction +uffer 6ueue

Two =?1+it x=?1+it M*C units

,ne >$1+it *-4

,ne >$1+it 2arrel Shifter

,ne =%1+it *-4

9our >$1+it accumulators

Twelve independent +uses8

Three data read +uses

Two data write +uses

9ive data address +uses

,ne program read +us

,ne program address +us

4ser1configura+le ID-E Domains

The TMS"#$C%$$$ digital signal processor DSP! platform is part of the TMS"#$ DSP

family. The TMS"#$C%#xxDSP generation and the TMS"#$C%>x DSP generation comprise fixed1

point devices in the C%$$$ DSP platform) and the TMS"#$C%?x DSP generation comprises

floating point devices in the C%$$$ DSP platform. The TMS"#$C%#x and TMS"#$C%>x DSPs are

code1compati+le. The TMS"#$C%#x and TMS"#$C%?x DSPs are code1compati+le. *ll three use

the 5elociTI architecture) a high1performance) advanced 5-IA very long instruction word!

architecture) maing these DSPs excellent choices for multichannel and multifunction applications.

=1: Introduction

The C%$$$ devices execute up to eight "#1+it instructions per cycle. The C%#x'C%?x

device;s core CP4 consists of "# general1purpose registers of "#1+it word length and eight


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functional units. The C%>x core CP4 consists of %> general1purpose "#1+it registers and eight

functional units. These eight functional units contain8

Two multipliers

Six *-4s

The C%$$$ generation has a complete set of optimi&ed development tools) including an

efficient C compiler) an assem+ly optimi&er for simplified assem+ly language programming and

scheduling) and a Aindows +ased de+ugger interface for visi+ility into source code execution

characteristics. * hardware emulation +oard) compati+le with the TI 3DS:=$ emulator interface) is

also availa+le. This tool complies with IEEE Standard ==>F.=H=FF$) IEEE Standard Test *ccess

Port and 2oundary1Scan *rchitecture.

9eatures of the C%$$$ devices include8

*dvanced 5-IA CP4 with eight functional units) including two multipliers and six

arithmetic units

Executes up to eight instructions per cycle for up to ten times the performance of typical

DSPs

*llows designers to develop highly effective 0ISC1lie code for fast development time

Instruction pacing

/ives code si&e e6uivalence for eight instructions executed serially or in parallel

0educes code si&e) program fetches) and power consumption

Conditional execution of all instructions

0educes costly +ranching

Increases parallelism for higher sustained performance

Efficient code execution on independent functional units

Industry;s most efficient C compiler on DSP +enchmar suite

Industry;s first assem+ly optimi&er for fast development and improved paralleli&ation

@'=%'"#1+it data support) providing efficient memory support for a variety of applications

>$1+it arithmetic options add extra precision for vocoders and other computationally

intensive applications

Fe't!es 'nd Opt"ons of the TMS678C>7)1C>?)


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Saturation and normali&ation provide support for ey arithmetic operations

9ield manipulation and instruction extract) set) clear) and +it counting support common

operation found in control and data manipulation applications.

The C%?x has these additional features8

ardware support for single1precision "#1+it! and dou+le1precision %>1+it! IEEE floating1

point operations

"# x "#1+it integer multiply with "#1 or %>1+it result.

The C%>x additional features include8

Each multiplier can perform two =% x =%1+it or four @ x @ +it multiplies every cloc cycle.

uad @1+it and dual =%1+it instruction set extensions with data flow support

Support for non1aligned "#1+it word! and %>1+it dou+le word! memory accesses

Special communication1specific instructions have +een added to address common

operations in error1correcting codes.


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2it count and rotate hardware extends support for +it1level algorithms.

Documents

Familiarization With Dsp Kit