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FlexTiles:Heterogeneous Manycore with Self Adaptive
CapabilitiesFall school 2012
Fabrice Lemonnier, 2nd of October, 2012
2 /2 /
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Industrial issues
Embedded Real-Time Applications
low power consumption
low volume
Adapt to environment dynamicity, flexibility & dependability
Smart cameraCognitive radio UAV
Time To Market
adaptable product line
Fault-tolerance
3 /3 /
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Challenges
address increasing application dynamicity
-using self-adaptive capabilities
increase software development productivity of manycore
-reduce Time to Market
-reuse of legacy software
-reuse of hardware IPs.
increase accessibility to manycore technologies
-propose a European alternative on the worldwide market of this technology
increase energy efficiency
-for embedded systems
-and High-Performance Computing (HPC) systems.
4 /4 /
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ALE
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Manycore: main issue for industry
Programmability: Time to market
Development cost
Reuse of legacy software
Why take so many risks with manycore ?
Most of industrials want to continue like the past few years: compile without thinking (as much as possible) !
No more Free lunch ! In the near futurethe processors will all be made of multi-cores and many-cores.
Nevertheless, can we provide solutions to ease the programmation ?
5 /5 /
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ALE
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Our proposition
A 3D stacked chip based on:
• A manycore layer
• A FPGA layer
6 /6 /
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Self adaptive capabilities, why?
• To be able to dynamically adapt the architecture to the current request of the application for the same power consumption
• Evolution of the technology: reduction of the reliability and the yield of current and future sub-micron technologies -> adaptation depending on the faulty cores.
• Increase energy efficiency
• Increase the programming efficiency by taking a part of the mapping complexity at runtime
• Temperature management -> adaptation of the application mapping
7 /7 /
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Objectives of the project
1) develop a heterogeneous manycore based on available IPs
definition of generic interfaces
2) improve programming efficiency of heterogeneous manycores
3) self-adaptation
thanks to virtualisation layer
4) develop a dynamic reconfigurable technology
pre-emption and relocation capabilities.
8 /8 /
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ALE
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Existing solutions
• TILE-Gx™ 8000 from Tilera (16 to 100 cores)
• MPPA® from Kalray (256 to 1024 cores)
• PicoArray from Picochip (248 cores)
• P2012 from STM
Existing manycores are only compliant with static allocation and sheduling
9 /9 /
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ALE
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Research projects
Projects:
• Morpheus (FP6 project): heterogeneous chip with 3 FPGA technologies managed by an ARM processor.
• FOSFOR (ANR project): distributed OS for heterogeneous multicore on FPGA
• Main drawbacks:
• the scalability of the solution
• the limitation of the size of the FPGA area
10 /10 /
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11 /11 /
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Holistic Approach
Model of programmation
Model of Computation
Model of Execution
Flexible Hardware
Common Interfaces
strategies of relocation
Optimisation tools
Programming efficiency
self adaptive capabilities
12 /12 /
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ALE
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Programming efficiency: common execution model
Master Nodes
Slave Nodes
GPP
eFPGA nodesDSP nodes
GPP Node
acceleratornode
NI
NoC
NI
Accelerator Interface (AI)
accrequests
control / status
DMA
DMArequests
data
Master-slave execution model
13 /13 /
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MoC
Act
: Actor
: static cluster
Act
Act Act
Act
Act ActAct
Act
: Clusters group managed by one state management
: Cluster group input/output
: Cluster input/output
• Optimisation and parallelisation tools can only be used on static applications.
• Necessity to identify static clusters inside the applications based on SDF/CSDF MoC
SDF, CSDF MoC
actor: consume and produce token of data with predefined and static rules
14 /14 /
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ALE
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Application (C code)
C to SpearDE representation
Conversion (Cosy)
Data parallelisation Mapping (SpearDE)
Graphic input
(manual)
Streaming optimisation (Cosy)
Compilation (Cosy)
executable code
architecture representation
Master coresSlave cores
Library of IPs
Tool flow
The Tool flow is based on 2 main tools:• Thales tool: SpearDE• ACE tool: Cosy
15 /15 /
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ALE
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Dynamic relocation
I/O
NoC
GPP
Acc1
GPP
Acc1
GPP
Acc3
GPP
Acc4I/O
GPP
DDR ctrl
GPP
thread1 thread2 thread3 thread4
API
thread1 thread2
thread1 thread2thread3 thread4
API
thread1
thread2
Application
Tools for parallelisation and mapping
Acc1
Acc1
Acc3
Acc4
Dynamic relocation
Tools for parallelisation and mapping
runtime
compile time
16 /16 /
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ALE
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Tem
plat
e t
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vers
ion
7.0
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Da
te /R
éfé
renc
e
Holistic Approach
Model of programmation
Model of Computation
Model of Execution
Flexible Hardware
Common Interfaces
strategies of relocation
Optimisation tools
Programming efficiency
self adaptive capabilities
17 /17 /
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ALE
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ALE
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e
Modularity and scalability: common interfaces
Homogeneous GPP nodes
Heterogeneous accelerators
nodes
GPP Node
AI
DSPNode
NI
GPP Node
NI
NoC
NI NI NI
AI AI
NI
Config. Ctrl.
DDR Ctrl.
NI
GPP Node
NI
I/O
NI
Generic Interfaces
eFPGA Domain (Reconfigurable HW acc.)
Dedicated Accelerator
Node
Dedicated Accelerator
Node
18 /18 /
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ALE
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ALE
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éfé
renc
e
Act
: Actor
: static cluster
Act
Act Act
Act
Act ActAct
state 1
state 2
state 3
states management
Act
: Clusters group managed by one state management
: Cluster group input/output
: Cluster input/output
cluster groupevent
Dynamicity: the cluster group
19 /19 /
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ALE
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e
Dynamicity at cluster group level
Act
sensordata : Actor
: static cluster
states managementevent
Act
state 1
nop
state 1
states management
states management
Act Act
Act
state 2
Act
Act
states managementevent
Act Act
Act
state 1
Act
Act
Act
: Clusters group managed by one state management
states management
Act Act
Act
state 1
Act
Actscatter
Act Act
Act
state 1.1
Act
Act
Act Act
Act
state 1.2
Act
Act
gather
: Cluster group input/output
: Cluster input/output
sensordata
cluster group 3
cluster group 4
cluster group 5
cluster group 2
cluster group 1 event
event
event
20 /20 /
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ALE
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éfé
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e
Start a new part of the application
Act
sensordata : Actor
: static cluster
states managementevent
Act
state 1
states management
states management
Act Act
Act
state 2
Act
Act
states managementevent
Act Act
Act
state 1
Act
Act
Act
: Clusters group managed by one state management
states management
Act Act
Act
state 1
Act
Actscatter
Act Act
Act
state 1.1
Act
Act
Act Act
Act
state 1.2
Act
Act
gather
: Cluster group input/output
: Cluster input/output
sensordata
cluster group 3
cluster group 4
cluster group 5
cluster group 2
cluster group 1 event
event
event
Act Act
Act
state 2
Act
21 /21 /
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ALE
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ALE
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éfé
renc
e
Modification of the behaviour
sensordata : Actor
: static cluster
states managementevent
states management
states management
Act Act
Act
state 2
Act
Act
states managementevent
Act Act
Act
state 1
Act
Act
Act
: Clusters group managed by one state management
states management
Act Act
Act
state 1
Act
Actscatter
Act Act
Act
state 1.1
Act
Act
Act Act
Act
state 1.2
Act
Act
gather
: Cluster group input/output
: Cluster input/output
sensordata
cluster group 3
cluster group 4
cluster group 5
cluster group 2
cluster group 1 event
event
event
Act Act
Act
state 2
ActAct Act
Act
state 2
22 /22 /
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Modification of the parallelisation level
sensordata : Actor
: static cluster
states managementevent
states management
states management
Act Act
Act
state 2
Act
Act
states managementevent
Act Act
Act
state 1
Act
Act
Act
: Clusters group managed by one state management
states management
Act Act
Act
state 1
Act
Actscatter
gather
: Cluster group input/output
: Cluster input/output
sensordata
cluster group 3
cluster group 4
cluster group 5
cluster group 2
cluster group 1 event
event
event
Act Act
Act
state 2
ActAct Act
Act
state 2
23 /23 /
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éfé
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Dynamicity at cluster level
A1.1 A2.1
A3
A5
A4
A1.2 A2.2
A1.3 A2.3
A1.4 A2.4
• FPGA
• GPP
• FPGA
cluster1p1
A1.1 A2.1
A3
A5
A4
A1.2 A2.2
A1.3 A2.3
A1.4 A2.4
• DSP • G
PP
• DSP
cluster1p1
A1.1 A2.1
A3
A5
A4
A1.2 A2.2
A1.3 A2.3
A1.4 A2.4
• DSP • D
SP
• DSP
cluster1p1
timerelocation relocation relocation
24 /24 /
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ALE
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éfé
renc
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ApplicationAllocation file
Network services
SchedulerCluster
mngtTask mngt
Memory mngt
Communication management
Monitoring ActuatorsSemaphoreevent mngt
Virtualisation services
Self adaptive services
DIAGNOSISO = F(L)
ACTION
SYSTEM
MONITORING
A Virtualisation Layer for self adaptive capabilities
Virtualisation services provide a high level of abstraction of the heterogeneous resources: communication and accelerators managementSelf adaptive services define actions to be taken depending on events (monitoring): relocation, DVFS,…
VirtualisationLayer
kernel
25 /25 /
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ALE
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éfé
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Self-adaptation
Heterogeneous Hardware
Controlled byKernel and
Virtualization layerEthernet
IMDCT MatrixMult
Accelerator/Virtual Code
Dynamicallocation / binding
DIAGNOSISO = F(L)
ACTION
SYSTEM
MONITORING
Mapping
GPP Node
AI
DSPNode
NI
GPP Node
NI
NoC
NI NI NI
AI AI
NI
Config. Ctrl.
DDR Ctrl.
NI
GPP Node
NI
I/O
NI
Dedicated Accelerator
Node
Dedicated Accelerator
Node
eFPGA Domain (Reconfigurable HW acc.)
26 /26 /
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éfé
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e
Tile Tile Tile
Tile Tile Tile
Tile Tile Tile
New dynamic reconfigurable technology
Homogeneous manycore
NoC
FlexTiles: a 3D stack chip
3D stacked reconfigurable layer
27 /27 /
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éfé
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Tile Tile Tile
Tile Tile Tile
Tile Tile Tile
New dynamic reconfigurable technology
3D stacked reconfigurable layer
Homogeneous manycore
NoC
FlexTiles: a 3D stack chip
Map Accelerated functions
28 /28 /
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ALE
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éfé
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Tile Tile Tile
Tile Tile Tile
Tile Tile Tile
New dynamic reconfigurable technology
3D stacked reconfigurable layer
Homogeneous manycore
NoC
FlexTiles: a 3D stack chip
Duplicate
29 /29 /
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éfé
renc
e
Tile Tile Tile
Tile Tile Tile
Tile Tile Tile
New dynamic reconfigurable technology
3D stacked reconfigurable layer
Homogeneous manycore
NoC
FlexTiles: a 3D stack chip
Migrate
30 /30 /
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éfé
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NoC QoS
chip
GPP
icache
dcache
dLMEM GPP
NI
iLMEM eFPGA
eFPGA
dLMEM eFPGA
iLMEM DSP
DSP
dLMEM DSP
DDR
NI+
DDR ctrl
on chipshMEM
NI NI
controlNOC
bitstreamNOC
dataNOC
instructionNOC
test/debugNOC
31 /31 /
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Conclusion
Parallelisation is the only way to reach HPC for low power consumption.
But parallelisation is not enough, customisation is also necessary
Only affordable for high volumes
Reconfigurable customisation is the solution:
Increase accessibility to heterogeneous manycore technology
Offers self-adaptive capabilities
32 /32 /
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éfé
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FlexTiles: FP7 project
FlexTileswww.flextiles.eu
Project coordinator: THALES
Funding budget: 3,670,000€
Starting date: 15/10/2011
Duration: 36 months
33 /33 /
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éfé
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e
Consortium and questions
Partners & Third Party
Country Main scientific and technical contributions
THALES France Infrastructure and applications
KIT Germany Virtualisation layer
TUE Netherlands Kernel ; NoC
CSEM Switzerland DSP
CEA France NoC ; 3D stacking
UR1 France Reconfigurable technology
SUNDANCE United Kingdom
FPGA Demonstrator
ACE Netherlands Parallelisation and compilation Tools
8 partners in 5 countries
34 /34 /
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With FlexTiles, Industry will be able to…
Take the plunge into the manycore world !
35 /35 /
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éfé
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Thank you for your attention
Questions ?
