Ain Shams Engineering Journal (2016) 7, 265–274

Ain Shams University

Ain Shams Engineering Journal

www.elsevier.com/locate/asejwww.sciencedirect.com

ELECTRICAL ENGINEERING

Extended SVM algorithms for multilevel

trans-Z-source inverter

* Corresponding author. Tel.: +98 9141186476.

E-mail addresses: a_baghbany@azaruniv.edu (A. Baghbany Oskouei),

m.banaei@azaruniv.edu (M.R. Banaei), sabahi@tabrizu.ac.ir

(M. Sabahi).

Peer review under responsibility of Ain Shams University.

Production and hosting by Elsevier

http://dx.doi.org/10.1016/j.asej.2015.04.0022090-4479 � 2015 Faculty of Engineering, Ain Shams University. Production and hosting by Elsevier B.V.This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).

Aida Baghbany Oskouei a,*, Mohamad Reza Banaei a, Mehran Sabahi b

a Department of Electrical Engineering, Azarbaijan Shahid Madani University, Tabriz, Iranb Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran

Received 25 October 2014; revised 18 March 2015; accepted 4 April 2015Available online 13 May 2015

KEYWORDS

SVM algorithm;

Cascaded H-bridge multi-

level trans-Z-source inverter;

Accuracy;

Number of switching;

THD

Abstract This paper suggests extended algorithms for multilevel trans-Z-source inverter. These

algorithms are based on space vector modulation (SVM), which works with high switching fre-

quency and does not generate the mean value of the desired load voltage in every switching interval.

In this topology the output voltage is not limited to dc voltage source similar to traditional cascaded

multilevel inverter and can be increased with trans-Z-network shoot-through state control. Besides,

it is more reliable against short circuit, and due to several number of dc sources in each phase of this

topology, it is possible to use it in hybrid renewable energy. Proposed SVM algorithms include the

following: Combined modulation algorithm (SVPWM) and shoot-through implementation in dwell

times of voltage vectors algorithm. These algorithms are compared from viewpoint of simplicity,

accuracy, number of switching, and THD. Simulation and experimental results are presented to

demonstrate the expected representations.� 2015 Faculty of Engineering, Ain Shams University. Production and hosting by Elsevier B.V. This is an

open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).

1. Introduction

In recent years, multilevel inverters have received more andmore attention because of their capability of high voltage oper-ation, high efficiency and low electromagnetic interference(EMI) [1–5]. Multilevel inverter synthesizes a desired output

voltage from several levels of dc voltage sources as inputs.With increasing the number of dc voltage sources, the

waveform of voltage output approaches a nearly sinusoidalwaveform while using a fundamental frequency switchingscheme [1].

Among all the switching algorithms proposed in thepapers for multilevel converters, space vector modulation(SVM) seems most promising since it offers a great flexibility

in optimizing switching pattern design and it is also well sui-ted for digital implementation [5,6]. This control strategyworks with high switching frequency and does not generatethe mean value of the desired load voltage in every switching

interval [5,6].Despite the represented advantages, multilevel inverters

output voltage amplitude is limited to dc sources voltage

Figure 1 Trans-Z-source inverter structure.

Figure 2 Configuration of the cascaded H-bridge multilevel

trans-Z-source inverter.

Figure 3 Configuration of the cascaded H-bridge 5-level trans-

Z-source inverter.

266 A. Baghbany Oskouei et al.

summation [2]. For the boost or buck of multilevel outputvoltage a dc/dc converter is needed. Z-source converter

(ZSC) a novel power converter with both buck and boostcapabilities first proposed in 2002 [7]. Operated in invertermode, one of the salient features of ZSC is that the ac voltage

can be controlled either higher or lower than the voltage limitimposed by a conventional voltage source inverter (VSI), giv-ing a large degree of freedom to ac machine electromagnetic

design and control [8,9]. Also, the quasi-Z-source inverter isa kind of improved topology based on Z-source inverter, isproposed in [10,11]. Recently, [12] proposes two current-fedtrans-Z-source inverters that are capable of reaching wider

voltage boost range and bidirectional power flow with a singlediode. A wider output voltage range is essential to some appli-cations such as HEV/EV motor drives. [13] uses the attractive

advantages of quasi-Z-source cascaded multilevel inverter in

application to photovoltaic (PV) power system, andanalyzes modeling, impedance design, and efficiency ofquasi-Z-Source module in cascaded multilevel photovoltaic

power system. An effective control method, includingsystem-level control and pulse width modulation (PWM) forquasi-Z-source cascade multilevel inverter based grid-tie

photovoltaic (PV) power system is proposed in [14].This paper proposes two new algorithms for multilevel

trans-Z-source inverter. These algorithms based on SVM and

employ cascaded H-bridge topology as a multilevel invertercombined with trans-Z-source inverter. Sections 2 and 3 pre-sent the working principle of extended SVM algorithms andfinally, simulation results validate the algorithms and compare

them.

2. Cascaded H-bridge multilevel trans-Z-source inverter

The trans-Z-source inverter structure is shown in Fig. 1. Trans-Z-source inverter operates in two modes: non-shoot-throughand shoot-through state. With the analysis of circuit output

voltage of trans-Z-network, vi is obtained as [12] follows:

vi ¼1

1� ð1þ nÞ Tst

T

!Vdc ð1Þ

B ¼ 1

1� ð1þ nÞ Tst

T

ð2Þ

Table 1 Possible states of switches.

Voltage level Output

voltage

ON switches

Level 2 (non-shoot-through) 2Vi S3, S4, S5, S6Level 1 (non-shoot-through) Vi S1, S3, S5, S6Level 1 (shoot-through) Vi S1, S2, S3, S4, S5, S6Level 1 (non-shoot-through) Vi S3, S4, S5, S7Level 1 (shoot-through) Vi S3, S4, S5, S6, S7, S8Level 0 (non-shoot-through) 0 S3, S4, S7, S8Level 0 (non-shoot-through) 0 S1, S3, S5, S7Level 0 (shoot-through) 0 S1, S2, S3, S4, S5, S7Level 0 (shoot-through) 0 S1, S3, S5, S6, S7, S8Level �1 (non-shoot-

through)

�Vi S1, S3, S7, S8

Level �1 (shoot-through) �Vi S1, S2, S3, S4, S7, S8Level �1 (non-shoot-

through)

�Vi S1, S2, S5, S7

Level �1 (shoot-through) �Vi S1, S2, S5, S6, S7, S8Level �2 (non-shoot-

through)

�2Vi S1, S2, S7, S8

Figure 4 Space vectors for the 3, 5, 7, and 9-level inverters.

Figure 5 SVPWM method for shoot-through state control of

trans-Z-source inverter.

Input

Start

Is condition pulse 1?

Is the H-bridge in zero

state?

Do not implement shoot-through state

Implement shoot-through state

End

No

No

Yes

Yes

Figure 6 Flowchart of shoot-through implementation in dwell

times of voltage vectors algorithm in each H-bridge.

SVM algorithms for trans-Z-source inverter 267

where T is period of switching, Tst is the total shoot-throughstate period, and B is boost factor.

During shoot-through time, the current of L2 is equal tocurrent of C, and then the capacitor voltage decreases linearly.In other words, the capacitor is discharged by the transformer

during shoot-through time. The capacitor value can be calcu-lated as follows:

CZ ¼IL2Tst

DVC

ð3Þ

where IL2 is the average current of secondary of the trans-former and DVC is the assumed voltage ripple of capacitor.

Fig. 2 shows the cascaded H-bridge multilevel trans-Z-source inverter. The output voltage is achieved by summingthe output voltages of bridges:

vo ¼ vo1 þ � � � þ von ð4Þ

Each H-bridge can generate three different voltage outputs

+vi, 0, �vi. The number of output voltage levels is 2 m+ 1where m is the number of Z impedances or dc voltage sources[2].

This configuration, unlike the traditional multilevel invert-

ers, has one extra shoot-through state (or vector) when the ter-minals of each H-bridge are shorted through both the upperand lower devices of any one leg or any two legs.

Fig. 3 shows the cascaded H-bridge 5-level trans-Z-sourceinverter and Table 1 indicates the values of vo for possiblestates of switches. Because of two number of dc sources in each

phase of this topology, it is possible to use it in hybrid renew-able energy.

Table 2 System parameters.

Vdc 100 v

C 2100 lFn 1

Nominal frequency 50 Hz

Load resistance 100 XLoad inductance 26 mH

Carrier frequency in SVPWM algorithm 1 kHz

Figure 7 Voltage waveforms in B = 1; (a) output voltage of trans-Z-network; (b) capacitor voltage; (c) load voltage; (d) load current; (e)

harmonic spectra of load voltage; and (f) harmonic spectra of load current.

268 A. Baghbany Oskouei et al.

3. Proposed SVM algorithms

Any three-phase quantities, e.g., three-phase voltages or cur-rents can be represented by a space vector in d–q plane viaPark’s transformation. The vector starts from the origin

and ends at a certain point so that the length and phase angleof vector together represent the instantaneous values of par-ticular three-phase quantities. If the three-phase quantitiesare sinusoidal functions of time and are symmetrical, the vec-

tor will be rotating at a constant angular velocity with a con-stant length and, so, the locus of vector forms a circle. Inother words, a rotating voltage vector can represent three-

phase sinusoidal voltages mathematically. If the three-phasequantities are not symmetrical, the Park’s transformationgives not only d and q components, but also a zero-

sequence component that is the mean value of three-phasequantities [1,15]. Fig. 4 shows space vectors for the 3, 5, 7,and 9-level inverters [5].

This control method is based on the voltage vector gener-

ated by the inverter, defined as [5,6] follows:

~vðtÞ ¼ 2

3vANðtÞ þ avBNðtÞ þ a2vCNðtÞ� �

ð5Þ

where vAN, vBN, and vCN are the voltages of terminals A, B andC with respect to the neutral N and a is the complex operator.Considering the cascaded H-bridge 7-level inverter with 3 cellsper phase, each phase can generate 7 different voltages. The

representation of the voltage vectors in the complex plane con-siders that:

~vðtÞ ¼ vd þ jvq ð6Þ

where vd and vq correspond to the components of ~vðtÞ in the d

and q axes, respectively. These components are given byfollowing:

vd ¼1

32vAN � vBN � vCNð Þ ð7Þ

vq ¼1ffiffiffi3p ðvBN � vCNÞ ð8Þ

The Cartesian coordinate system can be transformed to a

60� coordinate system as below:

va ¼ v cos h� vffiffiffi3p sin h ð9Þ

Figure 8 Voltage waveforms in B = 1.25 for SVPWM algorithm; (a) output voltage of trans-Z-network; (b) capacitor voltage; (c) load

voltage; (d) load current; (e) harmonic spectra of load voltage; and (f) harmonic spectra of load current.

Figure 9 Voltage waveforms in B = 1.25 for shoot-through implementation in dwell times of voltage vectors algorithm; (a) output

voltage of trans-Z-network; (b) capacitor voltage; (c) load voltage; (d) load current; (e) harmonic spectra of load voltage; and (f) harmonic

spectra of load current.

SVM algorithms for trans-Z-source inverter 269

Figure 10 Voltage waveforms in B = 1.66 for SVPWM algorithm; (a) output voltage of trans-Z-network; (b) capacitor voltage; (c) load

voltage; (d) load current; (e) harmonic spectra of load voltage; and (f) harmonic spectra of load current.

270 A. Baghbany Oskouei et al.

vb ¼2vffiffiffi3p sin h ð10Þ

where va and vb are the coordinates of a space vector ~v in the

60� coordinate system, and v and h are its amplitude and phaseangle, respectively.

The SVM can be implemented by the following steps [16]:

Step 1. Determine vd , vq, v, and h.Step 2. Determine dwell time of related vectors T1, T2, and

T0.Step 3. Determine the switching time of each switch.

In this paper, SVM algorithm is used for modulation of cas-

caded H-bridge multilevel trans-Z-source inverter. The shoot-through state can be implemented through different methods.In this section, two algorithms are defined as below:

3.1. Combined modulation algorithm (SVPWM)

This algorithm combines space vector modulation (SVM) and

pulse width modulation (PWM) methods, named SVPWM.Fig. 5 illustrates SVPWMmethod for shoot-through state con-trol of trans-Z-source inverter. This method employs two extrastraight lines as shoot-through signals, VSC and �VSC. When

the carrier triangular signal is greater than VSC or it is smallerthan�VSC, the related H-bridge turns into shoot-through state.

In this algorithm, for each H-bridge of phase, a carrier sig-nal is assumed. Fig. 5 leads as follows:

Tst

T¼ T1

Tca

4

ð11Þ

where T1 is shoot-through time during quarter of carrier per-iod time, Tca.

It is clear that

T1

Tca

4

¼ Vca � VSC

Vca

ð12Þ

where Vca is the peak value of carrier signal.

So, substituting (10) and (11) into (2), boost factor isobtained as follows:

B ¼ 1

1� 2 Vca�VSC

Vca

� � ð13Þ

3.2. Shoot-through implementation in dwell times of voltagevectors algorithm

This algorithm employs dwell times of voltage vectors and

implements shoot-through state in zero states in eachH-bridge. It deals with time ration of implementationshoot-through state to dwell times, which known as Rst.Indeed, Rst is a number that determines duty cycle of

Figure 11 Voltage waveforms in B = 1.66 for shoot-through implementation in dwell times of voltage vectors algorithm; (a) output

voltage of trans-Z-network; (b) capacitor voltage; (c) load voltage; (d) load current; (e) harmonic spectra of load voltage; and (f) harmonic

spectra of load current.

SVM algorithms for trans-Z-source inverter 271

the condition pulse. This algorithm investigates shoot-through facility in each H-bridge and implementsshoot-through state in it base on Rst. In other words,

shoot-through implementation of each H-bridge is donein specified percent of the feasible times. So, accordingto flowchart of Fig. 6, shoot-through implementation in

this algorithm is based on two conditions: (1) shoot-through facility in each H-bridge, (2) being 1 of conditionpulse base on Rst. Then, this method does not increase

switching number significantly, due to lack of forced zero.But in it, Tst cannot be determined accurately. Althoughincreasing time ratio of implementation shoot-through state

to dwell times causes Tst to increase. But, this algorithm isnot linear. In other words

Tst

T¼ fðRstÞ ð14Þ

where �fðRstÞ > 0. Also

Tst

T< Rst ð15Þ

So, it is necessary to estimate this nonlinear relation basedon numerical data.

4. Results

4.1. Simulation results

Simulations have been performed to prove the capabilities ofrepresented SVM algorithms and comparison of them for con-

trol of cascaded H-bridge 7-level trans-Z-source inverter. Thesystem parameters are listed in Table 2.

Three different boost factors have been considered, i.e. 1,

1.25, and 1.66.Fig. 7 shows voltage waveforms in B = 1. Fig. 7(a) pre-

sents output voltage of trans-Z-network vi, which is about100 V. Capacitor voltage, load voltage, load current, and har-

monic spectra of them are displayed in Fig. 7(b–f). All THDsin this paper are calculated up to 20th harmonic.

Figs. 8 and 9 present related voltage waveforms of two

algorithms in B = 1.25. For this boost factor, VSC is consid-ered 0.9, where Vca = 1 in SVPWM algorithm, andRst = 0.35 in shoot-through implementation in dwell times

of voltage vectors algorithm. From these figures it is evidentthat vi is almost 125 V. With attention to THD of voltage intwo algorithms, it is obtained that THD of second algorithm

Figure 12 Experimental results in B = 1.25; (a) output voltage

of trans-Z-network; (b) load voltage.

Figure 13 Simulation results of Proposed Inverter with

Experimental Prototype Parameters in B = 1.25 (PWM algo-

rithm); (a) output voltage of trans-Z-network; (b) load voltage.

Figure 14 Simulation results of Proposed Inverter with

Experimental Prototype Parameters in B = 1.25 (SVPWM algo-

rithm); (a) output voltage of trans-Z-network; (b) load voltage.

272 A. Baghbany Oskouei et al.

is lower than first algorithm, significantly. Although funda-mental of these voltages is not extremely different. From thesefigures it can be observed that frequency of second algorithm is

lower than first algorithm.The other boost factor is 1.66 and its voltage waveforms are

displayed in Figs. 10 and 11, where VSC = 0.8 and Rst = 0.54

in first and second algorithms, respectively. In these figures, viis almost 166 V. Despite vi is high frequency in first algorithm;

it is low frequency in second algorithm due to increase switch-ing numbers in this algorithm, significantly. Load voltage also

has low THD in second algorithm, although the fundamentalis the same, approximately.

Figure 15 Simulation results of Proposed Inverter with

Experimental Prototype Parameters in B = 1.25 (shoot-through

implementation in dwell times of voltage vectors algorithm); (a)

output voltage of trans-Z-network; (b) load voltage.

SVM algorithms for trans-Z-source inverter 273

4.2. Experimental results

Cascaded H-bridge 5-level trans-Z-source inverter was builtusing IRFP460 MOSFETS as the switching devices and

MUR860G as fast diodes. Two 12 V dc voltage sourceswere used to individually supply of each trans-Z-network.Trans-Z-networks consist of 4700 lF capacitors. The

switching signals which were obtained from PWM algorithm,were produced with PCI-1716 DAQ for B = 1.25. Theswitching signals were interfaced to the inverter power switchesthrough optocoupler isolators TLP250. The photograph of the

prototype components is displayed in Fig. 12(a). Load in thisexperimental is 20 + 300 J O.

For B = 1.25, the output voltage of trans-Z-network is

shown in Fig. 12(b). As observed, the levels of vi are approx-imately 0, 15 V, where compared to dc voltage source, theamplitude of voltage is boosted according to B = 1.25. The

load voltage is shown in Fig. 12(c). Measured five levelsare approximately 0, ±15, ±30. As it can be seen, theresults verify the ability of proposed inverter in

voltage boosting and generation of desired output voltagewaveform.

4.3. Simulation of proposed inverter with experimental prototypeparameters and comparison of them

Some simulations have been performed to compare simulationand experimental results in this section. So, proposed inverter

with experimental prototype parameters which represented inprevious section. Fig. 13 shows the simulation results. Fromcomparison of Figs. 12(b) and (c) and 13(a) and (b), simi-

larity of the figures is evident.

Also, extended SVM algorithms are applied to this cas-caded H-bridge 5-level trans-Z-Source inverter, and the resultsof them are presented in Figs. 14 and 15.

5. Conclusion

In this paper two extended SVM algorithms have been

proposed, that employ cascaded H-bridge multilevel trans-Z-source inverter. Among these algorithms, combined modula-tion algorithm (SVPWM) is simple and has mathematical base,

so it is accurate. But in shoot-through implementation in dwelltimes of voltage vectors algorithm, the calculation of relationbetween total shoot-through state time and implemented

shoot-through ratio to dwell times is difficult. Although, thisalgorithm causes decrease in THD of voltage waveform. Inaddition, it does not increase switching number significantly,

unlike SVPWM algorithm.

Acknowledgment

This research has been supported by Azarbaijan ShahidMadani University.

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Aida Baghbany Oskouei was born in Tabriz,

Iran in 1988. She received the B.Sc. degree in

electrical engineering from Azarbaijan Shahid

Madani university, Tabriz, Iran in 2010 and

the M.Sc. degree in electrical engineering from

the university of Tabriz, Tabriz, Iran, in 2012.

She is currently working toward the Ph.D.

degree in electrical engineering at Azarbaijan

Shahid Madani university. Her current

research interests include modeling and

application of power electronic circuits in

power systems and renewable energies.

Mohamad Reza Banaei was born in Tabriz,

Iran. He received his M.Sc. degree from the

Poly Technique University of Tehran, Iran, in

control engineering in 1999 and his Ph.D.

degree from the electrical engineering faculty

of Tabriz University in power engineering in

2005. He is an Associate Professor in the

Electrical Engineering Department of

AzarbaijanShahidMadani University, Iran,

which he joined in 2005. His main research

interests include the modeling and controlling

of power electronic converters, renewable energy, modeling and con-

trolling of FACTS and Custom Power devices and power systems

dynamics.

Mehran Sabahi was born in Tabriz, Iran, in

1968. He received the B.S. degree in electronic

engineering from the University of Tabriz, the

M.S. degree in electrical engineering from

Tehran University, Tehran, Iran, and the

Ph.D. degree in electrical engineering from the

University of Tabriz, in 1991, 1994, and 2009,

respectively. In 2009, he joined the Faculty of

Electrical and Computer Engineering,

University of Tabriz, where he was an

Assistant Professor from 2009 to 2013 and

where he has been an Associate Professor since 2014. His current

research interests include power electronic converters and renewable

energy systems.