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Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May 13, 2010 Scheduling and Planning Applications woRKshop Copyright 2010 California Institute of Technology. Government sponsorship acknowledged.

Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

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Improving Long-Range Rover Science Using Multi-Core Computing 3 Objectives: Develop and demonstrate key capabilities for rover traverse science using multi-core computing Adapt three autonomous science technologies to SOA multi-core system rock finder (Rockster) texture analysis continual replanning (C ASPER ) Demonstrate with rover hardware and measure performance benefits using metrics such as execution time and data processed GNU Free Documentation License

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Page 1: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Exploring Parallelization Options for Planning and Scheduling

Brad Clement, Tara EstlinJet Propulsion Laboratory

California Institute of TechnologyMay 13, 2010

Scheduling and Planning Applications woRKshop

Copyright 2010 California Institute of Technology. Government sponsorship acknowledged.

Page 2: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Outline

• Project context• CASPER• Some example designs• Parallelization design choices• Our design

Page 3: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Improving Long-Range Rover Science Using Multi-Core Computing

3

Objectives:•Develop and demonstrate key

capabilities for rover traverse science using multi-core computing

•Adapt three autonomous science technologies to SOA multi-core system

• rock finder (Rockster)

• texture analysis

•continual replanning (CASPER)

•Demonstrate with rover hardware and measure performance benefits using metrics such as execution time and data processed

GNU Free Documentation License

Page 4: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

CASPER – Continuous Activity Scheduling Planning Execution and Replanning

• CASPER uses a model of [spacecraft] activities to construct a [mission] plan to achieve [mission] goals while respecting [spacecraft operations] constraints– Example goals: science requests, downlink requests,

maneuver requests– Example constraints: limited memory, power, propellant

• autonomously commanding EO-1 for the past 7 years• automated sequence planning/generation for Orbital

Express• DSN resource allocation• Modified Antarctic Mapping Missions (MAMM)• 60+ models

Page 5: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

What is planning?

Achieve a state,Optimize anobjective function

Maximize # of images (at least 20) of Kilauea caldera lava flow to ground science team

Sequence of many Configure radar Free up memory Slew spacecraft Stabilize spacecraft Power on radar ...

Perform a sequence

of activities

Page 6: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Planner uses a model of activitiesResources

States

Other Activities

These models are then combined to model the world as it changes due to activities

uses 600 W power; uses XXX memory

requires ACS state to be “Fixed Attitude”

decompositions point_radar before turn_on_radar before…

Page 7: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Automated Planning and Scheduling

SubgoalingTask Reduction

Conflict AnalysisScan

Dump_to_SSRClose_Door Close_Door

Dump_to_SSRScan

Data_Take

Cool Open_Door Close_DoorScan

Dump_to_SSR

Planning and scheduling involve several types of reasoning– Subgoaling: automatically achieve conditions necessary to allow execution of an activity– Task Reduction: expand a higher level activity into lower level activities– Conflict Analysis: ensure negative interactions between activities are avoided/resolved

Scan(target)

Inst_On Point(target)

Turn_On Slew(target)

Page 8: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Example Conflict, Repair Types

• conflict types– resource over/under-subscribed (battery below 40%)– state conflict (cannot use camera while oven is on)– state transition conflict (ACS cannot transition directly from safe

to science mode)– temporal conflict (X must start before Y ends by [0, 1hr])

• repair methods:– move an activity which uses resource out of conflict interval (to

another time or timeline)– delete (abstract) a culprit– add a renewer before interval

Page 9: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Example: Over-subscribed Non-Depletable Resource Conflict

• Information provided by the conflict:– Contributors (i.e., activities that make reservations during the

time of the conflict)– Repair methods (move a contributor, create a new replenishing

activity, delete a contributor)– Time intervals that resolve the conflict by a) moving a positive

contributor or b) adding a negative contributor

contributors

a)b)

conflict

Page 10: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Iterative repair algorithmStart

(if conflicts exist and user time-limit not exceeded)

...Select a flaw

Select a repair/opt method ...move

...

...

Select an activity

Select a start time

Perform theaction, collectthe new conflicts,and repeat

Page 11: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Portfolio of Stochastic Heuristics

5

4030306040905

50505

Strategy:

Which conflict should I repair?

How should I repair conflict ci?

Which activity should I add?

Where should its new start time be?

conflicti

actioni

activityi

Start_timei

conflicti

actioni

activityi

Start_timei

Choice points: Heuristics:

5

905

Strategy Selection

95

One Strategy

5

4030306040905

50505

Strategy:

Which conflict should I repair?

How should I repair conflict ci?

Which activity should I add?

Where should its new start time be?

conflicti

actioni

activityi

Start_timei

conflicti

actioni

activityi

Start_timei

Choice points: Heuristics:

5

905

Strategy Selection

95

One Strategy

Page 12: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Motivations for Local, Committed Search

• Iterative approaches do not incur overhead of search tree

Refinement search tree cost(esp. for backtracking with large state)

Local searchretains only 1

state copy

Page 13: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Motivations forLocal, Committed Search

• Committing to start times, etc. can facilitate computation of resource profiles, etc.

• Grounded values simplify interfacing to special purpose modules such as maneuver planners, etc.

Page 14: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Schedule Database (SDB)

activities

resource& statetimelines

conflicts

Page 15: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

CASPERgoals

state updates commands

SDB

Commandable

Repairer

conflicts

scheduleoperation

execution

Page 16: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

CASPER Cycle

1. commandable updates timelines for state updates

2. propagate timelines and constraint networks

3. detail activities for new goals4. check for flaws5. repair/optimize for flaw6. send commands to commandable for execution7. repeat

Page 17: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

CASPER data → functions bottlenecks

Planning Data Planning functions

plans/schedules plan and schedule: identify flaws, add/delete search states 

activitieso parameters, possible valueso parameter dependencieso parameter/state constraintso reservationso temporal constraints

valid time intervals/orderings

add, delete, constrain, move, detail, abstractget, set, choose valueevaluate dependency func, propagate values, stale?find valid values, violated?, propagate constraintsapply to state/resource timelinesadd, removecompute valid time intervals/orderings

state/resource vars (timelines)o values

compute valid time intervals, identify conflictscompute, propagate, get contributing activities

constraint ruleso conflicts

preference/optimization criteriao scores, deficiencies

identify conflictschoose conflict, choose resolution method (e.g. move)compute scores, identify deficiencieschoose preference to improve

Page 18: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

tile/mesh processor

core

core

core

core

core

core

core

core

core core core core

RAM

RAM

cache

proc

switch

Tilera TILE64™8 x 8 cores

Page 19: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Tilera TILE64™ memory accesslocation / event cache

sizepenalty

cycleslinesize

MIPS

best 0 600-1800

branch mis-predict

2 250

L1 8KbI,8KbD

2 16b 250

L2 64Kb 35-49 64b 80

L3 4Mb 8 64b 20

RAM 4Gb 69-88 10

Ungar and Adams, 2009GNU Free Documentation License

Page 20: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

score, best schedule

|| stochastic search, star, copied memory

updated schedule

cpu1cpu0

cpu8 cpu9

cpu2

cpu10

Page 21: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

score, best schedule

evolutionary search

mutated/crossed schedule with updates

cpu1cpu0

cpu8 cpu9

cpu2

cpu10

Page 22: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

memory || by time, master-slave, chain

cpu1cpu0

cpu8 cpu9

SDB

cpu2

cpu10

valid intervals, conflicts

activity Δs, propagation

Page 23: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

memory || by time, peer-to-peer

cpu1cpu0

cpu8 cpu9

SDB

cpu2

cpu10

activity Δs, propagation

activity Δs, propagation

0 1

2 3

4

Page 24: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

memory || by activity/timeline type, master – slave, star

cpu1cpu0

cpu8 cpu9

SDB

cpu2

cpu10

SDB3SDB2

SDB0 SDB4SDB1

valid intervals, conflicts

activity Δs, reservations

Page 25: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

memory || by time, peer-to-peer

cpu1cpu0

cpu8 cpu9

cpu2

cpu10

SDB3SDB2

SDB0 SDB4SDB1

SDBactivity Δs, propagation

activity Δs, propagation

?

Page 26: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Options: distributing memory

• which data– search space– plans– activities– timelines

• how to partition for load balance• data replication

Lansky (GEMPLAN),Zhou and Hansen, 2007,Burns et al., 2009,Kishimoto et al., 2009

DCR (DCSP & DCOP)

Distributed planning

Page 27: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Options: parallelizing functionLansky (GEMPLAN),Zhou and Hansen, 2007,Burns et al., 2009,Kishimoto et al., 2009

DCR (DCSP & DCOP)

Distributed planning

• which functions– entire algorithm– parts of algorithm

• identifying valid search operations(valid intervals)

• performing a planning/search operation • parameter dependency updates• timeline updates• identifying flaws

– methods of data objects (i.e. distributing memory)– data structure operations

• symmetry (loop-parallelized, master-slave, distributed)

Page 28: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Options: data access and communication

• access location types (processing node, cache, RAM, disk, network/messages)

• allocation control (specify node, specify cache, OS decides)• movement of data• maintain consistency of replicated data (transactions/mutexes,

conflict resolution)• integration of results (transactions/mutexes, conflict resolution)• data routing (centralized, hierarchical, peer-to-peer)• synchronous or asynchronous• communication services (hardware specific, threads, socket, file

I/O, MPI, CORBA, database, distributed planning interfaces)

Page 29: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

memory || by activity/timeline type,computation || by conflict type, master-slave, star

cpu1cpu0

cpu8 cpu9

SDB

cpu2

cpu10

SDB3SDB2

SDB4SDB1

valid intervals, conflicts

activity Δs

reservation Δs

timeline values

Repairer

Repairer

Page 30: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

parallelize bottleneck functions parallelize repair/optimize by flaw type

memory distributed timelines dependencies/activities noneload balance strategy dynamic grouping dynamic grouping none needed

replicated data none none nonefunctions parallelized propagation, valid intervals propagation, conflict

gatheringrepair, optimize

symmetry peer-to-peer peer-to-peer master-slave, asymmetric by conflict type

data location local cache, pre-specified local cache, pre-specified RAM/cachedata movement none none OS controlledreplicated data none -shared memory none -shared memory none -shared memoryintegration shared memory, no

conflictsshared memory, no conflicts determine independence

data routing centralized through cache & RAM

centralized through cache & RAM

centralized through RAM/cache

synchronization synchronize after propagation

full propagate before conflict gathering

sequential processing of dependent conflicts

services Pthreads Pthreads Pthreadsadvantages may keep nearly all data in local cache many flaws may be

independently addresseddisadvantages local cache may not be large enough for both instructions

and data, but that may be unavoidabledifficult to take advantage of locally cached data.

difficult to load balance and maximize utilization

Page 31: Exploring Parallelization Options for Planning and Scheduling Brad Clement, Tara Estlin Jet Propulsion Laboratory California Institute of Technology May

Summary

• A large number of choices may go into a design for a parallelized planning system.

• Presented a hybrid design for parallelizing a continual iterative repair planning system for a tile/mesh multi-core processor.

• Need to characterize design choices by listing what implementation features each would entail.