Experimental Design in Simulation of Semiconductor ...guo.ba.ntu.edu.tw/教學課程/大學和商研所/實驗設計與統計績效改善... · Design of Experiments Project Report

IEE 572Design of Experiments

Experimental Design in Simulation ofSemiconductor Manufacturing

Dr. Douglas Montgomery

Date: April 20, 2001

Team:

Chanettre Rasmidatta

Ching I Tseng

Aditya Rastogi

Design of Experiments Project Report

Ching-I Tseng, Chanettre Rasmidatta, Aditya Rastogi Page 2

Executive Summary

Due to the competitive market today in the semiconductor industry, ABC Co. wants to

investigate the factors, which affect the average cycle time and throughput. The

objective is to minimize the average cycle time and maximize throughput. Since the

model has eight factors and two levels each, we want to identify the factors that have

large effect. By doing this, 28-4 fractional factorial design is demonstrated and single

replication with 6 runs at the center is also used in this experiment. We have emphasized

the use of these designs in screening experiments to quickly and efficiently identify the

subset of factors that are active and to provide some information on interaction. Half-

Normal plot is used in the ANOVA, residual analysis and model adequacy checking,

regression analysis and contour plots to help the engineer to have the better interpretation

of the experiment as well to examine the active factors in more details.

The results from the experiment suggest that only two out of eight factors were

significant, which are release rate and dispatching rule. The model passed the tests for

normality and independence assumptions. In additions, the validity of the model was

performed based on the regression models to verify the two responses, average cycle time

and throughput. The model was verified using the confirmation run and the error was less

than one percent. The predicted values were very close to the actual values and thus

supporting the design.

Based on the results, we recommend that SSU dispatching rule should be used at release

rate of 19.5K wafers per month is the best combination to yield a higher throughput and

lower average cycle time.



TABLE OF CONTENTS

1. Experimental Design in Simulation of Semiconductor Mfg. 4

1.1 Problem Statement1.2 Description of the Model

2. Choice of Factors Levels and Range 6

3. Selection Response Variable 8

4. Choice of Experimental Design 9

5. Performing the Experiment 10

6. Statistical Analysis of the data 11

6.1 Analysis of Variances (ANOVA)6.2 Model Adequacy Checking

6.2.1 Normality Assumption6.2.2 Residual Analysis6.2.3 Box-Cox Transformation

6.3 Regression Analysis6.3.1 Average Cycle Time6.3.2 Throughput

6.4 Interaction Graph of Factors A and G6.5 Optimal Designs

7. Conclusions 24

7.1 Confirmation Testing7.2 Recommendations

APPENDIX 27



1. Experimental Design in Simulation of Semiconductor Manufacturing

1.1 Problem Statement

ABC Co. is a leading semiconductor manufacturing company. Lately they have

discovered that modeling the semiconductor manufacturing and simulating it for various

conditions would save lot of time and resources. The manager of the ABC Co. wants to

investigate the factors, which affect the average cycle time and throughput. The

objective is to minimize the average cycle time and maximize throughput. The lesser the

cycle time, the lesser the work-in-process, which means lesser investment in inventory.

The shorter cycle time also provides market responsiveness. With this goal in mind he

wants to plan an experiment or sequence of experiments designed to take him in the

direction of that goal.

1.2 Description of the Model

The model represents a 300mm DRAM facility with approximately 450 process steps and

398 process tools providing 1709 total tool ports, WIP positions, handlers, etc. that are

grouped into 80 tool groups. There are 15 operators in 8 different types and the

maximum designed capacity was 20,000 wafers/month. Only one type of DRAM part,

which processes through one routing, is released into the system. The flow is a highly re-

entrant, i.e. jobs feedback through sequences of the tool-groups many times. A lot of 25

parts is released at a fixed interval depending upon the maximum designed capacity.

Twenty-one types of reticles, generic resources, with a capacity of two each, are used.

Process tool downtimes for both preventative and unexpected maintenance are

incorporated, along with employee lunches and breaks. AutoSched AP, a commercial

simulation software package was used to model this system.

This model simulates the manual material handling system and the various assumptions

for this system are listed below:

• There is no operator’s traveling time to the front of stocker when an inter-bay

movement was requested.

• Gaining access to stockers in a bay is considered as resource contingent.

• Load and unload times are 1 minute each.



• The average operator’s traveling speed is assumed to be 2 miles/hr, which is a

reasonably slow walking speed, considering the weight of the AGV (Automate Guide

Vehicle).

• To compensate for safety precautions and other human factors in the Fab, travel times

used are equal to [distance/speed]*α, where α is equal to 1.5.



2. Choice of Factors Levels and Range

From the previous experiment and experience, the Potential Design Factors and the

Nuisance factors can be identified. The potential design factors are number of operators,

release rate, dispatching rule, stocker quantity, and number of reticles, of which number

of reticle is held-constant factor and the design factors are:

1) For operators, there are 5 factors and two levels each. The operator in this model

is responsible for loading and unloading the wafers on the machines and they are

also responsible for transportation of wafers within the Fab. Varying the number

of operators would possibly affect the performance of the system.

2) Release Rate, i.e. the rate at which the wafers are released into the factory, has

two levels. The release rate is measured by the number of wafers scheduled to

release into the Fab per month. The release rate affects the machine utilization,

specially the batching machine that in turn affects the system performance.

3) The dispatching rule for the bottleneck workstations has two levels. The

bottleneck machines were identified from the previous experiments. According to

the theory of constraints, the bottleneck machine determines the capacity of the

Fab that determines the throughput.

4) Stocker Quantity, which has two levels. In this model the stockers are treated as

stations and there is one stocker at each bay. The shortage of stockers can cause

blocking which can severely delay the manufacturing processes.

The details of the factors, level and range are given in the table below



Table 1 Design Factors and their Levels

Factor Levels Range

Operator

OP_DIFF 2 2 4

OP_PHOTO 2 2 4

OP_ETCH 2 3 5

OP_WET 2 2 4

OP_MOVE 2 35 55

Release Rate 2 18K 19K

Dispatching Rules 2 FIFOSame

Setup

Stockers Qty. 2 2 4

The Nuisance Factors are the various distributions for the processing time and the down

time, which are uncontrollable or the noise factors. The controllable nuisance factor that

can be identified is the random number stream that is to be used for the simulation. We

intend to keep the random number stream constant throughout the experiment.



3. Selection Response Variable

The purpose of the study is to determine the time taken for a lot of wafers to be produced.

This factor is best represented by the average cycle time and thus the average cycle time

happens to be one of our response variables.

Various other parameters are necessary to determine the proper running of the factory,

one of which is the throughput. Thus the two-response variables for our project are:

1) Average cycle time and

2) Throughput

Cycle time is defined as total elapsed time from lot creation to lot completion that include

process time, move time, queue time, and hold time.

The average output of a production process (machine, workstation, line, and plant) per

unit time is defined as the system’s throughput.

These response variables can be obtained from the simulation output report. The

simulation would run for a period of time at steady state. The steady state would be

determined by a long initial run and the statistics collected during this warm-up period

would be eliminated from the simulation output.



4. Choice of Experimental Design

Since the model has eight factors and two levels each, we need to identify the factors that

have large effects. To do so, screening experiments will be used at the initial stage of the

experiment. We will use the 2k Fractional Factorial Design for this screening experiment.

We choose 28-4 Fractional Factorial Design, single replication with 6 runs at the center

point as shown in Table 2. We determine the number of runs from the results of the

Design Expert software.

The alias for this design is a bit different for factor A. The possible reason for this could

be the use of center points and also that the factor A is a categorical factor. The defining

relation and the aliases is shown in Appendix 1.

Table 2: Design MatrixR1:

AVG.CYCLETIME

R2:THROUGHPUT

Std Run Block

Factor1:DISPATC

HINGRULE

Factor2:OP_DIFF

Factor3:OP_PHOTO

Factor4:OP_ETCH

Factor5:OP_WET

Factor6:OP_MOVE

Factor7:RELEASE

RATE

Factor8:STOCKER

S QTY. Hours Lots1 21 Block 1 {-1} -1 -1 -1 -1 -1 -1 -1

2 14 Block 1 {1} -1 -1 -1 -1 1 1 1

3 17 Block 1 {-1} 1 -1 -1 1 -1 1 1

4 22 Block 1 {1} 1 -1 -1 1 1 -1 -1

5 3 Block 1 {-1} -1 1 -1 1 1 1 -1

6 12 Block 1 {1} -1 1 -1 1 -1 -1 1

7 9 Block 1 {-1} 1 1 -1 -1 1 -1 1

8 20 Block 1 {1} 1 1 -1 -1 -1 1 -1

9 10 Block 1 {-1} -1 -1 1 1 1 -1 1

10 2 Block 1 {1} -1 -1 1 1 -1 1 -1

11 8 Block 1 {-1} 1 -1 1 -1 1 1 -1

12 13 Block 1 {1} 1 -1 1 -1 -1 -1 1

13 11 Block 1 {-1} -1 1 1 -1 -1 1 1

14 19 Block 1 {1} -1 1 1 -1 1 -1 -1

15 6 Block 1 {-1} 1 1 1 1 -1 -1 -1

16 18 Block 1 {1} 1 1 1 1 1 1 1

17 16 Block 1 {-1} 0 0 0 0 0 0 0

18 1 Block 1 {1} 0 0 0 0 0 0 0

19 7 Block 1 {-1} 0 0 0 0 0 0 0

20 15 Block 1 {1} 0 0 0 0 0 0 0

21 4 Block 1 {-1} 0 0 0 0 0 0 0

22 5 Block 1 {1} 0 0 0 0 0 0 0



5. Performing the Experiment

The experiments were performed using the AutoSched AP simulation software package.

In the initial stage, one long run was made to determine the warm-up period. The warm-

up period is the time taken by the simulation model to reach a steady state, where no

statistics is collected. Cycle time was plotted against time (in days) and the period was

determined to be 94 days as shown in Figure 1.

Fig.1 Warm-up Period Determination

The run length was determined to be 3 years and only single replication was made at each

run due to the limited resources. A single run took about two and half hours on a fast

machine (PIII, 800Mhz). Refers to Appendix 2 and see the Result Matrix.

Warm-Up Period Determination

05

101520253035

1 29 57 85 113

141

169

197

225

253

281

309

337

365

393

421

449

477

Days

Cyc

le T

ime

(Day

s)



6. Statistical Analysis of the data

Upon completion of the runs, the results were fed to the Design Expert software and

the results were analyzed. As mentioned earlier, the design chosen was a resolution

IV, 28-4 fraction factorial design. The analysis includes ANOVA, residual analysis and

model adequacy checking, regression analysis, and contour plots. These analyses are

discussed in detail below.

6.1 Analysis of Variances (ANOVA)

Figure 2 below shows the half-normal plot, which shows the effects of various factors.

Based on this graph, where the response variable is average cycle time, the factors

that lie along the line are negligible and three factors seem to be significant. The two

main effects from this analysis are A and G and a two-factor interaction AG.

Fig.2 Half-Normal Plot of Average Cycle Time



The similar analysis was performed for response variable, throughput, as shown in the

Figure 3 below.

Fig.3 Half-Normal Plot of Throughput

Table 3 shows the results of analysis of variance. Based on the response variable, average

cycle time, it shows that the factors that we chose are significant and their interaction is

significant, and that there is no evidence of second-order curvature in the response.

Table 3 ANOVA for Avg. Cycle Time

SourceSum of

Squares DFMean

Square F Value Prob > FModel 3094696.40 3 1031565.47 2238.82 < 0.0001 significantA 2440544.15 1 2440544.15 5296.75 < 0.0001G 510956.81 1 510956.81 1108.94 < 0.0001AG 143195.44 1 143195.44 310.78 < 0.0001Curvature 852.64 1 852.64 1.85 0.1915 not significantResidual 7832.96 17 460.76Lack of Fit 5791.66 13 445.51 0.872996454 0.6215 not significantPure Error 2041.30 4 510.33Cor Total 3103382 21



The Table 4 supplements ANOVA table. The high value of R-Squared indicates that the

major proportion of variability is included in the model.

Table 4 Supplementary Data of Avg. Cycle Time

The similar analysis was performed for response variable, throughput, as shown in the

Table5&6 below.

Table 5 ANOVA for Throughput

Table 6 Supplementary Data of Avg. Throughput

SourceSum of

Squares DF Mean Square F Value Prob > FModel 14050525.55 2 7025262.77 4574.10 < 0.0001 significantA 13028404.55 1 13028404.55 8482.71 < 0.0001AG 1022121.00 1 1022121.00 665.50 < 0.0001Curvature 560.48 1 560.48 0.36 0.5533 not significantResidual 27645.79 18 1535.88Lack of Fit 17847.12 14 1274.79 0.52 0.8373 not significantPure Error 9798.67 4 2449.67Cor Total 14078731.82 21

Std. Dev. 21.4654Mean 1288.3230C.V. 1.6661PRESS 12992.7900R-Squared 0.9975Adj R-Squared 0.9970Pred R-Squared 0.9958Adeq Precision 100.0214



6.2 Model Adequacy Checking

6.2.1 Normality Assumption

The adequacy of the underlying model should be checked before the conclusions from

the analysis of variance are adopted. Violation of the basic assumptions and model

adequacy can be easily investigated by the examination of residuals. For example, if the

model is adequate, the residuals should be structure less and that is, they should contain

no obvious patterns. In Figure 4, presents a normal probability plot of the residuals for

average cycle time. There is no severe indication of non-normality, nor is there any

evidence pointing to possible outliers and the equality of variance assumption does not

seem to be violated. Figure 5, Normal Plot of Residuals for Throughput shown below is

also normally distributed and it resembles a straight line.

Fig 4 Normal Plot of Residuals for Avg. Cycle Time



Fig 5 Normal Plot of Residuals for Throughput



6.2.2 Residual Analysis

Various residual plots are shown in this section below. Figure 6-10 show diagnostic plots

of the model. The residuals are normally distributed and the equality of variance does not

seem to be violated.

Fig 6 Residual vs. Predicted Plot for Cycle Time

Fig.7 Residual vs. Predicted Plot for Throughput



Fig.8 Residual vs. Run Number for Avg. Cycle Time

Fig.9 Residual vs. Run Number for Throughput



Fig.10 Residuals vs. Significant Factor



6.2.3 Box-Cox Transformation

The model was tested for any transformations that could have been applied, but the Box-

Cox Plot did not suggest any new transformations for both response variables, namely

Average Cycle Time and Throughput as shown in Figure 11 and 12.

Fig.11 Box Cox Plot for Cycle Time

Fig.12 Box Cox Plot for Throughput



6.3 Regression Analysis

The equations below are fitted regression model representations of the two-factor

factorial experiments for both responses.

6.3.1 Average Cycle Time

Final Equation in Terms of Coded Factors:Avg Cycle Time = 1292.14 - 333.07 * A +178.70 * G - 94.60 * A * G

Final Equation in Terms of Actual Factors:

Dispatching Rule FIFOAvg Cycle Time = -5207.44845 + 0.36441 * RELEASE RATE

Dispatching Rule SSUAvg Cycle Time = -1143.43634 + 0.11213 * RELEASE RATE

6.3.2 Throughput

Final Equation in Terms of Coded Factors:

Throughput = 8004.00 + 769.55 * A + 14.62 * G + 252.75 * A * G

Final Equation in Terms of Actual Factors:

Dispatching Rule FIFOThroughput = 13187.57955 - 0.31750 * RELEASE RATE

Dispatching Rule SSUThroughput = 2089.17045 + 0.35650 * RELEASE RATE



6.4 Interaction Graph of Factors A and G

Figure 13 shows the interaction effect of factors A and G. The average cycle time

decreases when changing from FIFO to SSU and from 19.5K wafers per month to 18K

wafers per month. The other factors do not have significant effect on the responses. The

contour plot was constructed by converting the type of factors from categorical to

numeric as shown in Appendix 3.

Fig.13 Interaction Graph of Avg. Cycle Time

Figure 14 below shows the interaction effect of factors A and G. Using the dispatching

rule FIFO, throughput is higher at 18K release rate than at 19.5K release rate compared to

the dispatching rule SSU where the throughput is higher at 19.5K than 18K release rate.

The other factors do not have significant effect on the responses. The contour plot was

constructed by converting the type of factors from categorical to numeric as shown in

Appendix 3



Fig.14 Interaction Graph of Throughput



6.5 Optimal Designs

The Design Expert provides optimal designs with the desirability factor of 0.852, which

determines the optimal level for each factor as shown in the Figure 15. The “circle” mark

and two ends on the line represent the current operating condition and its ranges. The last

two boxes show the ranges of two responses. Cycle time follows the hierarchical

principle, while throughput follows the linear relationship. The alternative solutions are

shown in the Appendix 4. The constraints used are the high and the low level of each

factor, where the objective used is to maximize the Throughput and minimize the Avg.

Cycle Time.

Fig. 15 Ramps for various factors



7. Conclusions

The 28-4 fractional factorial designs were run and analyzed to determine the effect of

various factors on average cycle time and throughput. The following conclusions were

made:

• Only two factors and their interaction were significant: release rate and

dispatching rule

• The model was tested for its adequacy and found that the assumption of normality

and independency are not violated

• R2 value was very high, that suggesting that model accounted for most of the

variability

• Box-Cox Plot did not suggest any transformation

• The graphs for the significant factors were analyzed and the best value is obtained

at high value of release rate and using dispatching rule as SSU, which is in

conjunction with our intuition.

• The optimal value with specified desirability was calculated using the software.

• Since only two factors have been identified as significant, more detailed

experiment can be designed to study the effects are various levels of these factors.

7.1 Confirmation Testing

Based on the regression models, runs were made to verify the results obtained for both

responses, average cycle time and throughput. Table 7 shows the predicted and actual

results.

Table 7 Confirmation Testing values

The table indicates that the predicted values are very close to the actual values and thus

supporting the design.



7.2 Recommendations

Based on the conclusions and the validity of the model, we recommend:

• To use SSU as a dispatching policy

• To operate at a release rate of 19.5K to yield a higher throughput and lower

average cycle time.

• To design a new experiment to take into consideration more levels of these

significant factors, such as 32 or higher



APPENDIX 1

Defining Relation and Aliases



APPENDIX 2

Result MatrixR1:

AVG.CYCLETIME

R2:THROUGHPUT

Std Run BlockFactor1:OP_DIFF

Factor2:OP_PHOTO

Factor3:OP_ETCH

Factor4:OP_WET

Factor5:OP_MOVE

Factor6:RELEASE RATE

Factor7:DISPATC

HINGRULE

Factor8:STOCKER

S QTY. Hours Lots

1 16 Block 1 2 2 3 2 35 18000 FIFO 2 1358.95 7476

2 5 Block 1 4 2 3 2 35 19500 SSU 4 1034.83 9060

3 10 Block 1 2 4 3 2 55 18000 SSU 4 1894.73 6998

4 8 Block 1 4 4 3 2 55 19500 FIFO 2 877.549 8503

5 11 Block 1 2 2 5 2 55 19500 SSU 2 1895.17 7010

6 2 Block 1 4 2 5 2 55 18000 FIFO 4 890.351 8497

7 15 Block 1 2 4 5 2 35 19500 FIFO 4 1347.63 7453

8 18 Block 1 4 4 5 2 35 18000 SSU 2 1081.39 8978

9 20 Block 1 2 2 3 4 55 19500 FIFO 4 1337.59 7490

10 21 Block 1 4 2 3 4 55 18000 SSU 2 1068.04 8995

11 22 Block 1 2 4 3 4 35 19500 SSU 2 1895.25 6990

12 3 Block 1 4 4 3 4 35 18000 FIFO 4 888.456 8495

13 7 Block 1 2 2 5 4 35 18000 SSU 4 1884.61 7014

14 13 Block 1 4 2 5 4 35 19500 FIFO 2 867.791 8503

15 12 Block 1 2 4 5 4 55 18000 FIFO 2 1339.14 7498

16 1 Block 1 4 4 5 4 55 19500 SSU 4 1012.69 9104

17 6 Block 1 3 3 4 3 45 18750 FIFO 3 1642.32 7197

18 14 Block 1 3 3 4 3 45 18750 SSU 3 934.913 8789

19 9 Block 1 3 3 4 3 45 18750 FIFO 3 1591.25 7307

20 19 Block 1 3 3 4 3 45 18750 SSU 3 927.695 8807

21 17 Block 1 3 3 4 3 45 18750 FIFO 3 1648.65 7180

22 4 Block 1 3 3 4 3 45 18750 SSU 3 924.109 8812



APPENDIX 3

Appendix 3A Contour Plot for Cycle Time

Appendix 3B Contour Plot for Throughput



APPENDIX 4

Optimal Solution

ConstraintsLower Upper Lower Upper

Name Goal Limit Limit Weight Weight ImportanceDispatching is in range FIFO SSU 1 1 5OP_DIFF is in range 2 4 1 1 3OP_ETCH is in range 3 5 1 1 3OP_MOVE is in range 35 55 1 1 3OP_PHOT is in range 2 4 1 1 3OP_WET is in range 2 4 1 1 3RELEASE is in range 18000 19500 1 1 3Stocker Qty is in range 2 4 1 1 3Avg Cycle T minimize 867.7908 1895.247 1 1.620733 3Throughpu maximize 6990 9104 1 1 3

SolutionsNumber DispatchingOP_DIFF* OP_ETCH*OP_MOVEOP_PHOT OP_WET* RELEASE Stocker QtyAvg Cycle TThroughpu Desirability

1 SSU 3.74 4.87 51.00 2.51 2.89 18658.56 2.58 948.814 8742.73 0.8519152 SSU 2.09 3.85 40.57 2.74 3.77 18666.88 2.74 949.748 8745.53 0.8519153 SSU 2.27 3.74 42.06 2.53 3.31 18667.96 2.36 949.869 8745.9 0.8519154 SSU 2.21 4.76 39.23 3.50 3.33 18655.67 2.79 948.49 8741.75 0.8519155 SSU 3.41 4.27 36.23 3.75 2.35 18669.91 2.42 950.088 8746.56 0.8519156 SSU 2.11 3.23 42.56 3.48 3.72 18654.61 3.33 948.372 8741.4 0.8519147 SSU 3.81 3.44 42.65 3.91 2.30 18671.45 3.71 950.26 8747.07 0.8519148 SSU 3.73 4.50 50.49 2.39 3.34 18653.72 3.76 948.272 8741.1 0.8519149 SSU 2.21 4.84 51.25 2.15 3.67 18653.53 2.21 948.251 8741.04 0.851914

10 SSU 3.65 4.67 42.91 2.33 2.18 18672.18 2.83 950.341 8747.32 0.85191411 FIFO 3.35 4.60 40.95 2.44 2.38 18000.00 3.10 1351.9 7487.2 0.28940112 FIFO 3.72 3.39 40.82 2.66 2.50 18000.00 3.19 1351.9 7487.2 0.28940113 FIFO 2.39 3.74 44.41 2.88 2.67 18000.00 3.25 1351.9 7487.2 0.28940114 FIFO 3.96 4.97 53.93 3.47 2.16 18000.00 2.01 1351.9 7487.2 0.28940115 FIFO 2.63 4.40 45.84 2.65 3.09 18000.00 2.82 1351.9 7487.2 0.28940116 FIFO 3.68 3.27 43.19 3.23 2.60 18000.00 2.94 1351.9 7487.2 0.28940117 FIFO 3.29 4.65 38.93 3.25 2.35 18000.00 3.01 1351.9 7487.2 0.28940118 FIFO 3.93 4.22 54.59 3.52 3.91 18000.00 3.35 1351.9 7487.2 0.28940119 FIFO 2.32 4.74 45.67 2.20 2.30 18000.00 2.80 1351.9 7487.2 0.28940120 FIFO 3.05 3.45 48.95 3.12 3.21 18000.00 3.67 1351.9 7487.2 0.289401

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Experimental Design in Simulation of Semiconductor ...guo.ba.ntu.edu.tw/教學課程/大學和商研所/實驗設計與統計績效改善... · Design of Experiments Project Report