Expedition Pcb

EXPEDITION PCB INTRODUCTION TRAINING MANUAL

OCTOBER 19, 2001

Forward

This course is designed to teach you the basic workflow of laying out a simple printed circuit board using the latest version of Expedition PCB. You will be looking at editor environments and fundamental library concepts. You will learn how to integrate with a Design Capture source schematic, place and route the board, then verify and output the artwork.

This course manual is divided up into major processes by chapter. Each chapter is comprised of a discussion and a hands on lab for that topic. Computer files are supplied for the labs.

Schedule Day 1 • INTRODUCTION TO EXPEDITION PCB • LIBRARY & DATA OVERVIEW • CREATING PADSTACKS • CREATING CELLS

Day 2 • CREATING PARTS • CREATING A LAYOUT TEMPLATE • PCB EDITOR OVERVIEW

Day 3 • STARTING A PCB LAYOUT • SETTING UP THE LAYOUT • DEFINING BOARD GEOMETRY • PLACING PARTS

Day 4 • VERIFYING THE LAYOUT • ROUTING TRACES • GENERATING PLANES

Day 5 • FINALIZING THE SILKSCREEN • GENERATING GERBER DATA • GENERATING DRILL DATA

19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION A-1

A INTRODUCTION � CLASS OVERVIEW � INSTRUCTOR/STUDENT INTRODUCTION � FRONT-TO-BACK DEMO

19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION B-1

B LIBRARY OVERVIEW This chapter briefly explains Expedition PCB related library issues. The topics covered are:

� PCB & THE CENTRAL LIBRARY � LIBRARY MANAGER � PARTITIONS

B-2 EXPEDITION PCB INTRODUCTION WG2000

PCB & THE CENTRAL LIBRARY

A quick look at Expedition PCB related library issues and terminology will help in understanding what the data is and where it came from throughout the rest of this course. Note: The “Library Manager” course covers library creation and management in more detail.

PADSTACKS A “padstack” contains all of the pads and any hole geometry for a physical component pin. The necessary shapes/sizes for copper, masks, and pastes are defined. If a “thru” type component is to be used, the hole shape/size is also defined. The pads and optional hole are then used to define a padstack.

CELLS A “cell” is component footprint graphics representing the physical component. Cells consist of padstacks, pin numbers, outlines, text fields, and any other data desired for manufacturing or documentation.

SYMBOLS A “symbol” is the schematic representation of a component. Note: Symbols will be discussed very little in this course. The “Design Capture for PCB” and “Library Manager” courses cover symbols in detail.

PARTS A “part” in the Parts Database is the intelligence that link the schematic “symbol” to the footprint “cell”. This intelligence is based around a part number and includes gate/pin information plus special properties that can be used for various downstream processes. Note: Parts may also be referred to as “PDBs”.

CENTRAL LIBRARY The “central library” contains Symbols, Parts, Cells, and Padstacks which are all interrelated. Within each of the symbol, part, and cell areas are user defined “partitions” for organization. More than one central library can exist but a PCB layout “project” is associated to only one central library. The project’s schematic or netlist calls for specific parts. These parts, along with their cells and padstacks, are extracted from the central library and “forward annotated” to the PCB layout. Note: Forward Annotation will be discussed in detail later in the course.

DESIGN-SPECIFIC LIBRARY A PCB layout will have a design-specific (local) library containing just the parts, cells, and padstacks used in the layout. Editing within this library data will update the layout but not the associated central library.


LIBRARY MANAGER

The Library Manager serves as an interface for the various library related editors. It also controls the creation and management of central libraries and library partitions.

The Library Manager can be launched… …from within Design Capture. Here the Library Manager can be used to edit schematic related library data such as property files, symbols and parts. …from within Expedition PCB. Here the Library Manager can be used to edit PCB related library data such as parts, padstacks, cells, and layout templates. …as a standalone product. Here the Library Manager can be used to edit all library related data such as property files, symbols, parts, padstacks, cells, and layout templates.

Using the Windows Explorer, browse to c:\mgtraining\common\libraries\master.

<Double-click> on the file master.lmc.

OPENING AND CLOSING CENTRAL LIBRARIES Selecting File>Open from the menus allows for browsing and opening a Library Manager Catalog file (*.lmc). The Library Manager Catalog file manages a single central library. All Library Manager operations from that point on will influence that central library’s data. Selecting File>Close from the menus closes the active library. All editors must be closed in order to close a central library or to exit from the Library Manager.

CREATING A NEW CENTRAL LIBRARY Selecting File>New from the menus creates a new Library Manager Catalog file and the associated folder structure for a central library. 1. Browse to find the folder where the central library is to

be created. 2. The Library Manager Catalog file will be placed in that

folder with a name the same as the folder. Note: This file can be renamed using the Windows Explorer, as long the file extension remains lmc.

3. When the new central library is created, it becomes the active library for the Library Manager. All Library Manager operations from that point on will influence that central library’s data.

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PARTITIONS

Library data in the central library is divided into partitions. Partitions organize the data so that the librarian and the designer/engineer can easily find what they need. For instance, Symbols may be divided into partitions based on function, Cells may be divided into partitions based on physical attributes and Parts may be divided into partitions based on function or part series.

PARTITION EDITOR Select Edit>Partition Editor from the menus to display the Partition Editor dialog. On the Partition

Editor dialog, <click> the Cells tab.

Partitions for Symbols, Cells, PDBs and IBIS Models can be defined here. At least one partition for each of these library types must exist in order to create library data of that type. The Partition Editor lists the Library Partition Name, the number of Entries in that partition, and if the partition is currently Reserved (in use). Note: Several users can access the same central library simultaneously, but not the same partition.

On the Cells tab, <click> the New button to create a new partition. Immediately replace the name

New with the name temp. This will be your working partition for a subsequent lab. <Click> on the PDBs tab and create a temp partition, also for use in a subsequent lab. <Click> the OK button on the Partition Editor dialog to save your new partitions.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION C-1

C CREATING PADSTACKS This chapter is an introduction to creating pad graphics and drill definitions. The topics covered are:

� WHAT ARE PADSTACKS? � PADSTACK EDITOR � HOLES � PADS � PADSTACKS

C-2 EXPEDITION PCB INTRODUCTION WG2000

WHAT ARE PADSTACKS?

A “padstack” contains all of the pads and any hole geometry for a physical component pin. The necessary shapes/sizes for copper, masks, and pastes are defined. If a “thru” type component is to be used, the hole shape/size is also defined. The pads and hole are then used to define a padstack.

PADSTACK EDITOR

Padstacks are defined using the Padstack Editor.

If you do not have the Library Manager up and the “master” Central Library open from the previous lab,

use the Windows Explorer to browse to c:\mgtraining\common\libraries\master and then <double-click> on the file master.lmc again. On the Library Manager dialog, <click> the Padstacks (Pads & Holes) button to launch the Padstack Editor.

The Padstack Editor opens the padstack database of the current Central Library. Padstacks cannot be divided into partitions in the Central Library. However, they are distinguished from each other by a padstack “type”. Note: Within Expedition PCB, the Padstack Editor is launched by selecting Setup>Padstack Editor from the menus. The Padstack Editor opens the “local” padstack database of the current PCB layout.

PADSTACK EDITOR ENVIRONMENT The Padstack Editor is divided into separate dialogs for defining Pads, Holes, and Custom Pads & Drill Symbols. A Padstacks dialog is then used to combine those holes and pads into the completed padstacks.

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HOLES

Holes must be defined for “through” type padstacks, for “via” type padstacks, and for padless mounting holes.

<Click> the Holes tab on the Padstack Editor dialog to define

holes and assign drill symbols needed for your future padstacks.

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HOLE LIST For convenience, the Filter hole list allows filtering the list of holes based on the hole type. The valid types are All, Round, Slot and Square. For convenience, the Filter units pulldown list allows filtering the list of holes based on the hole’s units – English and Metric, English or Metric. The Names list displays an inventory of defined holes.

Select a hole in the Names list and look at, but do not change, the Properties for that hole on the right half of

the dialog. Look at some of the other holes.

Holes can be created, copied, sorted, and deleted using the appropriate buttons at the top of the Names list. Note: A hole cannot be deleted if it is currently being used in a padstack.

You’ll need a hole for a padstack that will eventually be used for a DIP IC package.

<Click> the New Hole button at the top of the list of Names to get started.

With the Generate name from properties option (next to each hole name) toggled on, the name is generated automatically based on the Properties defined for the hole. If this option is toggled off, the hole name is user-defined. Note: Hole names can be up to 64 alpha-numeric characters in length and cannot contain "\", "!", or "()".

HOLE PROPERTIES The right section of the dialog is used to specify the hole’s Properties.

UNITS Each hole can have its own Units. The valid units are in (inches), th (thousandths), mm (millimeters) and um (microns).

TYPE The hole Type defines how the hole is to be processed during fabrication – Drilled or Punched.

PLATED The Plated option defines whether the hole is to be plated or non-plated during fabrication.

HOLE SIZE The Hole size – Finished options are based on the selected shape – Round, Square or Slot. • Round holes use Diameter, + Tol, and - Tol. • Square holes use Width, + Tol, and - Tol. • Slot holes use Width, Height, + Tol, and - Tol. Note: Tolerances are optional and appear only in the drill drawing’s “drill chart”.

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With your new hole still selected in the list, set the following hole Properties. As you do, watch the

hole’s name in the list update automatically. Set the Units to th. Set the Type to Drilled. Check Plated. Select Round. Enter a Diameter of 34. Enter a + Tol and a - Tol of 3.

DRILL SYMBOL The Drill symbol assignment section is for the “Drill Drawing” graphics. The drill symbol Assignment method is as follows: • Generate drill characters during output

automatically assigns alpha characters to each hole during drill drawing generation. This assignment is done by drill size, starting with the smallest and going to the largest.

• None ignores the hole during drill drawing generation.

• Use character as drill symbol requires selecting an alpha character from the Character pulldown list and specifying the character Size. Acceptable characters are A thru Z and a thru z.

• Use drill symbol from list requires selecting a predefined Drill symbol graphic and specifying the Size. Alternatively, a Custom drill symbol could be selected from the pulldown list but the size is determined when creating the custom symbol.

In the Drill symbol assignment section of the dialog, pull down the Assignment method list and select Use

drill symbol from list. Choose your favorite Drill symbol graphic (except the blue ones… they’re already in use). Set the Size of the symbol to 50. Select File>Save from the menus.

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PADS

All required pads must be defined prior to building a padstacks.

<Click> on the Pads tab on the Padstack Editor dialog to define

pads shapes needed for your future padstacks.

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PAD LIST For convenience, the Filter pad list allows filtering the list of pads based on the pad shape such as Round, Square, Rectangle, Thermals, etc. For convenience, the Filter units pulldown list allows filtering the list of pads based on the pad’s units – English and Metric, English or Metric. The Names list displays an inventory of defined pads.

Select a pad in the Names list and look at, but do not change, the Properties for that pad on the right half of

the dialog.

Pads can be created, copied, sorted and deleted using the appropriate button at the top of the Names list. Note: A pad cannot be deleted if it is currently being used in a padstack.

You’ll need pad shapes for a padstack that will eventually be used for a DIP IC package.

<Click> the New Pad button at the top of the list of Names to get started.

With the Generate name from properties checkbox (next to each pad name) toggled on, the name is generated automatically based on the Properties defined for the pad. If this option is toggled off, the pad name is user-defined. Note: Pad names can be up to 64 alpha-numeric characters in length and cannot contain "\", "!", or "()".

PAD PRoPERTIES The right section of the dialog is used to specify the pad’s Properties.

UNITS Each pad can have its own Units, which supports mixed units within one padstack. The valid units are in, th, mm, and um.

PAD SHAPE The pad shape is selected from a list of 16 predefined graphic shapes. The selected pad shape determines which pad parameters are displayed.

PAD PARAMETERS The Pad parameters section displays the selected graphic shape with fields for specifying distances such as length and width or diameter (depending on the shape). An optional Origin offset can be specified.

First create the shape needed for the metal pad of the DIP IC. With your new pad still selected in the

list, set the following pad Properties. As you do, watch the pad’s name in the list update automatically. Set the Units to th. Select the Round graphic shape from the list of shapes. (Round is selected by default.) In the Pad parameters section, fill in the diameter with 65. Select File>Save from the menus.

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WARNING! Be aware of which pad name is selected in the list when making changes to it’s properties.

A “soldermask clearance” pad shape is needed to eventually go with the 65th shape made previously.

<Click> the New Pad button and create a Round pad with a diameter of 71. A square “pin 1” metal pad shape will be needed. <Click> the New Pad button and create a Square pad with a side length of 65. A square soldermask clearance pad shape is needed to go with the new 65th square shape. <Click> the New Pad button and create a Square pad with a side length of 71. A “plane clearance” pad shape is needed. <Click> the New Pad button and create a new Round pad with a diameter of 85. And finally, a “plane thermal” (plane connection) pad shape is needed. <Click> the New Pad button and create a new 4 Web Round Thermal - 45 pad with an overall diameter of 85, a clearance gap of 10 and a tie-leg width of 10. Examine each pad by selecting them in the Names list and make any necessary modifications. When satisfied, select File>Save from the menus to save all of this work.

You’ll also need pad shapes for a padstack that will eventually be used for a SOIC (surface mount)

package. Set the Units to mm and create the following pads. Remember to <click> the New Pad button each time or you will be modifying the same pad. Create a Rectangle pad that is 2.2 high by 0.6 wide for the metal copper pad. Create a Rectangle pad that is 2.36 high by 0.76 wide for the soldermask clearance pad. Select File>Save from the menus.

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PADSTACKS

A padstack is made up of specific pads on functional PCB layers and an optional hole to accommodate a component pin, via, mounting hole, or fiducial.

<Click> the Padstacks tab on the Padstack Editor

dialog to put together the pads and hole may previously.

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PADSTACK LIST For convenience, the Filter padstack list allows filtering the list of padstacks based on the padstack type. The Names list displays an inventory of defined padstacks.

Select a padstack in the Names list and look at, but do not change, the Properties for that padstack on

the right half of the dialog. Look at some of the other padstacks.

Padstacks can be created, copied, sorted and deleted using the appropriate button at the top of the Names list. Note: A padstack cannot be deleted if it is currently being used in a component cell.

To start putting together a padstack, <click> the New Padstack button at the top of the list

of Names. Since there is no auto-naming option, immediately type in a new padstack name of SOIC. This will be used later for any SOIC packages. If you didn’t name the padstack (the default name is New) or just want to rename it, <double-click> on the padstack in the list and start typing.

Note: Padstack names can be up to 64 alpha-numeric characters in length and cannot contain "\", "!", or "()". When renaming a padstack, the name will be dynamically updated throughout the Central Library, any where it is used.

PADSTACK PROPERTIES The right half of the dialog is used to specify the padstack’s Properties.

TYPE Specify a padstack “type” of Fiducial, Mounting Hole, Pin - SMD, Pin - Through, or Via from the Type pulldown list. The padstack type dictates it’s use within the Cell Editor or Expedition PCB. Via padstacks are used during routing, Mounting Hole padstacks are listed when using the “Place Mounting Hole” command, and so on. The padstack type also dictates the layer stackup here when assigning pads and holes: • Pin - Through, Mounting Hole and Via type

padstacks have Mount side, Internal, and Opposite side fields.

• Pin - SMD and Fiducial type padstacks have Top mount and Bottom mount fields but no Internal field or Available holes.

• Fiducial type padstacks have no Plane clearance or Plane thermal fields.

With your new padstack still selected in the list, select Pin – SMD (the default) from the Type

pulldown list in the Properties section of the dialog.

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PADS The Pads list is used to assign previously defined pads to each layer of the padstack. To assign pads to padstack layers, first select the layer or layers, then select a pad from the Available Pads list, and finally <click> the left arrow button to assign it. The Available pads list can be filtered by pad shapes to make easier to find the desired pad.

First select the empty Top mount layer field in the Pads list (at the center of the dialog). Then

select Rectangle 0.6x2.2 from the Available pads list at the right (use the Pad filter pulldown list if it helps you locate the desired pad). Finally, <click> the left arrow button to insert the selected pad into the selected layer field. Repeat the above process for the Bottom mount layer and the using the same pad, Rectangle 0.6x2.2. Also assign the same pad to the Top mount solderpaste and the Bottom mount solderpaste layer fields. To complete your SMD padstack, assign the Rectangle 0.76x2.36 pad to both the Top mount soldermask and the Bottom mount soldermask layer fields. Select File>Save from the menus.

To unassign pads from the padstack layers, simply select the desired Pads list layer field and <click> the right arrow button.

The DIP IC padstack is yet to be defined. <Click> the New Padstack button, naming the

new padstack 34/65round. Change the padstack Type to Pin – Through. Using the <Ctrl> key, select the three empty fields – Mount side, Internal and Opposite side in the Pads list. Now select Round 65 from the Available pads list at the right. Finally, <click> the left arrow button to insert the select pad into the selected layer fields. Now assign the rest of the layers in the Pads list as follows: Plane clearance: Round 85 Plane thermal: Therm Rnd 4 X 85 Width 10 WebClear 10 Mount side soldermask: Round 71 Opposite side soldermask: Round 71

HOLES The Available Holes list contains all previously defined holes. A hole must be selected unless the list is grayed out based on the padstack Type.

To complete your Through padstack, select the Rnd 34 +/-Tol 3 hole from the Available holes.

Select File>Save from the menus.

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You’ll want a similar Through padstack with a square pad (pin 1 indicator). Select the

34/65round padstack if it not already selected. Now <click> the Copy Padstack button and rename the new padstack to 34/65square. With the 34/65square padstack selected in the Names list, select the Mount side and Opposite side layer fields using the <Ctrl> key. Now select Square 65 from the Available pads list and click the left arrow button. Assign the Square 71 pad to the Mount side soldermask and the Opposite side soldermask layer fields. Select File>Save from the menus.

PREVIEW The Preview area allows the viewing of any selected pads from the Pads list.

In the padstack Names list, select the SOIC padstack you made previously.

In the Pads list, select just the Top mount and Top mount soldermask layer fields (using the <Ctrl> key) and look at the Preview window in the lower-right corner of the dialog. Only selected pads (layers) display. Without changing your layer field selection, select the other padstacks you defined (34/65round and 34/65square). Make any necessary modifications to your three new padstacks. Close the Padstack Editor when you are satisfied.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION D-1

D CREATING CELLS This chapter is an introduction to creating component footprints “cells”. The topics covered are:

� WHAT ARE CELLS? � CELL EDITOR

D-2 EXPEDITION PCB INTRODUCTION WG2000

WHAT ARE CELLS?

A cell is a graphic representation of a component or just grouped graphics. There are three types of cells in Expedition PCB – Package, Mechanical, and Drawing cells.

PACKAGE CELLS A “Package” cell is the definition of a footprint associated to a part in the Parts Database, thus used in packaging a schematic or netlist. A Package cell contains pins (padstacks), placeholders for reference designators and part numbers, component outlines, and any other relevant data.

MECHANICAL CELLS A “Mechanical” cell represents a mechanical device that can be placed on the board such as hardware. They are not associated to a part in the Parts Database, thus do not originate from a schematic or netlist. Mechanical cells may have holes (padstacks) and they may have other relevant data such as Part Numbers. Mechanical cells will appear on the “Bill Of Materials”.

DRAWING CELLS A “Drawing” cell is used only for documentation. Drawing cells would include such things as logos and drawing formats. They are composed of graphics and text with no pins. Drawing cells will not appear on the “Bill Of Materials”.

CELL EDITOR

The Cell Editor is invoked from the Library Manager by clicking on the Cells icon. The editor will edit the cells in the cell partitions in the Central Library.

In Expedition PCB, the Cell Editor is invoked with the Setup>Cell Editor command. The editor will edit the cell library in the local project.


When first invoking the Cell Editor, there is a dialog environment that lists the contents of the active partition. This dialog can start a new cell, or edit an existing cell in the list.

PARTITION The drop-down menu displays a list of all of the cell partitions in the Central Library. The icon at the end of the field invokes the Partition Editor, allowing the creation of a new partition.

ICONS • New Cell - Displays a dialog to start a new cell in the

partition. • Copy Cell - Copies the cell selected on the list and

renames it to add "_1" to the original cell name.. Change the name to the new cell name, then edit the properties or graphics as needed.

• Properties - Displays a dialog of properties for the selected cell. Properties can be changed on the dialog.

• Edit Graphics - Enters the graphical environment with the selected cell. Graphics can then be edited for the cell.

• Delete Cell - Deletes the selected cell.


CELLS LIST AND COLUMNS The Cell List has three tabs for Package, Mechanical or Drawing cells. It shows the names of the cells in the active partition. The list also contains columns that show property information for the cells. Below the Cell List is a list of the columns that can be examined in the Cell List table. To remove a column from the list, press and hold on the column header and drag to the Available columns table. To add a column to the list, press and hold on the column title in the Available columns table and drag it to the list.

PREVIEW When a cell is selected from the list, the cell graphics is shown in the preview window.


CREATING A NEW CELL

SETTING THE PARTITION Make sure you are working in the correct partition.

NEW ICON To create a new cell, click on the New Cell button. A dialog displays for entry of cell properties.

CREATE DIALOG To create a new cell - Select the Create new cell option and add a name in the Cell name text entry field. To create a cell from PDB data - Select the Create Cell from PDB data option and a list of part numbers which reference a non-existent package cell display in the Undefined cells list. Select a Part Number from the list and the Total number of pins field is automatically filled in. Enter a number in the Total number of pins field. The Package Group helps organize and sort cells. This important field also helps determine the valid mount types.. The Mount Type helps organize and sort cells. It describes how the cell is mounted. The Cell Properties button displays the Properties dialog. You may use another cell as a template by selecting the Browse button next to the Use Cell as a template text entry field.

Selecting the Continue button closes the dialog and you are placed in graphics. The Place Pins dialog automatically displays.


CELL PROPERTIES This is the standard property dialog for package cells and appears whenever cell properties are needed. Most of the options are common in both this dialog and the Cell editor dialog. Changes in one are reflected in the other. The Name and descriptions section describes the name of the cell and its normal description. The name is an editable field and you may rename the cell. For the description, the maximum number of characters is 128. The Date field is the date the cell was last revised. This field is read only. The Package group helps organize and sort cells. The Mount type helps organize and sort cells. It describes how the cell is mounted. The Height field is the maximum height of the cell in the specified units. Package heights can also be defined in the PDB as a component property. A component height assigned in the PDB overrides a component height from the Cell Editor.

The Underside space is the defined space between the mount surface and the bottom of the cell. This is used as a checking value for when components are placed underneath others. The Units field is where you define the units for the selected cell. Each cell may have its own units assigned. The options are in, mm, um and th (default). The Number of pins field reflects the number of pins. This field is read only. The Pin # and Padstack Name list contains all the pins by number and the associated padstack currently defined in the cell. These columns can be sorted. These fields are read only and cannot be edited.


PLACING PINS On the Create Package Cell dialog, click the Next button to continue creating the cell. This will invoke the graphic environment and display the Place Pins dialog. This dialog allows you to assign padstacks to pins, place pins, renumber pins and view padstack details. There are two tabs: Parameter Place and Pattern Place.

PADSTACK LIST The first column is for the status of the pin. P means placed, U means unplaced. The Pin # column displays the alphanumeric pin number. You can change pin numbers by editing this column, or you can change multiple pin numbers using the Renumber Pins button. The pin numbers only can be changed if a PDB part has not been associated to the cell. To do this, first select the pins to be renumbered. Click on the Renumber Pins button. A dialog is displayed to enter renumbering parameters.


Note: If you are creating a package cell from a PDB definition, these pin numbers are pre-defined. This column is read-only if a part is defined that uses the cell. The Padstack Name column contains a dropdown list of all the padstacks in the active library. The Pin Padstack type is filtered by the Mount Style cell property. If the Mount Style is Surface, only the Pin - SMD padstack types are available for selection. If the Mount Style is Through, only the Pin - Through padstack types are available for selection. If the Mount Style is Mixed, both the Pin - SMD and the Pin - Through padstack types are available for selection. To assign the same padstack to multiple pins:

Select the first pin. Hold the <Shift> key and select the last pin. Continue holding the <Shift> key. In the last pin's field, use the drop-down menu to choose the correct padstack. The Rotation column is the rotation of the pin. You may type a value in or select a value from the dropdown list. The values are 0, 90, 180 or 270. The Net Class column can assign a Net Class, defined in the Cell Editor graphic environment to a pin. Interactive routing tools within the Cell Editor then use that Net Class setting. The Padstack Details button displays the Padstack Details dialog.


PARAMETER PLACEMENT To place pins based on pin location parameters, select the Parameter Place tab.

The Row and Column entry fields allow you to define the number of rows and columns of pins which will be placed. The default is 1. The Distance between pins X and Y fields allow you to enter the X and Y distance between pin centers. The default is 100 th for the X location and 300 th for the Y. The Pin Sequence buttons allow you to select the numbering scheme for the component by clicking appropriate button.

After setting the parameters, select all of the pins from the pin list to place in the pattern. Click on the Place button. The pins will attach to the cursor in the graphic environment for placement. Once attached to the cursor, you can rotate all of the pins as a group. This is done by selecting an Action Key.


PATTERN PLACEMENT To place pins based on an industry standard pattern, select the Pattern Place tab.

This tab is available if no pins are placed. This allows you to take all of the pins defined for the cell and place them based on a pattern. The Pattern Place tab displays a description of the selected Pattern Type. Each pattern type has entry fields which allow you to enter values for the width, height, distance between pin to pin centers, etc. The Include Assembly Outline checkbox allows you to include or exclude assembly outlines. The assembly outline represents the top view of the component. It is

used in assembly drawings. This outline is on the Assembly layer. The Include Silkscreen Outline checkbox allows you to include or exclude silkscreen outlines. The silkscreen outline is used for the silkscreen representation of the component. This outline is on the Silkscreen layer. The Rotation field allows you to enter a rotation angle if desired. If a rotation is selected, all graphics will be placed based on the selected rotation. Click on the Place button to place the pattern in the graphic environment.


GRAPHIC ENVIRONMENT The graphic environment allows editing the graphic representation of the cell. The environment is a modified version of the Expedition PCB environment. When creating a new cell, the graphic environment is opened when the Next button is clicked on the New Cell dialog. To edit the graphics of an existing cell, select the cell from the cell list on the main Cell Editor dialog, then click the Edit graphic icon.


ADDING OUTLINES There are four types of outlines that can be added to a cell. Each one serves a different purpose for Expedition PCB. Each is added using VB Draw commands. Commands to automatically initiate outlines are on the Edit>Place menu. • Assembly Outline - It defines the physical shape of

the package. It represents the graphics that will be used in the assembly drawing. Line width can be assigned to the assembly outline for plotting purposes.

• Insertion Outline - It represents the area needed for the insertion machine head. It is used by DRC which makes sure that Assembly Outlines and Insertion Outlines do not touch.

• Placement Outline - It represents the DRC placement footprint of the cell. Each outline can have a height and underside space defined which is used by DRC. If no placement outline is included, it will be automatically created consisting of a rectangle enclosing all pads on the mount layer and the Assembly Outline.

• Silkscreen Outline - It represents the graphics that will be silk-screened on the PCB. Graphics can be defined for either or both the mount side and the opposite side.

ADDING TEXT VB Draw text can be included in the cell. Text can be placed on any route layer or on user defined layers. There are four types of text that are placeholders for design data. Commands to automatically initiate the placement of these text property placeholders are on the Edit>Place menu.

• Assembly Ref Des • Silkscreen Ref Des • Assembly Part Number • Silkscreen Part Number

When adding property placeholder text, the font must be Gerber compatible. Also, the text must be drawn at a width for photoplotting.


ADDING OTHER INFORMATION Cell definitions can contain other elements to make the cell more functional in the Expedition PCB environment. These elements are placed in a similar manner as in Expedition PCB. Commands to automatically initiate the placement of these elements are on the Edit>Place menu.

• Contour • Placement Obstruct • Plane Obstruct • Plane Shape • Route Obstruct • Test Point Obstruct • Solder Mask Opening • Glue Spots • Fiducial • Mounting Holes

ORIGINS There are two origins that can be placed in a cell. • Cell Origin - The origin is the (0,0) point in the

design and all X and Y coordinates are referenced from this point.

• Assembly Origin - The assembly origin is relative to the Cell Origin (0,0). It is used during extraction of component X, Y locations.

Changes in the origin locations are made on a dialog. Enter a new X, Y for the origin relative to the current cell origin.


PIN EDITING If, while editing a cell, pin assignments or numbers need to be changed, return to the Place Pins dialogue with the Edit>Place>Pins command. If a pin needs to be moved, use the Move Pin command from the menu bar. A pin or group of pins must be pre-selected to use this command. Selected pins can be rotated with the Rotate Pins 90 and Rotate Pins 180 commands available on the

toolbar , or the action keys. An action key is available to provide coordinate location for the selected pin graphics.

EXITING THE GRAPHIC ENVIRONMENT To leave the graphic environment and return to the Cell Editor main dialog, use the File>Exit Graphics command. Note: Save your work in the graphic environment regularly with the File>Save command. If your work has not been saved when you leave the graphic environment, you will be prompted to save.

VERIFICATION Once cells have been built, they should be verified. This is a manual review of the cell to make sure all data is included, proper padstacks are used and all dimensions are correct. When the cell is manually verified, it should be marked as verified in the library. To mark a cell as verified:

• Select the cell, click the Properties icon and change the Verification status on the dialog.

Or: • Add the Verified column to the Cell List on the main

dialog, then change the verified status for the cell.


LAB – CREATING CELLS

SETUP 1. You should have the “master” Central Library

open in the Library Manager. <Click> the Cells (Package, Draft & Mechanical) button to enter the Cell Editor.

2. On the Cell Editor dialog, set the Partition to temp.

CREATE A NEW SMD CELL 3. <Click> the New Cell button.

4. Select the Create new cell option (at the top of the dialog).

5. Enter the Cell name 14SO.

6. Specify a Total number of pins of 14. Specify a Layers while editing cell of 2. Choose the IC - SOIC Package group.

7. <Click> the Cell Properties button. Enter a description of SOIC 14. Set the Units to mm. Specify a Height of 1.75.

8. On the Package Cell Properties dialog, <click> the Close button.

9. On the Create Package Cell dialog, <click> the Next button.

10. On the Place Pins dialog, <click> the Pin # column until the pins are sorted from 1 to 14.

11. Select the Padstack Name field for pin 1. Press and hold the <Shift> key then select the Padstack Name field for pin 14.

12. Continuing to hold the <Shift> key, <click> the down arrow in the Padstack Name field for pin 14, and choose the SOIC padstack from the pulldown list. It should now be assigned to all of the pins.

13. <Click> the Pattern Place tab.

14. Set the Pattern type to SOIC and enter the following values into the pattern form: Body length = 8.75 Body width = 4 Pin to pin spacing = 1.27 Row to row spacing = 5.2

15. Make sure the Include Assembly outline and Include Silkscreen outline option are checked.

16. With the pins still selected, <click> the Place button.

17. <Click> the Close button on the Place Pins dialog.

18. Examine the graphics. Select File>Save from the menus and then select File>Exit Graphics from the menus.

19. On the main Cell Editor dialog, <click> the Apply button to save your work. Examine the Preview of the new cell.


CREATE A NEW THROUGH CELL 20. <Click> the New Cell button.

21. Enter the Cell name 14DIP.

22. Set the Total number of pins to 14. Set the Layers while editing cell to 2. Choose the IC - DIP Package group.

23. <Click> the Cell Properties button. Enter a description of DIP 14. Verify that the Units is set to th. Specify a Height of 100. Click the Close button.

24. On the Create Package Cell dialog, <click> the Next button.

25. Move the Place Pins dialog out of the way.

26. In the graphics environment, select Setup>Editor Control from the menus.

27. Select the Grids tab. Specify a Route grid of 25 and a Drawing grid of 25.

28. On the Editor Control dialog, <click> the OK button.

29. On the Place Pins dialog, select the Padstack Name field for pin 1. Press and hold the <Shift> key then select the Padstack Name field for pin 14.

30. Continuing to hold the <Shift> key, <click> the down arrow in the Padstack Name field for pin 14, and choose the 34/65 round padstack from the pulldown list. It should then be assigned to all of the pins.

31. <Click> the Parameter Place tab and enter the following values: # Columns: 7 Spacing: 100 # Rows: 2 Spacing: 300 Pin Sequence =

32. <Click> the Place button.

33. Position the cursor over the drawing area. The pins are attached to the cursor for placement. <Click> directly on the “origin” marker to place them down.

34. Select View>Fit All from the menus.

35. On the Place Pins dialog, change the Padstack Name for Pin # 1 to 34/65 SQUARE.

36. <Click> the Close button on the Place Pins dialog. If everything was done correctly, the graphics shows the 14 pins of the DIP with a square pin 1.

37. Select Edit>Place>Assembly Outline from the menus. Using the Rectangle draw tool at the bottom of the window, draw a rectangle inside of all the pins. Draw any other assembly graphics you desire by selecting another draw tool.

38. Select Edit>Place>Silkscreen Outline from the menus. Draw a rectangle outside of all the pins. Draw any other silkscreen graphics you desire.

39. Select Edit>Place>Placement Outline. Draw a rectangle a little larger than the silkscreen outline.


40. Move Reference Designator and Part Number text as desired by first selecting the text, positioning the mouse cursor over the text border until a “move” cursor appears, then <click-drag> the text.

41. Select Edit>Place>Silkscreen Ref Des from the menus and place the text outside of the silkscreen outline.

42. Select File>Save from the menus.

43. Select File>Exit Graphics from the menus.

44. Select each cell in the list to see a Preview of it.

45. <Click> the OK button on the main Cell Editor dialog to save and exit the Cell Editor.

19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION E-1

E CREATING PARTS This chapter is an introduction to creating parts – adding intelligence to components such as linking schematic logic symbols to component footprint cells and assigning part numbers. The topics covered are:

� WHAT ARE PARTS? � INVOKING THE PDB EDITOR � PARTS DB EDITOR ENVIRONMENT � BASIC WORKFLOW

E-2 EXPEDITION PCB INTRODUCTION WG2000

WHAT ARE PARTS?

“Parts” are stored in a Parts Database or “PDB”. One or more PDBs will exist in a Central Library. A part holds much of the component’s intelligence. A part contains the information which associates symbols to cells by a property called a “Part Number.” For a given Part Number, a PDB contains information about which symbol and which cell will be associated with that number, how the cell’s physical pin numbers “map” to the symbol’s logical pin names, and also defines whether the pins and logical “gates” for the part will be swappable on the PC board. The PDB file can also be used to assign other properties to a part, such as the cost of the part, the value of resistance or capacitance, the simulation model name to be used for simulation of the circuit, etc.

INVOKING THE PDB EDITOR

The PDB Editor is invoked from the Library Manager by clicking on the Parts Database icon. The editor will edit the PDBs in the PDB partitions in the Central Library.

In Expedition PCB, the PDB Editor is invoked with the Setup>PDB Editor command. The editor will edit the PDB library in the local project Layout folder.


PARTS DB EDITOR ENVIRONMENT

The PDB Editor consists of a main dialog where PDB entries are started and inventoried. There are sub-dialogs which enter other important information about the parts.

MENUS The File menu contains commands to Save the PDB and Exit the PDB Editor. There are also commands to write the selected entries to an ASCII file or read an entry from an SCII file. The Units menu selects the default unit to use while creating PDBs. The Verification menu contains commands to enable or execute PDB property verification making sure that PDB entries have the correct properties for the (VeriBest) applications in use.


BASIC WORKFLOW

OPENING OR CREATING THE PARTITION The Partition field shows the name of the currently active partition. <Click> on the down arrow to change to another partition. <Click> on the Partition Editor Icon to create a new partition.

EDITING AN EXISTING PDB ENTRY To edit an existing PDB entry, select it from the list. All information about that entry will be loaded into the dialog for editing.

STARTING A NEW PDB ENTRY To start a new PDB entry, click on the New icon. A new line will open on the list with a placeholder in the Number and Name fields.

PART NUMBER The Part Number is the main lookup into the Parts Database file. When you run the Packager utility on a schematic design, the system reads the Part Number property assigned to each symbol. The Packager then searches through the PDB partitions for a matching Part Number. If a match is found, the properties from the PDB definition are assigned (back annotated) to the schematic symbol. The Part Number should be the number to appear on project documentation such as assembly drawings or a bill of materials A Part Number can be up to 32 characters. Any characters are allowed. Part Numbers must be unique throughout the Central Library. Part Numbers are required.

PART NAME The Part Name property is what is used by the Packager as a lookup into the Parts Database file if there is no Part Number assigned to the schematic symbol. If the Part Name is used to locate the PDB entry, the “Default” Part Number for that Part Name will automatically be used by the Packager. The Part Name is often a generic name for the part, such as ALS00 (as opposed to the Part Number, which might be something like SN74ALS00A/n). The Part Name can be up to 32 Alphanumeric characters. Part Names may be duplicated, in which case one Part Number associated with the Part Name must be marked as the default. Part Names are required.


PART LABEL The Part Label is a way to assign a more familiar name to a part, for example, the catalog number for a Dual Bipolar Operational Amplifier might be MC33178P, while you may refer to it as a 5MHzOPAMP, which would be the Part Label. Another example: a resistor might have a Part Number of D55342K07B1E00R (Mil Spec number), the Part Name might be the generic RM1206, while the Part Label might be a descriptive 1.00K_1%_.250W_RM1206. The Part Label can be up to 32 characters long, and any characters are allowed. Part Labels may be duplicated. Part Labels are optional.

COMPONENT PROPERTIES The default list of component properties shows the properties needed for the "Type" of component. The component property will be colored red until you give it a valid value, at which time it will turn black. Once all of the required component properties have values, the Part Number will also turn black. To specify additional component properties, click the New icon, which opens a blank component property field. You can then click in the blank field and get a drop down menu of properties from which to choose. Notice the Type property. It is used for property verification. The type may be resistor, IC, capacitor, etc., and should be set appropriately for the kind of part you are creating. Also, the Tech property should be set according to the technology of the part you are creating.

DESCRIPTION The description field is included in the Bill Of Materials. This field is optional, however, it should be used in order to fully identify the part.

REFERENCE DESIGNATOR PREFIX The Reference des prefix is used by the Packager to prefix Reference Designators assigned when the part is packaged. The default Reference des prefix is U. This should be edited appropriately for the type of part you are creating (i.e. change to R for a resistor, etc). The numbers after the prefix will be added appropriately when the design is packaged.


PIN MAPPING On the PDB Editor dialog, click on the Pin Mapping button to display the Pin Mapping dialog. This dialog has three purposes: • Assign Design Capture

symbols which can be packaged into the part.

• Assign Expedition PCB cells which can be used for the layout for the part.

• Map the pins of the Design Capture symbols to the pins of the Expedition PCB cells.


ASSOCIATING A SYMBOL In the Assign Symbol section of the dialog, click the New icon and a line is created to type in the name of a symbol. This is available if the symbol has not been created in the Central Library.

However, if the symbol has been created, the preferred method is to import the symbol information from the symbol partition.

IMPORT Click on the Import icon to import a symbol from a symbol partition in the Central Library. Select the symbol partition where the symbol is stored. Type in the name of the symbol, or select it from the list. Select the option to Create new gate information. Enter the number of gates in the part that are represented by the symbol. This will start entries in the pin mapping section of the dialog. Include pin properties will automatically set the PDB pins to the same properties as the symbol (input, output, etc.) If the symbol has physical pin numbers assigned, Include pin number mapping will automatically assign those pin numbers when the symbol is imported.


ASSOCIATING A CELL In the Assign Package Cell section of the dialog, you can enter the name of the Top cell or the Bottom cell. You must have at least one or the other. Click the New icon and a line is created to type in the name of an Alternate cell. These keyin options are available if the cell has not been created in the Central Library.

However, if the cell has been created, the preferred method is to import the cell information from the cell partition.

IMPORT Click on the Import icon to import a cell from a cell partition in the Central Library. Select the cell partition where the cell is stored. Filter the Cell name list based on Package group or number of pins. Type in the name of the cell, or select it from the list. Choose to import the cell as the Top cell, Bottom cell, or an Alternate cell.


LOGICAL GATES TAB When a symbol is imported, a "Logical gate" definition is created. The Logical tab on the dialog edits the Logical gate information. The Logical gate definition contains:

• Pin definitions • Pin swapping

assignments • Slot definitions

PIN PROPERTIES Each line of the table represents a pin in the Logical gate. Each pin can have a Property which assigns it as a Pin Type with a Value or as a Supply Pin with an associated signal name.

PIN SWAPPING To assign two pins in a Logical gate as swappable, select both pin lines, then click the Swap icon. Swapping can only be assigned between pins with like properties. Swappable pins are marked with a colored square in the first column.

SLOTS In the Logical gate definition, a slot is one instance of the Logical gate in the device. Each slot is represented by two columns in the table.

• One contains the symbol pin names. When a symbol is imported, the Symbol pin names will automatically be entered into the first slot.

• The other contains the Physical Pin numbers from the cell. These are not editable on the Logical gate tab.

Any slots of the same gate are swappable.


PHYSICAL PINS The Physical tab on the dialog edits the Physical pin out information. It is usually done after the Logical gates have been defined. The Physical pins list will show all pins that have not been mapped for the part. This list is filled with the pin numbers from the imported cell. As pins are assigned, their numbers will be removed from the list. All pin numbers must be assigned, either on the Physical tab, or on the Supply and NC tab. The table display the slot definitions from the Logical tab. Enter the corresponding physical pin numbers for each slot.


SUPPLY AND NC PINS The Supply and NC tab assigns pins which are on the physical cell, but are not represented on the Design Capture symbols.

SUPPLY PINS To assign a Supply Pin, enter a Supply Name - a signal name. After entering a name, a new blank row will be added to the table to allow another supply name. Enter the physical pin number. After entering a pin number, a new column will be added to the table to allow additional pins to be added with the same Supply Name.

NO CONNECT PINS Enter a pin number for a No connect pin. After entering a pin number, a new column will be added to the table to allow additional No connect pins.

SAVE Remember that your work is not saved in the PDB Editor until you issue the File>Save command.


LAB – CREATING PARTS

CREATING A PART 1. You should have the “master” Central Library open in

the Library Manager.

2. <Click> the Parts Database button to launch the PartsDB Editor.

3. On the PartsDB Editor dialog, set the Partition to temp.

4. <Click> the New button to start a new PDB entry. Change the Number to SN74ALS00AN. Change the Name to 54/74xxx00. Change the Label to 74ALS00A.

5. At the lower-left corner of the PartsDB Editor dialog, verify that the Component property value for Type is IC.

6. Enter the Description of IC, DIP, QUADRUPLE 2-INPUT POSITIVE-NAND GATES.

7. Specify a Reference des prefix of U.

MAPPING PINS 8. On the PartsDB Editor dialog, <click> the Pin

Mapping button.

9. In the Assign symbols section of the dialog (upper-left corner), <click> the Import button.

10. On the Import dialog, select the symbol name NAND2 from the list.

11. Select Create New gate information option.

12. Enter the Number of slots as 4.

13. Select the Include pin properties option.

14. <Click> the OK button. A new gate will be created in the Logical table with 4 slots.

15. In the Assign package cell section of the dialog (upper-right corner), click on the Import button.

16. On the Import dialog, select 14DIP from the list of cells and <click> the OK button. (Use DIP14 if you did not complete the previous “Creating Cells” lab.)

17. Examine the Logical table at the bottom of the Pin Mapping dialog. The symbol imported with 4 slots defined. The symbol pin names (A, B, Y) were only imported into the first slot.

18. Set up the pin swapping by selecting both of the Input pins and then <click> on the Swap button.


19. <Click> the Physical tab. Enter the following physical pin outs:

A 1 4 9 12 B 2 5 10 13 Y 3 6 8 11

20. <Click> the Supply and NC tab.

21. Enter a Supply Name of GND and press <Enter>. Enter a Pin # of 7.

22. On the next line, enter a Supply Name of VCC and press <Enter>. Enter a Pin # of 14.

23. <Click> the OK button on the Pin Mapping dialog to save your work.


COPYING A PART 25. Select the SN74ALS00AN part you just made

and <click> the Copy button.

26. Change the Number to SN74ALS00AD.

27. Change the Description to IC, SOIC, QUADRUPLE 2-INPUT POSITIVE-NAND GATES.

28. <Click> the Pin Mapping button.

29. In the Assign package cell area, <click> the Import button.

30. Select 14SO from the list of cells and <click> the OK button. (Use SO14 if you did not complete the previous “Creating Cells” lab.)

31. The logic and pin-outs are exactly same at the original part so there’s nothing left to do. <Click> the OK button on the Pin Mapping dialog.


33. Exit the PartsDB Editor.

19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION F-1

F CREATING A LAYOUT TEMPLATE This chapter is discusses the basics of why and how to create a layout template (seed). The topics covered are:

� WHAT IS A LAYOUT TEMPLATE? � CREATING/EDITING LAYOUT TEMPLATES � COPYING CELLS AND PADSTACKS

F-2 EXPEDITION PCB INTRODUCTION WG2000

WHAT IS A LAYOUT TEMPLATE?

An Expedition PCB layout cannot be started from scratch. There are a minimum set of folders and files which must be present. This is called a “layout template”. Two basic Expedition PCB layout templates are delivered with the software. They contain the absolute bare minimum to start a new Expedition PCB layout. The default location for the delivered layout templates is c:\mentor\2000\vbexppcb\templates\centrallibrary\layouttemplates. A layout template can also save hours of work by having numerous editor settings predefined, user layers created, and non-schematic generated cells and padstacks available. A layout template can go as far as having a board outline and mounting holes, parts preplaced, and even routed traces.

TEMPLATES AND THE CENTRAL LIBRARY Expedition PCB layout templates are stored in the Central Library. There can be multiple templates in a Central Library which can be used to start layouts with different characteristics.

TEMPLATES AND EXPEDITION PCB Layout templates are used by the File>New command in Expedition PCB. The Job Management Wizard’s New option prompts for a layout template to use in creating a new layout. It then copies all of the folders and files from the template in the Central Library to a new layout location. This is the starting point for the “pcb” folder in the project.

CREATING/EDITING LAYOUT TEMPLATES

To create and edit layout templates, open the desired Central Library with the Library Manager and launch the Layout Templates command.

You should have the “master” Central Library open in the Library Manager.

On the Library Manager dialog, <click> the Layout Templates button.

The Layout Templates dialog displays all available layout templates in the Central Library. Here new templates can be made from existing layouts or copied from other layout templates. The layout templates can be edited from this dialog.

1


NEW LAYOUT TEMPLATE To create a new layout template, use the New button on the Layout Templates dialog.

SOURCE DESIGN The Source design file is an existing Expedition PCB layout to copy from. Browse the file system for a .pcb file from an existing layout that would make a good layout template. All of the folders and files associated with that layout (except schematic data) will be copied to the Central Library as a new layout template.

TEMPLATE NAME Specify a familiar Template name for the new layout template.

COPYING A LAYOUT TEMPLATE The Layout Templates dialog provides a copy command for copying from an existing layout template in the list.

On the Layout Templates dialog, select 4 layer template in the list and <click> the Copy Template

button. Rename the copied template to training.

EDITING A LAYOUT TEMPLATE Editing a layout template from the Layout Templates dialog opens Expedition PCB. In Expedition PCB, the layout template appears as any normal PCB layout with the exception that there is no design source (no schematic and CDB).

With the new training template selected, <click> the Edit Template button.

Expedition PCB will launch. <Click> the OK button on the two “Forward annotation has been disabled” and “Back annotation has been disabled” messages. Once Expedition PCB is running, <click> the OK button to close the Tip of the Day dialog if it appears.

At this stage, any non-schematic related presets can be performed.

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COPYING CELLS AND PADSTACKS

Non-schematic related cells and padstacks can be copied into the layout template. This allows access to these cells and padstacks from any PCB layout that uses this layout template.

CELLS Mechanical cells and drawing cells are not forward annotated from the design source into the PCB layout… but they can be copied into the layout template for easy access later, during a layout process. Test Point cells can be retrieved easily from the Central Library during the layout process so they need not be copied into the layout template.

PADSTACKS Via, Fiducial, and Mounting Hole padstacks can also be retrieved easily from the Central Library during the layout process, with one exception – Via padstacks must exist in the local library during the layout process when using the Net Classes and Clearances dialog (Net Classes will be discussed later in the course).

PROJECT FILE In order to access the current Central Library, the layout template’s “project file” must be notified. This project file is accessed through the Project Integration dialog. Note: The Project File and Project Integration are discussed in more detail later in the course.

While editing your “training” layout template in Expedition PCB, select Setup>Project Integration

from the menus. <Click> on the Edit the Project File button at the top the Project Integration dialog. <Click> on the Browse for a Central Library button at the top of the Project Editor dialog. Browse to the current Central Library, master.lmc, at c:\mgtraining\common\libraries\master.

<Click> the OK button on the Project Editor dialog to save the Project File setting. <Click> the Close button on the Project Integration dialog.

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LIBRARY SERVICES Library Services normally allows copying Symbols, Parts, Cells, Padstacks, and IBIS Models from one Central Library to another Central Library. If Library Services is launched from within a layout template, Cells and Padstacks and Parts can be copied (imported) into the layout template’s design-specific (local) library from the Central Library.

While editing your “training” layout template in Expedition PCB, select Setup>Library Services from

the menus. <Click> the OK button on the “Forward annotation is not allowed…” message. On the Library Services dialog, <click> the Cells tab. Choose the misc partition from the Import from partition pulldown list. In the Cells in import partition list, <double-click> on #4NUT, #4SCREW, #4WASHER, and Mentor_logo cells, moving them over to the Cells to import list. <Click> the Apply button, at the bottom of the Library Services dialog, to copy the cells into the local cell library of the layout template. <Click> the Padstacks tab. Copy the following padstacks as you did the cells: 25th via pad 25th via pad, tented 40th via pad 40th via pad, tented <Click> the Close button on the Library Services dialog. Exit Expedition PCB. Exit the Library Manager.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION G-1

G PCB EDITOR OVERVIEW This chapter briefly explains where the PCB data is stored and is also an introduction to the Expedition PCB editor environment. The topics covered are:

� FOLDERS AND FILE NAMES � USER INTERFACE � PANNING & ZOOMING � DISPLAY CONTROL � PLACE/ROUTE/DRAW MODES � SELECTING OBJECTS � FINDING PARTS AND NETS � FILE VIEWER � HELP

G-2 EXPEDITION PCB INTRODUCTION WG2000

FOLDERS AND FILE NAMES

Setting up and managing folders and files on the computer’s harddrive for an Expedition PCB project is easy.

FOLDERS It is necessary to manually set up a general project area first such as c:\project. All future projects can then be located in this area (see the examples 2001 and 2101 shown at the right). When starting a new PCB job, a “pcb” folder structure is automatically created for that project (as shown). Throughout the layout process, files generated are stored in their appropriate sub-folders.

FILE NAMES

.PRJ Design Capture schematics and the Expedition PCB database are centered around a “project file”. The project file is normally stored with the schematics, in the specific project folder, and takes on that project name with a .prj file extension.

Using the Windows Explorer, browse to c:\mgtraining\project\2101 and <double-

click> on 2101.prj. Design Capture should launch and open the project. In Design Capture, look around if you’d like. Select File>Exit from the menus and do not save any changes.

Note: Project files are discussed in more detail in the “Starting a PCB Layout” chapter.

.PCB The main file for a PCB database is stored in the project’s pcb sub-folder. By default, the filename takes on the project name with a .pcb file extension. Note: The .pcb file is not the complete PCB database. Many other files and folders are involved.

Using the Windows Explorer, browse to c:\mgtraining\project\2101\pcb and

<double-click> on 2101.pcb. Expedition PCB should launch and open the PCB database for editing.

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USER INTERFACE

Coordinate ReadoutAbsolute (xy) and Relative (dxdy) coordinates.

Path & ProjectCurrently open layout [and project].

Pulldown MenusContains most Expedition PCB

commands in the order ofprocess: Setup, Place, Route,

ECO, Analysis, and Output.

ToolbarsContains commonly used

commands.Position the mouse cursorover the button to display

the command name.

Titlebar

Work area

Action KeysDynamically changing

command options for the active command.

Can be invoked using thekeyboard function keys.

StatusbarDisplays information, settings,

status, and prompts.


PANNING & ZOOMING

USING THE MOUSE Panning and zooming in Expedition PCB is accomplished using the middle mouse key.

ZOOM IN To zoom in slightly, <middle-click> in the work area.

ZOOM OUT To zoom out slightly, <Shift><middle-click>.

ZOOM AREA To zoom in on an area, <Shift><middle-click-drag> from left to right, drawing a rectangle. To zoom out, <Shift><middle-click-drag> from right to left.

PAN To dynamically pan the view, <middle-click-drag>.

FIT BOARD / PREVIOUS VIEW To toggle between zooming in around the board outline and going back to the previous view, <Ctrl><middle-click>.

ADDITIONAL VIEW COMMANDS

FIT BOARD To zoom around the extents of the Board Outline, select View>Fit Board from the menus or <click> the Fit Board toolbar button.

FIT ALL To zoom around all graphics, select View>Fit All from the menus.

PREVIOUS VIEW / NEXT VIEW To go to a zoom factor used previously, select View>Previous View or View>Next View from the menus (or <click> the toolbar buttons).

Experiment with all of the panning and zooming mouse functions discussed here. Practice makes

perfect! <Click> the Fit Board toolbar button. <Click> the Previous View and Next View toolbar buttons.

3


DISPLAY CONTROL

The Display Control dialog in mainly used to control the display of graphics but has some other unique functions. Leave the dialog out on the desktop throughout the layout process for convenience.

Select View>Display Control from the menus or <click> the Display Control toolbar button.

Do not make any modifications on this dialog yet.

VISIBILITY AND COLOR Most of the graphic items listed on the dialog have a visibility checkbox and a color button for changing the color.

GROUPS Many of the graphic items listed on the dialog are arranged in “groups”. The graphics for a whole group can be toggled on and off at once using a group checkbox. To simplify the dialog, the group of items can be collapsed so only the group heading is displayed.

DISPLAY CONTROL SCHEMES Object visibility and object colors can be saved using Display Control “Schemes”. An unlimited number of schemes can exist for quickly displaying specific graphics such as layer 1 graphics, silkscreen graphics, drill drawing graphics, etc. These schemes can reside local (with the current layout only) or with the system (available to all layouts opened on a particular workstation).

At the lower-left corner of the Display Control dialog, <click> the Save Scheme button.

On the Save Scheme dialog, specify a Scheme name of temp. Toggle on Save locally with job and toggle off Save with VeriBest system files. <Click> the OK button. Note: In the real world you might want to just use the Save with PCB system files option.

To recall a saved scheme, select it from the pulldown list of existing schemes. To delete a saved scheme, select the scheme from the pulldown list (which activates the scheme) and then <click> the Delete Scheme button.

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PLACE & ROUTE The Place & Route tab of the Display Control dialog deals with placement filters, trace/pad graphics, the active routing layer, and various other toggles and color settings.

Allow/disallow the selecting of parts on a

particular side of the board.

(Discussed in the “Placing Parts” chapter.)

Graphics toggle for allTraces and all Pads.

Traces per layer. Graphic toggles and color settings.

Pads per layer. Graphic toggles and color settings.

Graphics toggles and color settings for

physical PCB layers. The “active” routing layer

can be set here also.

Grids group. Toggle grid visibility (not snap).

Group “collapse” button.

Netlines & Classlines group. Toggle netline and classline visibility.

Selected and Highlightedcolor settings. Toggles

for displaying Onlyselected and highlighted

items. (“Select” and “Highlight” are discussed

later in this chapter.).

Group graphics toggle.

The “active” layer. Traces and Pads for the active layer cannot be toggled off.

Planes group. Toggle plane data, shapes, and fill visibility.

Pads group. Toggle pad, via, and test point visibility. Through pads and vias can also be All Same Color.


GENERAL The General tab of the Display Control dialog deals with non-net and non-part related graphics and some miscellaneous editor settings.

Group “collapse” button.

Board Items group. Toggle visibility of board related graphics.

With Full Cursor toggled on, a “cross-hairs” cursor

displays when movingparts.

Set Pan Sensitivity. To slow the pan operation, reduce the setting.

With Auto Pan toggled on, the view

automatically pans whendragging an object

(trace, part, etc.) nearthe edge of the

workspace.

User Draft Layers group. User layers defined in Setup Parameters.

Group graphics toggle.

Fabrication Layers group. Toggle visibility of soldermask, solder paste, and drill drawing graphics.


PARTS The Parts tab of the Display Control dialog controls the display of part related graphics.

Master graphics togglesfor all Top side and/or Bottom side graphics.

Top side graphics column.

Bottom side graphics column.


NETS The Nets tab of the Display Control dialog allows assigning unique colors to each nets and Net Class.

Enable or disable the

unique colors assigned to Net Classes and nets

listed below. Choose which graphics should display the unique colors assigned to net classes and nets listed below. Assign colors to and

enable color visibility foreach Net Class in the

design.

Assign colors to and enable color visibility foreach net in the design.


PLACE/ROUTE/DRAW MODES

There are three modes of operation in the Expedition PCB – “Route”, “Place”, and “Draw”. Certain commands and functions are only available in their appropriate mode.

PLACE MODE Only in Place Mode can components be moved, rotated, pushed, or queried. (Place Mode is discussed in detail later, in the “Placing Components” chapter.) Note: Place Mode has it’s own toolbar and default Action Key commands.

ROUTE MODE Only in Route Mode can nets be selected and can traces be routed or modified. Netline, pin, and trace (net) information can only accessed in Route Mode. (Route Mode is discussed in detail later, in the “Routing” chapter.) Note: Route Mode has it’s own toolbar and default Action Key commands.

DRAW MODE Draw Mode is used for adding text, moving text (including reference designators), and drawing/copying board outlines, route borders, etc. Draw Mode is also used for adding/editing any drafting related graphics. Note: Draw Mode has it’s own toolbar and Properties dialog that displays only when in Draw Mode.

SWITCHING MODES By default, Expedition PCB comes up in Route Mode. There are several ways to switch modes:

• <Click> the appropriate toolbar button. • By default, Action Key 12 toggles between Route

Mode and Place Mode. When the Action Key label is Place, <click> it to enter Place Mode and vise versa.

• Certain menu commands automatically switch to the required mode (i.e. Edit>Place Part switches the mode to Place Mode).

On the Standard toolbar, <click> each of the mode buttons and watch for the

appropriate toolbar and Action Key changes. Draw Mode should also display a Properties dialog. If it does not, <click> the Draw Mode toolbar button again.

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SELECTING OBJECTS

Depending on the mode (Place, Route, or Draw), certain objects are selectable. Once selected, the objects can then be manipulated with that mode’s commands. Parts only are selectable in Place Mode, net related objects (traces, pins, and netlines) only are selectable in Route Mode, and draw type objects only are selectable in Draw Mode. The selected object uses the Selected color defined on the Display Control dialog, along with the object’s original color.

SELECTING PARTS In Place Mode, one or more parts can be selected. For some placement editing commands, parts must be selected prior to be acted on by the command. A “selected” part can be identified by the Selected color within the Placement Outline.

SINGLE SELECT To select a part, <click> on it. Any previously selected parts will then be deselected. To select additional parts, hold down the <Ctrl> key and <click> on them. This <Ctrl><click> can be used to select or deselect parts, without effecting other previously selected parts. To easily deselect all parts, just <click> anywhere where there are no parts.

GROUP SELECT To select a group of parts, <click-drag> a fence around them with the left mouse key. Parts that are totally or partially enclosed by the fence will be selected. Any previously selected parts will then be deselected.

On the Display Control dialog, take note of the Selected color on the Place & Route tab. On the

Parts tab, make sure Placement Outlines are toggled on. <Click> the Place Mode toolbar button. Now <click> on any part in the layout. If you look close at the part’s placement outline, the Selected color should be visible. Try the various part selection techniques discussed here. Use the Undo toolbar button if you move a part.

OTHER SELECT METHODS When in Place Mode, the Edit>Select All command will select all cells (parts). The Edit>Add to Select Set submenu contains additional commands for selecting “Fixed” and “Locked” parts (Fix and Lock are discussed later in this course). The Edit>Find command has a Select option which can be applied to the parts after finding them (“Find” is discussed later in this chapter).

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SELECTING NETS AND TRACES In Route Mode, one or more netlines, pins, or traces can be selected. Once selected, commands for routing, rerouting, glossing, tuning, and even deletion, can then be used. A “selected” net object, can be identified by the Selected color hatched with the object’s color.

SINGLE SELECT Single <click> on a pin to select that pin. Any netlines attached to that pin will also be selected. Single <click> on a netline to select it. Single <click> on a trace to select that trace segment. An optional second <click> at another location on that trace, selects all of the trace segments between the 1st <click> and 2nd <click>.

DOUBLE SELECT <Double-click> on a trace to select all of the trace segments between pins and/or “T” junctions.

TRIPLE SELECT <Triple-click> on a pin, netline, or trace to select all of the pins, netlines, and traces on that net.

GROUP SELECT To select a group of net related objects, <click-drag> a fence around them with the left mouse key. Netlines, pins, and trace segments that are totally or partially enclosed by the fence will be selected. Any previously selected net items will then be deselected. To select additional net items using group select, while maintaining the current selection, <Ctrl><click-drag> around the desired additional net items.

Note: Any combination of single/double/triple and group select can be used.

While still in Place Mode, select a part. Now <click> the Route Mode button and notice all of the pins on

that part become selected. <Click> on nothing to deselect those pins. Now experiment with the other select methods discussed here.

OTHER SELECT METHODS When in Route Mode, the Edit>Select All command will select all traces, pins and netlines. The Edit>Add to Select Set submenu contains commands for selecting Fixed and Unfixed traces and vias, along with other special net related objects (“Fix” and “Unfix” for traces is discussed later in the course). The Edit>Find command has a Select option which can be applied to Nets, Net Classes, and Parts pins after finding them (“Find” is discussed later in this chapter).

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SELECTING DRAW OBJECTS In Draw Mode, one or more draw type objects can be selected. Once selected, their properties can be changed or the objects can be deleted (with some exceptions). A “selected” draw object can be identified by the Selected color hatched with the object’s color. Below is a list of draw object “types”.

SINGLE SELECT <Click> on a draw object to select it. To select additional draw objects or deselect specific draw objects, <Ctrl><click> on each of the objects.

GROUP SELECT To select a group of draw objects, <click-drag> a fence around them. Warning! Traces and part graphics can be selected in Draw Mode and modified with draw commands.


HIGHLIGHTING To “highlight” an object is to put a place-holder on that object for future selecting. Parts, pins, traces, and netlines can be highlighted. Like a “selected” object, a highlighted object can be identified by the Highlighted color (defined on the Display Control dialog) hatched with the object’s color. If an object is both “highlighted” and “selected”, both colors are displayed along with the object’s color.

HIGHLIGHT To highlight parts or net objects, they must first be selected. Once selected, use Edit>Highlight from the menus or <click> the toolbar button. These objects can then be deselected (and re-selected) without effecting their highlight status.

SELECT HIGHLIGHTED After other editing tasks that involved selecting and deselecting objects, the previous highlighted objects can then be easily re-selected using Edit>Add to Select Set>Highlighted Items from the menus.

UNHIGHLIGHT Highlighted objects stay highlighted until they are specifically “unhighlighted”. To unhighlight selected objects, use Edit>Unhighlight from the menus. To unhighlight all highlighted objects, use Edit>Unhighlight All from the menus or <click> the toolbar button.


FINDING PARTS AND NETS

The “Find” command is used to find parts, part pins, nets, and net classes (groups of nets) within the PCB layout.

Select Edit>Find from the menus or <click> the Find toolbar button. Leave the Find dialog out on

the desktop for convenience.

<Click> on a column heading to sort the items, toggling between ascending and descending order. <Click> on any item in a column and then press the first letter (on the keyboard) of the desired item to quickly scroll to or near the desired item.

The Graphic options used when finding a part or net is to Select it when found, Highlight it when found, and/or Fit view around it.

PLACE MODE VS. ROUTE MODE • During a Net or Net Class search, Expedition PCB

automatically switches into Route Mode. • During a Part search in Place Mode, any of the

Graphic options will use the Placement Outline of the part.

• During a Part search in Route Mode, any of the Graphics options will use all of the pins of the part.

• During a Part search in Place Mode with a pin number chosen from the Pin list, Expedition PCB switches into Route Mode and any of the Graphics options will use that specific pin.

On the Find dialog, search for a Net or Part using the Select and Fit view Graphics options. Use the

Apply button for each search to keep the dialog open. Be aware of what “mode” you are in when performing a search. Close (Cancel) the Find dialog when you’re satisfied and your search is over.

Note: While in Route Mode, multiple items can be selected Find dialog.

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FILE VIEWER

Most processes in Expedition PCB generate a log file. Always read the log file for a given process to make sure that there are no problems. The “File Viewer” is an ASCII text file viewer accessible from within Expedition PCB. It views .txt and .logfiles for the current layout.

Select File>File Viewer from the menus or <click> the toolbar button. <Click> on a file in

the list and view the contents of it in the view window. Close the File Viewer dialog when you are done looking through some of the files.

By default, the latest log file is displayed. Log files can be printed or deleted from within the File Viewer.

HELP

Like other Windows applications, Expedition PCB has an extensive online help system.

COMMAND REFERENCE To access the “Command Reference” directly, select Help>Contents from the menus or use the 1 Help (<F1>) Action Key from the “default” Action Keys.

PROCESS GUIDES A “Process Guide” for an Expedition PCB layout is accessible by selecting Help>Process Guide from the menus.

CONTEXT SENSITIVE HELP When in any command dialog, look for the Help button to access the Command Reference for that particular command or dialog. The <F1> key is available is also available at any time for context sensitive help.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION H-1

PART

NUMBER

NETN

AME REF DES

NETPROPERTY

LP

OCALARTS

LC

OCALELLS

D PEVICE LACE

S PYMBOL LACE

PACKAGER

COMPILE

ABSORB

IMPORTSYMBOLS IMPORT

B AACK NNOTATE

PC

LACEOMPONENT

LP

OCALADSTACKS

PCB LAYOUTSCHEMATIC

CD

OMMONATABASE

FA

ORWARDNNOTATE

FA

ORWARDNNOTATE

CELLSL

TAYOUT

EMPLATESPADSTACKSPARTS

McQuillinMay-1999

LP

OCALARTS

H STARTING A PCB LAYOUT This chapter discusses the transfer of data from a Design Capture schematic to an Expedition PCB layout. The topics covered are:

� DESIGN SOURCE � CREATING A NEW PCB JOB

H-2 EXPEDITION PCB INTRODUCTION WG2000

DESIGN SOURCE

The word “integration” is used when associating a Design Capture schematic or an ASCII netlist to a Expedition PCB database.

COMMON DATABASE The integration specifically between Design Capture and Expedition PCB is handled through a Common Database, or “CDB”. Expedition PCB directly reads from and writes to the CDB, not the schematic.

The CDB is initially created from a Design Capture schematic and contains any connections, reference designators, and part numbers that were assigned in the schematic. The CDB could also contain various component properties and net properties. Physically, the CDB is a hierarchy of file folders with the electronic information stored in a binary format for quick access. Note: The specifics of creating a CDB is a Design Capture issue and will not be covered in this course. A previously completed Design Capture schematic and CDB will be supplied. This is a common “real world” scenario – the electronic engineers supply the PCB designer with the schematic data.

PREPARING THE DESIGN SOURCE The first thing that must be done to start a Design Capture project (schematic) and/or a PCB layout is to have a designated project area on the computer’s harddrive to store the data. If the design source is a netlist, then a specific project folder needs to be created for the PCB data. If the design source is a Design Capture schematic and that schematic/project is in the works, then a project specific folder will already exist, containing the necessary subfolders and files. For PCB layout, it’s just a matter of continuing in the existing project. If someone other than the PCB designer has generated the schematic data, one scenario for accessing that data would be to “share” it across a network. In such case, a project specific folder would need to exist on the local workstation for the PCB data. Another scenario is to move the schematic data locally, and then continuing with the PCB layout there. Either scenario has pros and cons but both work. In this course, the schematic data will already exist locally. The next couple of topics will involve making the actual link between the schematic and layout.

CDB

Design Capture

Expedition PCB


CREATING A NEW PCB JOB

Creating a new PCB job involves locating the design source schematic or netlist, copying a PCB template, and forward annotating.

JOB MANAGEMENT WIZARD The Job Management Wizard is the Expedition PCB tool used to start a new PCB layout and perform the initial Forward Annotation.

<Click> the Windows Start button and navigate to Programs>Mentor Graphics 2000.0>Expedition

PCB and select Job Management Wizard from the menu.

The Job Management Wizard is also great for copying, renaming/moving, cleaning up, and deleting jobs (projects). For these options a PCB layout must have already been created in the job.

On the Welcome dialog, make sure the Create option is selected. <Click> the Next button to begin the PCB

creation process.

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THE PROJECT Design Capture schematics are created based on a “project”. For Design Capture, a “Project File” will contain a list of the different schematic blocks used in the project, a pointer to the CDB, and a pointer to the Central Library.

On the Create dialog, <click> the Browse button and browse to c:\mgtraining\project\2001

and open 2001.prj. Verify that the Source project filename field contains the desired path and project file.

“Integrating” a Design Capture design source to a Expedition PCB layout is simply a matter of sharing a Project File. Note: If a design source other than a Design Capture schematic is to be used, a Project File is still required.

On the Create dialog, <click> the Edit button to take a peek into the Project File. Look around the

Project Editor dialog.

PROJECT EDITOR The Project Editor is used here primarily to view the pointers to the Central Library and Netlist (schematic) design source for the project. These pointers were set up previously, when the schematic was created.

If a design source other than a Design Capture schematic is to be used, such as an ASCII netlist, it needs to be specified here. Note: Only one Central Library at a time can be associated to a project. Changing to a different Central Library at this point is not recommended.

On the Project Editor dialog, <click> the Close button (or the Cancel button if you made changes). Back at

the Create dialog, <click> the Next button to continue.

COPYING PCB FILES With the schematic located, the project now needs to know where to store the PCB layout files. The default location is in a PCB folder within the current project path. A PCB template from the Central Library must also be chosen.

The second Create dialog asks for a New PCB design filename and PCB layout template. Select the

training PCB layout template from the list (that created in a previous lab).

<Click> the Next button.

The template files are copied to the specified PCB folder, waiting to be stuffed with part and net information.

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FORWARD ANNOTATION Forward Annotation is the process of bringing electronic information (parts and connections) from the schematic CDB or netlist into the PCB layout database. The third and final Create dialog has options to Compile CDB and Forward annotation. If the Design Capture schematic process was done correctly, the Compile CDB option is unnecessary and unavailable.

On the Create dialog, verify that the Forward annotation option is toggled on and

then <click> the Start or Continue Process button. Watch the Process status. If the Finish button was accidentally used, inform your instructor. Forward Annotation can be completed later within the Expedition PCB editor.

DATABASE LOAD Database Load looks at the CDB and determines if every device has a Part Number and if that Part Number exists/matches what’s in the Central Library. The CDB is checked further for incomplete or incorrect packaging based on the parts in the Central Library. When all is well, the specific parts are then extracted from the Central Library and dumped into a local “design specific” library and also dumped into the layout database itself. The cells called out by each of the parts is extracted and dumped into the local library, along with the necessary padstacks.

NETLOAD Finally, Netload extracts net information (connections, net names, net properties, etc.) from the CDB and dumps it into the PCB layout.

Refer to the data flow diagram at the beginning of this chapter to help understand what happened.

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FORWARD ANNOTATION LOG A log is generated after each Forward Annotation process. (Forward Annotation will also take place throughout the layout process if changes in the design source are made.) Always review the log for warnings and/or errors.

After the process completed, <click> the View Process Report Files button to open the Forward

Annotation log. Look through the Forward Annotation log. You should see no “errors”, just warnings of Net “{abc}” is being added to Layout. Close the log (Notepad) when you’re done studying it.

If errors do exist they may be reconciled later without re-creating a new PCB. Some of the most common errors have to do with Part Number discrepancies between the schematic (CDB) and the Central Library or that parts/cells are missing from the Central Library altogether.

On the Create dialog, <Click> the Finish button. Look over the Summary dialog and then <click> the

Close button.

OPENING THE PCB LAYOUT All of the components and nets from the design source (schematic) are in your PCB database, ready to be placed and routed.

Using the Windows NT Explorer, browse to the c:\mgtraining\project\2001\pcb folder

(hint: Start>Programs>Windows Explorer). <Double-click> on the 2001.pcb file to launch Expedition PCB and open your new PCB database.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION I-1

I SETTING UP THE LAYOUT This chapter discusses preliminary settings and rules needed for the PCB layout. The topics covered are:

� SETUP PARAMETERS � NET CLASSES OVERVIEW � NET PROPERTIES OVERVIEW � EDITOR CONTROL � BACKING UP THE DESIGN � RESTORING FROM A BACKUP � CREATING A DESKTOP SHORTCUT

I-2 EXPEDITION PCB INTRODUCTION WG2000

SETUP PARAMETERS

When starting a new layout, some project specific settings need to be defined in “Setup Parameters”. These would include physical settings such as the layer stackup and electrical settings such as plane net assignment. Note: Not all Setup Parameter settings will be covered in this course.

Open your “2001” PCB layout if it’s not already open. Select Setup>Setup Parameters from the menus.

On the Setup Parameters dialog, <click> on each of the tabs and briefly look at what kinds of settings can be made. (Do not change anything yet.)

PHYSICAL LAYERS The number of physical layers needs to be specified – ideally at the beginning of the layout process.

On the Setup Parameters dialog, <click> the General tab.

Specify the Number of physical layers to be 6 instead of 10. <Click> Remap Layers button.

The Number of physical layers can be changed anytime during the layout with the top and bottom layers preserved. Also, the internal layers can be rearranged using the Remap Layers dialog.

PLANE LAYERS A whole PCB layer can be dedicated to a power plane, making it off-limits (by default) to signal traces. This must be set up prior to routing. Plane data can be generated as “positive” or “negative” graphics.

On the Setup Parameters dialog, <click> the Planes tab.

Locate Layer 3 in the Plane Assignments list. <Double-click> in the Layer Description field for that layer and select Plane from the pulldown list. Similarly, change the Plane Type field from Positive to Negative.

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PLANE NETS When changing a Signal layer to a Plane layer, any net in the design is made available for plane assignment.

With Layer 3 still selected in the Plane Assignments list, <click> on any net in the Excluded Nets list

below it. Now press the <G> key on the keyboard. The GND net should be selected. <Click> the single right arrow button to move GND to the list of Included Nets at the right (or just <double-click> on the net name.

Shield Net, the net at the top of the Excluded Nets list, is used for generating plane data that does not tie to any pins.

USING THE ROUTE BORDER Plane data can be generated within hand-drawn Plane Shapes on the layout or within the Route Border. The Route Border is mainly a keep-in area when routing signal traces. Note: The Route Border will be discussed in the “Defining Board Geometry” chapter later in the course. Plane Shapes and Plane Data will be discussed in the “Generating Planes” chapter.

With the GND net listed in the Included Nets, toggle on the radio button to the left of GND. The Route

Border will then act as a plane shape on this layer.

PLANE CLEARANCES A plane clearance can be set for each plane net. This is the minimum clearance allowed between two planes or between a plane and a mounting hole.

A larger clearance is commonly required for plane layers. <Click> in the Clearance field for GND and

change the default clearance from 8 to 12.

Note: The default clearance value came from the Net Class Clearances settings (discussed later in this chapter). If the value is modified here, the larger of the two values (Net Classes and plane clearances) will be used when processing the plane data.

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SETTING UP FOR A SPLIT PLANE A “split plane”, a plane layer containing more than one plane net, may be defined. Split planes can be generated as “positive” or “negative” graphics.

Locate Layer 4 in the Plane Assignments list. Like the previous plane assignment, change the Layer

Description to Plane and the Plane Type to Positive (if it’s not already).

All of the required nets for a split plane must be specified so the automatic router does not attempt to route these as signal traces on another layer.

Select VCC from the Excluded Nets. Hold down the <Ctrl> key and select VDD and VEE. With

these three nets selected, <click> the single right arrow button to move them to the Included Nets list.

USING THE ROUTE BORDER WITH SPLIT PLANES On an any one layer, only one plane net can be assigned to use the Route Border as a plane shape.

In the Included Nets list, toggle on the radio button next to the VCC net. The Route Border will then act

as a plane shape on this layer for the VCC net only.

Also, set each of the nets to have a Clearance of 12th between each other.

DEFAULT VIA Vias act as interconnects between layers when routing traces. A single via padstack, from the local padstack library, needs to be chosen as the “default via” for the layout.

On the Setup Parameters dialog, <click> the Vias tab.

Under Via span definitions and clearances, <click> in the Padstack field for the existing span. From the pulldown list, select 25th via pad.

Different vias can be assigned to different groups of nets by means of “Net Classes” (discussed later). This default via will be used during automatic and interactive routing when no other via is specifically assigned to the net being routed. The via span shown on the dialog is a cross-section representation of a “through” via. Note: Additional via spans can be set up here for “blind” and for “buried” via technology. There will always be a “through” via span.

<Click> the OK button at the bottom of the Setup Parameters dialog to save all of your settings. A Reloading layout database message will appear

briefly. Remember “Setup Parameters”… you will be back here again.

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NET CLASSES OVERVIEW

Nets can be grouped into “Net Classes”. A Net Class can then be assigned it’s own via, trace widths, layers, and trace clearance rules. Net Classes can be set up during the schematic capture phase and/or the layout phase. Assigning the actual nets to Net Classes is accomplished using “Net Properties” (discussed later).

Verify the Net Class rules that came over from the schematic by selecting Setup>Net Classes and

Clearances from the menus.

NET CLASS NAMES At the upper-left of the dialog is a list of the existing Net Classes. Net Classes can be created here by using the New Net Class and the Copy Net Class buttons, or deleted using the Delete Net Class button. A “Default” Net Class always exists and cannot be deleted. Any net not assigned to a user-defined Net Class is automatically assigned to the Default Net Class. Selecting a Net Class name in the list displays the settings for that Net Class throughout the rest of the dialog.

NET CLASS ROUTING LAYERS In the Widths & Impedance by Layer section of the dialog, layers can be toggled off to disallow any future routing for the selected Net Class.

With the Default Net Class selected in the list, toggle off Layer 3 and Layer 4.

<Click> on the power Net Class in the list (this Net Class has been set up previously in Design Capture). Toggle off Layer 2, Layer 3, Layer 4, and Layer 5 for this Net Class (picture is for reference only).

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NET CLASS TRACE WIDTHS In the Widths & Impedance by Layer section, trace widths (and impedance values) on a layer by layer basis, can be specified for the selected Net Class. The Typical Width is the main trace width that will be used to route the nets in this Net Class.

NET CLASS VIA SPANS In the Attributes section of the dialog, a Net Class can have a specific via padstack assigned to each via span (overriding the via span padstack defined previously in the Setup Parameters dialog).

With the power Net Class selected, choose a new Via for This Net Class from the pulldown list at the

right. Select 40th via pad.

CLEARANCE RULES The Net Class Clearances dialog is used to set “Net Class to Net Class” clearance rules as well as general clearance rules.

<Click> the Clearances tab at the top of the Net Classes and Clearances dialog to verify the clearance rules set up previously.

As with all Net Class settings, these clearances could also be defined during the schematic capture phase.

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GENERAL CLEARANCES The General clearances rules section of the dialog has no correlation to Net Classes. It’s mainly for setting clearance rules between components, component pads, mounting holes, board outline, etc.

The General clearances rules might need some tweaking. Help yourself if see something that

needs adjusting.

NET CLASS CLEARANCES

CREATING CLEARANCE RULES In the Clearance rules for Net Classes section of the dialog, trace/pad/via clearance values can be specified and assigned a rule name. Several of these named rules, using different clearances, may exist in a design (see the example below).

Like the default via and the default Net Class, the “default” clearance rule is used when no other clearance rule is specified or in effect. The Default Rule always exists and cannot be deleted.

USING CLEARANCE RULES In the Net Class to Net Class rules section of the dialog, the previously defined clearance rules can be applied between two Net Classes (or within the same Net Class) on specific layers.

The above example translates as: The clearance between any net in the high speed Net Class to any other net in the high speed Net Class, on Layer 2, must use the fine line rule. Again, a “default” Net Class rule always exists and it translates as: All Net Classes to All Net classes, on All layers, must use the Default Rule. When Net Class rules overlap, the most restrictive rule wins.

<Click> the OK button at the bottom of the Net Classes and Clearances dialog to save the changes and close the dialog.

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NET PROPERTIES OVERVIEW

“Net Properties”, in Expedition PCB, consists mainly of signal integrity routing constraints such as Net Order, Timing & Differential Pairs, Crosstalk, and Delay Formulas, which are assigned to nets.

Select Setup>Net Properties from the menus. On the Net Rules tab, <click> on each of the four sub-tabs to see what kinds signal integrity rules

can be set. (Do not change anything.)

ASSIGNING NETS TO NET CLASSES Net Properties also involves nets being assigned to Net Classes. And as with Net Classes, Net Properties can be set up during the schematic capture phase. Note: Net Properties is an advanced topic. This course only covers Net Properties as far as Net Classes are concerned.

On the Net Order sub-tab, <click> on the Net Class column heading to sort the list of nets by

Net Class. If the power Net Class does not appear at the top of the list, <click> the column heading again to reverse the sort.

A real-world scenario might be to need wider traces and larger vias when routing ground and voltage nets. To do this, just make a special Net Class for them.

The nets GND and VCC are already assigned to the power Net Class. Scroll down through the list

of nets and locate VDD. <Click> in the Net Class field for the net (the first column) and select power from the list. Repeat the process for VEE also.

Note: As with most lists in Expedition PCB, multiple items can be selected and changed in a single step by using a <Shift><click> at the end of the selection range.

<Click> the OK button at the bottom of the dialog to save and exit Net Properties.

<Click> the Save button on the Expedition PCB Standard toolbar to save your layout.

While the layout is being saved, Net Properties changes are back annotated to the CDB, along with any Setup Parameters and Net Class changes.

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EDITOR CONTROL

The “Editor Control” contains additional settings that are likely to change often through the layout process which include save intervals, routing behavior, placement rules, grids, etc. Note: Only basic Editor Control settings will be covered – on an “as needed” basis throughout the course.

Select Setup>Editor Control from the menus (or <click> the toolbar button). On the Editor Control dialog, <click> on each of the tabs and

briefly look at what kinds of settings can be made (do not change anything yet).

AUTOSAVE INTERVALS When working in Expedition PCB, changes are stored in memory and must be saved to disk. “AutoSave intervals” times can be specified to save the layout automatically.

On Editor Control dialog, <click> the General tab. In the AutoSave intervals section. Verify that the Interactive save set to 60 minutes. Specify an

Auto Route save of 10 minutes. <Click> the OK button.

The Interactive setting saves the layout database. It’s the same as selecting File>Save from the menus. The Auto Route setting saves a “checkpoint” file. In the event of an ungraceful exit from Expedition PCB and then re-opening the layout, a prompt appears asking if the checkpoint file should be restored.

BACKING UP THE DESIGN

Making backups of the layout in progress, of course, is very important. With certain major operations in Expedition PCB, such as forward/back annotation and renumbering reference designators, restoring from a backup is the only way to recover from an experiment gone bad.

Select File>Save Copy from the menus. <Click> the Yes button when prompted to save your layout

to disk. Read the next steps carefully!

The “Save Copy” command copies by project, so the schematic and CDB get copied along with the layout, keeping everything in sync.

On the Job Management Wizard Copy dialog, <click> in the New project filename field and type

c:\mgtraining\project\2001start\2001.prj (or cut & paste from the Source project filename field and make the appropriate edits). Now just <click> in the New PCB design filename field to fill it in automatically.

It is recommended to treat the backup as a separate project, giving it it’s own project folder. For ease of restoring, leave the project file name the same.

<Click> the Finish button to make the copy. Read and close the Summary dialog.

<Click> the Exit toolbar button and exit Expedition PCB.

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RESTORING FROM A BACKUP

Restoring from a backed up design is done through the same “Job Management Wizard” used to start the layout. The following is the general steps to restoring a backed up design to it’s original name (these are not lab items).

1. Exit Expedition PCB and open the Job Management

Wizard dialog.

2. Use the Delete option to delete the current “no good” project.

3. Use the Copy option to copy the backup project to the original location.

CREATING A DESKTOP SHORTCUT

A “shortcut” to the new layout database can be placed on the Windows desktop for convenient launching.

Using the Windows NT Explorer, browse to the c:\mgtraining\project\2001\pcb folder.

<Right -click-drag> the file 2001.pcb and drop it anywhereon your Windows desktop.When a menu pops up, selectCreate Shortcut(s) Here. Windows shortcut icons contain a small arrow in the lower-left corner of the icon. The shortcut is not the actual .pcb data file, just a pointer to it. To quickly open that specific PCB layout, just <double-click> the icon.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION J-1

J DEFINING BOARD GEOMETRY This chapter discusses the board graphics that will be needed before placement and routing. The topics covered are:

� COORDINATES OVERVIEW � BOARD OUTLINE � MOUNTING HOLES � ORIGINS � PLACEMENT OBSTRUCTS � ROUTE BORDER � ROUTE OBSTRUCTS

0.00

0

3.00

03.

150

0.00

00.

100

0.40

0

0.1000.0000.100

0.675

1.875

2.4502.5502.650

0.125 X2

0.050 X2

0.062R X2

0.096 DIA X2

0.062 DIA X2

0.100 X2 BOTH SIDESNO COMPONENTSNO ROUTES

J-2 EXPEDITION PCB INTRODUCTION WG2000

COORDINATES OVERVIEW

Since this chapter is about creating board graphics, it’s important to know how to read coordinates and rotations.

CARTESIAN COORDINATES The “Cartesian” coordinate system for 2D drawings consists of a positive and negative “X” axis, and a positive and negative “Y” axis.

ABSOLUTE With “Absolute” coordinates, everything in the layout has an absolute X/Y location. Where the X axis and Y axis intersect is “0/0”.

RELATIVE “Relative” or “Delta” coordinates work on the same X/Y concept but only in relationship to an existing coordinate, commonly used for moving an object or continuing a linestring from a previous location.

POLAR COORDINATES Polar coordinates are used in conjunction with relative Cartesian coordinates for specifying angles when rotating objects or continuing a linestring in a specific direction.

BOARD OUTLINE

The “Board Outline” in Expedition PCB, is an intelligent closed polygon which is used as the component placement area of the layout. No matter how simple, every PCB database contains a single Board Outline. The Board Outline cannot be deleted – creating a new Board Outline replaces the existing one.

IMPORTING AN OUTLINE A Board Outline can be created by importing a “DXF” graphic from an external drawing application, such as MicroStation or AutoCAD. Once imported, this graphic can then be turned into an intelligent Board Outline graphic. Note: The graphic must be created as a “polyline” in the external drawing application.

CREATING AN OUTLINE Alternately, a Board Outline can be created from scratch using the drawing tools within Expedition PCB. This is the method covered here.

Open your “2001” PCB layout if it’s not already open. Zoom out slightly (hint: <Shift> <middle-click>).

Select Edit>Place>Board Outline from the menus.

+X

-Y

+Y

-X

0,0

0°

270°(-90°)

(-270°)90°

180°

1


The Place Board Outline command switches Expedition PCB into “Draw Mode” and displays a Properties dialog. At the top of the Properties dialog, the Type field lists the current object type to be drawn – which is, of course, Board Outline. The draw polygon command is active. Note: It is not necessary to ever close the Draw Mode Properties dialog, it will close automatically when switching out of Draw Mode. If the Properties dialog is ever not displayed and should be, <click> the Draw

Mode toolbar icon again or the Properties button on

the Draw toolbar to re-display it.

PRECISION INPUT The Board Outline can be drawn by visually locating the vertex points with the mouse or entering absolute coordinates using the Properties dialog or any combination of the two.

In the Vertices table of the Properties dialog, <click> in the blank field under the X column (vertex 1) and

type in -100 and press the <Enter> key. The text cursor should now be in the Y column – type in -100 again and press <Enter>. A new blank vertex 2 will be added. Continue specifying the eight X and Y coordinates as shown below, pressing <Enter> after each. If you entered an incorrect value, just continue on… you can adjust it later. Use the mechanical drawing at the beginning of the chapter for reference.

Wait! The last coordinate is not specified yet.

The final segment of the Board Outline must be added, completing the polygon, using one of two methods. By either specifying the same coordinate as vertex 1 or…

<Right-click> in the drawing area and then select Close Polygon from the pop-up menu to close the

Board Outline polygon automatically.

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MODIFYING THE BOARD OUTLINE The Board Outline is a “draw” object that can be modified by moving, adding, and deleting vertices. Fillets and chamfers can also be applied to vertices. The draw object must be “selected” prior to making modifications. Once selected, handles appear on the object.

Start point marker (object origin)

Selected Endpoint handle

Midpoint handle

Endpoint handle (vertex)

Note: Most of the draw commands discussed in this chapter can be used on most draw objects.

SNAP GRID On the Draw mode toolbar (below the drawing area), <click> the Set Snap Grid arrow button.

Snap Grid(toggles snap

on/off)

Set Snap Grid(specify asnap grid)

Select 25 from the list of preset grids.

MOVING AN ENDPOINT HANDLE An endpoint handle (vertex) can be moved by first selecting the draw object, then <click-drag> the desired endpoint (square shaped) handle to its new location. An endpoint handle can also be moved by numbers, using the Properties dialog.

If you made any typos while entering coordinates, select the Board Outline graphic and change the

appropriate number values on the Properties dialog. <Click> the Fit Board toolbar button to see the whole board.

DELETING AN ENDPOINT HANDLE To delete an endpoint handle, first select the draw object, then select the desired endpoint handle. When selected, the endpoint handle displays filled. Finally, on the Draw toolbar (below the drawing area), <click> the Delete Endpoint Handle button.

INSERTING AN ENDPOINT HANDLE To insert an endpoint handle, first select the draw object, then <Ctrl> <click-drag> on the midpoint (diamond shaped) handle of the desired line segment.

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CHAMFERS A vertex can easily be changed from a 90º corner to a 45º “chamfer” of a specified size.

Select the Board Outline if it’s not already selected. On the Properties dialog pull down the Vertex Type

list and select Chamfer.

Pull down the Chamfer Cut list(immediately to the right of the VertexType). Type in 125 in the bottom fieldand then press <Enter>.

Pull down the Chamfer Cut list again and verify that 125 is now in the list and that it is also selected.

Once the chamfer size is defined and set as the current size, it can then be applied to a vertex on the object.

Select the endpoint handle at the upper-right corner of the Board Outline (refer to the mechanical drawing at

the beginning of the chapter). Immediately change the Vertex Type to Chamfer on the Properties dialog. If the handle deselects before you get a chance to select a different Vertex Type, just re-select the handle and try again. Similarly, change the lower-right corner of the Board Outline to a chamfer. Note: The simplest way to recover from a mistake here is to <click> the Undo toolbar button.

The last used chamfer distance will stay the active distance when creating future chamfers. All user specified distances will remain in the Chamfer Cut list for the current layout.

With the Board Outline graphics still selected, select a Chamfer Cut size of 50 from the list on the Properties

dialog. Apply this 50th chamfer to the two corners of the tab on the left side of the Board Outline (refer to the mechanical drawing at the beginning of the chapter).

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FILLETS A vertex can be changed from a corner to a “round” (fillet) of a specified size.

With the Board Outline graphics still selected, select Round from the Vertex Type list on the Properties

dialog. Add 62 to the list like you did previously for chamfers. Apply this 62th fillet to the two inside corners on left side of the Board Outline (see the mechanical drawing at the beginning of the lab).

“Round” vertices are true arcs and contain a single handle. To change the radius, select the handle and then choose a different radius from the list on the Properties dialog.

If you want to start a new Board Outline because you botched this one, just redraw it and the

previous Board Outline will disappear. If your satisfied with your beautiful hand-crafted Board Outline, <click> the Save toolbar button. Note: From now on you will get very few reminders to save the layout – get in the habit of doing it.

ROUTE BORDER

The “Route Border” is a route keep-in area for the PCB layout. As with the Board Outline, every PCB database contains a single Route Border. The Route Border cannot be deleted – creating a new Route Border replaces the existing one.

CREATING A ROUTE BORDER Just like the Board Outline, a Route Border can be created from scratch using the drawing tools. The command is at Edit>Place>Route Border on the menus.

COPYING THE BOARD OUTLINE A more convenient and consistent method for creating a Route Border is to copy the Board Outline. As with most “draw” objects, one object can be copied to another object by first selecting the source object, then a <Ctrl><double-click> on that object.

While in Draw Mode, select the Board Outline graphic. Notice the Properties dialog displays the

selected object Type of Board Outline. Now <Ctrl><double-click> on the selected Board Outline. If the Properties dialog now displays the Type as a Draw Object, then the copy process was successful. The new object is now the selected object. Be sure and leave it selected.

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OBJECT TYPE The newly copied object is always a generic “Draw Object” and is also the currently selected object. Choosing a different Type of object on the Properties dialog, dynamically changes the selected object to that type – such as a Route Border.

With the copied object still selected, pull down the Type list on the Properties dialog and select Route

Border. Notice that the old Route Border disappeared. Continue to leave the object selected.

Note: If more than one draw object are directly stacked on top of one another, select one of them and then press the <Tab> key to toggle through all of them while watching the Type field on the Properties dialog.

SHRINK/GROW Copying a draw object this way creates the duplicate directly on top of the original and then makes that the selected object. The selected object can easily be resized by specifying a value in the Grow/Shrink field of the Properties dialog. A positive value will “grow” the object and a negative value with “shrink” the object.

With the newly copied object still selected, on the Properties dialog, specify a Line width of 0 and a

Grow/Shrink distance of -50 (at the bottom of the dialog) and then press the <Enter> key.

Note: Selecting each draw object will display information about that object on the Properties dialog.

MOUNTING HOLES

“Mounting Holes” are special padstacks that represent plated or non-plated holes in the PCB layout. Mounting holes can be accessed directly from the Central Library. Note: Mounting Holes selected from the Central Library are automatically copied to and used from the local “design specific” library.

PLACING MOUNTING HOLES Select Edit>Place>Mounting Hole from the menus.

On the Place Mounting Hole dialog, select Central: 62th tooling hole from the Padstack pulldown list.

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NET NAME “Plated” mounting holes can then be assigned a net if desired by choosing from the list of nets in the design. This option is unavailable for “non-plated” mounting holes. As discussed previously, the “Hole” within the padstack is where the Plated status is set.

LOCATION If the exact location of a mounting hole is known, the absolute X and Y coordinates can be specified.

Specify the Location of the mounting hole to be X:0 and Y:0 (this will place it at the database origin of

the layout). <Click> the Apply button to place the mounting hole into the layout. See it? If you made a mistake, don’t worry, you’ll get a chance later to move or delete it. With the dialog still open, add a second 62th mounting hole at X:0 Y:2550. <Click> the Apply button.

If it is preferred to place the mounting hole using the mouse, then the X and Y fields need to be left blank. An OK or Apply button <click> would then attach the Mounting Hole padstack to the cursor for manual placement.

LOCK STATUS A mounting hole can be placed as Fixed or Locked. Both would keep the mounting hole from being accidentally moved later. The critical locations of items, such as mounting holes, warrant a Locked status. Locked allows the temporary use of the Fix and Unfix commands without affecting “locked” mounting holes.

Two more mounting holes are needed. Choose Central: 96th tooling hole from the Padstack

pulldown list. Place it at X: 3000 Y: 100 and assign a Lock status of Locked. Place another of the same at X: 3000 Y: 2450. <Click> the Cancel button on the Place Mounting Hole dialog. Your layout should now match the mechanical drawing at the beginning of the chapter.

Fixed mounting holes display hatched and Locked mounting holes display unfilled.

15 16


MOUNTING HOLE PROPERTIES Mounting holes, already placed in the layout, can be manipulated using the Padstack Properties dialog.

While in Route Mode, <right-click> on one of the smaller 62th mounting holes (on the left side of the

layout) and select Properties from the pop-up menu.

CHANGING PADSTACKS The placed mounting hole can be swapped out by selecting a different padstack from the Padstack list.

MOVING THE MOUNTING HOLE To move the mounting hole, specify new Location coordinates – Absolute or Delta.

LOCKING THE MOUNTING HOLE The Lock status of the mounting hole can be changed to Fixed, Locked, or None.

If you need to specify a different padstack and/or move the mounting hole, do it now. On the

Padstack Properties dialog, choose the padstack and/or edit the Location fields (based on the previous steps). When you’re ready, change the Lock status to Locked. <Click> the Apply button. With the Padstack Properties dialog open, select the other 62th mounting hole graphic and make similar changes. <Click> the Apply button.

To change or move Mounting Hole padstacks, the Lock status must be set to None and then applied.

With the Padstack Properties dialog open, select each of the 96th mounting holes (on the right side

of the layout), making any necessary changes. Remember to apply any Lock status changes before and after any Padstack or Location changes. <Click> the OK button or Cancel button to close the dialog.

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ORIGINS

“Origins” determine the absolute 0/0 point for locating and reporting graphics and data within the layout. Two separate origins are used in Expedition PCB.

BOARD ORIGIN The Board Origin is the database origin. All displaying and reporting of “absolute” coordinates in the layout (except NC-Drill) is based on this origin.

DRILL ORIGIN The NC-Drill Origin is used in reporting coordinates for NC-Drill data.

MOVING ORIGINS The Board Origin and the NC-Drill Origin can each be moved at any time to anywhere in the layout. By default, the NC-Drill origin is at the same location as the Board Origin.

Select Edit>Place>Origin from the menus. If necessary, <click> the Fit Board toolbar button to

see the origins in the lower-left corner of the board.

When specifying a new location for the NC-Drill Origin, the coordinates are relative to the current Board Origin.

On the Place Origin dialog, set the origin Type to Board. Specify a new Location of X: -400 Y: -100.

<Click> the OK button and wait for the database to adjust to the new origin. Note: From now on all coordinates are based on this new origin. The absolute coordinates used in creating the Board Outline are now adjusted in the database.

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PLACEMENT OBSTRUCTS

“Placement Obstructs” need to be placed in the layout where there are component height restrictions or where no components are allowed at all. As with the Place Board Outline command, the Place Placement Obstruct command switches Expedition PCB into “Draw Mode”.

Select Edit>Place>Placement Obstruct from the menus. This will activate “Draw Mode” and bring

up the Properties dialog.

PROPERTIES The Properties dialog is set to a draw Type of Placement Obstruct. An obstruct Layer (side) of Top or Bottom must be specified. An obstruct Height must be specified. A height of 0 means no components are allowed within the obstruct. If a height other than 0 is specified, design rules checking (DRC) compares component cell heights to Placement Obstruct heights and then flags any violations.

On the Properties dialog, verify that the Type is Placement Obstruct, the Layer is set to Top, and

the Height is set to 0. Set the Line width to 0 if it is not already.

DRAWING THE OBSTRUCT The Place Placement Obstruct command makes the Add Polygon draw tool active. Like the Board Outline, the Placement Obstruct could be created by entering absolute coordinates on the Properties dialog and/or by visually locating vertices.

Per the mechanical drawing, components are not allowed 100th from the upper and lower edges of

the board, on both sides. Select the Add Rectangle draw tool (below the drawing area) and draw a rectangle, 100th wide, along the lower edge of the board. Suggest setting a 50th snap grid and/or using the dxdy coordinate readout on the titlebar to guide you. Going outside of the Board Outline is acceptable. <Click> on the Add Rectangle draw tool again and create a similar obstruct for the upper edge of the board.

A single Placement Obstruct only handles one side of the board.

Placement Obstructs are still needed for the bottom side of the board.

Select one of the obstructs you just created. Now <Ctrl><double-click> on it to make a copy and leave it selected. On the Properties dialog, change the draw Type to Placement Obstruct and set the Layer to Bottom. Repeat the process for the other obstruct.

Note: Placement Obstruct visibility in controlled using the Parts tab of the Display Control dialog.

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ROUTE OBSTRUCTS

Areas of the layout can be restricted from routing by placing Route Obstructs – as many as needed.

Select Edit>Place>Route Obstruct from the menus. This will again activate “Draw Mode” and

bring up the Properties dialog.

PROPERTIES The Properties dialog is set to a draw Type of Route Obstruct. A single obstruct can be placed on any one routable Layer or on (All) layers. The Obstruct type can be a Via obstruct, a Trace obstruct, or Both.

On the Properties dialog, verify that the Type is Route Obstruct, the Layer is (All), and the

Obstruct type is Both.

DRAWING THE OBSTRUCT Route Obstructs are draw objects and thus allow similar draw object editing as Placement Obstructs, Board Outline, etc. A Route Obstruct can be a line, arc, polyline, polygon, rectangle, or circle.

Per the mechanical drawing, traces are not allowed 100th from the upper and lower edges of the

board. Select the Add Line draw tool and draw a line along the lower edge of the board, 100th in from the board edge (same as the Placement Obstruct). Going outside of the Board Outline is acceptable. <Click> the Add Line draw tool again and create a similar obstruct along the upper edge of the board.

Note: Route Obstruct visibility in controlled using the General tab of the Display Control dialog.

Make a backup by selecting File>Save Copy from the menus. On the Job Management Wizard Copy

dialog, specify the New project filename to be c:\mgtraining\project\2001board\2001.prj.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION K-1

K PLACING PARTS This chapter discusses placing the physical components onto the board along with manipulating those components after they are placed. The topics covered are:

� PLACING PARTS AND CELLS � MOVING/ROTATING/PUSHING PARTS � SWAPPING PINS & GATES � BACK ANNOTATION

K-2 EXPEDITION PCB INTRODUCTION WG2000

PLACING PARTS AND CELLS

Once Database Load is successful and the Board Outline is defined, the parts can then be physically placed on the board.

Open your “2001” PCB layout if it’s not already open. A parts snap grid is needed. Select Setup>Editor

Control from the menus (or <click> the Editor Control toolbar button). On the Editor Control dialog, <click> the Grids tab. Enter 25 into the Primary part grid field and Secondary part grid field. On the Editor Control dialog, <click> the Part tab. Make sure the Online DRC option is set to Warning. On the Editor Control dialog, <click> the OK button to close it and save the changes. On the Part tab of the Display Control dialog, toggle off Fill Placement Outlines option. It’ll be easier to see the parts for placement. Select Place>Place Parts and Cells from the menus (or <click> the toolbar button if in “Place Mode”) to display a list of parts available for placing into the graphics.

1 Parts in thelayout databasebased on thesorts and filtersset.

Sort and filter the listof parts.

Active list: Partschosen to beplacedimmediately.

Placing options andconveniences.

<Click> the Applybutton to start placingthe parts from theActive list.


PART LIST FILTERS The upper portion of the Place Parts and Cells dialog consists of filters and sorts for displaying the list of parts in the PCB database.

INCLUDE Any combination of the Include options can used to filter the list of parts.

UNPLACED The Unplaced option lists the parts that have not been placed into graphics.

DISTRIBUTED The Distributed option lists the parts that have been placed into graphics but outside of the Board Outline.

PLACED The Placed option lists the parts that have been placed into graphics within the Board Outline.

On the Place Parts and Cells dialog, toggle on the Unplaced option. Verify that the Distributed and

Placed options are toggled off.

CRITERION The parts are listed based on the Criterion chosen. Parts can then be placed selectively and intelligently.

CONNECTED TO PLACED Connected to Placed sorts the parts based on the number of connections they have to parts previously placed. The reference designator and the part number are displayed.

NET & NET CLASSES Net & Net Classes lists all the nets and net classes in the design and is used to identify parts to place which are attached to particular nets.

REF DES Ref Des sorts the parts by their reference designator and also displays the corresponding part number.

PART NUMBER Part Number lists all the netlist based part numbers used in the design. Several parts might be available under a single part number.

CRITERION FILTER Next to the Criterion pulldown list is a field for filtering the chosen criterion. Example: With the Criterion set to Ref Des, entering a U in this field displays only reference designators starting with the letter “U”.

2


PLACING CONNECTORS 3. On the Place Parts and Cells dialog, the Criterion

should be set to Ref Des.

4. Select J1 and J2 in the list and then <click> the down arrow button to bring them into the Active list.

5. In the Active list, select J1 and <click> the Properties button at the lower-left corner of the Place Parts and Cells dialog.

6. On the Properties dialog, specify an Absolute location of x: 0 y: 1900 and a Rotation of 270. Specify a Locked status of Locked.

7. <Click> the OK button to place J1 as specified. Notice the connector pads are now unfilled, indicating the part is “fixed” or “locked”.

8. If a mistake was made and the connector is placed at the wrong location or rotation, <double-click> on the connector graphic to display the Properties dialog for it. Make the necessary adjustments.

9. Back at the Place Parts and Cells dialog, select J2 from the Active list. <Click> the Properties button and place J2 at x: 3100 y: 1800, Rotation: 270, and Locked. There will be a Warning message in the statusbar because the part overlaps the Board Outline. That’s OK.

PLACING “MEMORY” PARTS 10. On the Place Parts and Cells dialog, set the Criterion

to Part Number.

11. Select 74ALS655_SOP and <click> the down arrow to bring those 4 parts (U9 thru U12) into the Active list.

12. At the bottom of the dialog, enter 270 in the Active angle field and set the Method to Sequence.

13. <Click> the Apply button. Place U9, U10, U11, and U12, in the upper-left corner of the board as shown on the first page of this lab.


PLACING “HIGH SPEED” COMPONENTS 14. On the Place Parts and Cells dialog, set the Criterion

to Nets & Net Classes.

15. Select the high speed nets HS(0) thru HS(7) in the list. Hint: <Click> on any net in the list – press the <H> key, <click> on net HS(0), then <Shift><click> net HS(7).

16. <Click> the down arrow to bring the 4 parts associated to these nets into the Active list.

17. Select U16 and <click> the Apply button. Place it towards the lower-left corner of the board. Refer to the picture on the first page of this lab when placing these parts.

18. Select RN1 and RN2 and place them close by, to the right of U16.

19. Finally, select and place U15 near RN2.

PLACING THE ICS 20. On the Place Parts and Cells dialog, set the Criterion

back to Part Number. Verify that the Active angle is still set to 270.

21. Move all of the 54ALS and 74ALS series ICs into the Active list. Sort and select within the Active list at your own discretion to place these ICs. As always, use the picture at the beginning of the lab for reference. Also, watch the netlines when placing, keeping the netline length minimized.

22. To move any placed part, select it and press <F2>.

23. Place the CTX071-ND crystal, paying particular attention to the netlines.

24. Place the OP215A Op-Amp outside the board outline for now because you’ll have to juggle some discrete components around it later. Zoom out (<Shift><middle-click>), if needed, to have enough work area available.

25. <Click> the Save toolbar button to save your work.


PLACING THE DISCRETES 26. Move the potentiometer 3296P-103-ND into the Active

list and place it. The part needs to be rotated so the pot adjust is pointing to the right. Press <F3> (the Rotate 90 Action Key) to rotate it. Place it below the connector J2.

27. Move the PCAP-SM7343-100U capacitors into the Active list. Place one near the upper end of J2 (9-pin connector). Place the other capacitor near the lower end of J1 (edge connector).

28. Place the four RES-SMD1206-3K resistors. While placing each of the resistors, press <F5> (the Push Action Key) to push them to the bottom of the board. Based on their netlines, place two of them outside of the Board Outline near the Op-Amp U13.

29. Tired of the push push push? Since the rest of the chip resistors and capacitors need to be on the bottom side of the board, on the Place Parts and Cells dialog, set the Active layer to Bottom. Place the RES-SMD1206-100K resistors outside of the Board Outline, near U13.

30. Place the CAP-SMD0603-100P capacitors. Based on their netlines, place four of them outside of the Board Outline near U13 and place one near the pot R5.

31. Place the CAP-SMD0805-5P capacitors. Place C19 near U14. Place the others close to the crystal Y1 pins (watch the netlines).

PLACE “DECOUPLING” CAPACITORS 32. On the Place Parts and Cells dialog, set the Criterion

to Nets & Net Classes.

33. Move net VDD down into the Active list. Notice that pin 8 on U13 is “net selected”, showing that it belongs to that net. Place capacitor C28 near that pin.

34. Repeat the previous step with net VEE.

35. Finally, <click> the double down arrow and move the remaining nets (parts) in the Active list. Verify that the Active angle is still set to 270 and change the Active layer to Bottom.

36. <Click> the Apply button and place a single capacitor underneath every IC (excluding the Op-Amp U13).


MOVING/ROTATING/PUSHING PARTS 37. <Click> the Close button on the Place Parts and Cells

dialog.

38. Zoom in around the analog circuit, Op-Amp U13 and its associated components (<Shift><middle-click-drag>), which are currently outside of the Board Outline.

39. Select U13 and press the <F3> Action Key to rotate it 90° (pin 1 should now be in the lower-left like U5).

40. Move and rotate the resistors and capacitors around U13 as needed to clean up the Netlines. Use the picture below as a guide if you like. (Don’t worry… you’ll get to clean up your reference designator locations later.)

41. With the Display Control’s Top and Bottom filters toggled on, select these 11 Analog components (<click-drag> a fence around them) and press <F2> to move them as a group. Place them just to the left of J2 (as shown). If placement violations restrict you from moving the group of components, move them in smaller groups and/or individually.

42. Fine tune the rest of the placement. Move and rotate parts to your discretion to clean up the netlines. Your placement is done.

43. <Click> the Save toolbar button to save the work in progress.


SWAPPING PINS MANUALLY 44. If swappable pins and/or gates were built into a

particular part (in the Parts Database), some manual netline optimization can be done on the layout. First, <click> the Find toolbar button and select RN1 and RN2 from the Part Ref Des list. Toggle off the Select option and toggle on the Fit view option. <Click> the OK button.

45. While zoomed in around RN1 and RN2, select Route>Swap>Pins from the menus (or <click> the toolbar button in Route Mode).

46. Watch the prompts! The prompt in the status bar (at the bottom of the window) says Select first pin to Swap. Select pin 2 of RN2 (second pin from the top). All other swappable pins within that part are now visible and the prompts says Select second pin to Swap with 2. Select pin 9 of RN2 (second pin from the bottom). Pins 2 and 9 are now selected and the prompt says Confirm Swap. <Click> in the drawing area to confirm it (or <right-click> to de-select the second pin and choose another). You should now see nice clean netlines coming from the same pins on RN1.

47. While still in the Swap Pins command, continue with RN2 by swapping pins 3 and 8. There’s an automatic way to do this later in the lab so <right-click> in the drawing area now to cancel the command.

SWAPPING GATES MANUALLY 48. Use the Find command to zoom in around Part

Number 74ALS32_SOP. (On the Find dialog, <click> the Part Number column heading to sort the list so it’s easier to find.)

49. Close the Find dialog if it’s open. Deselect any parts that might have become selected during the find process. While zoomed in around U18 (74ALS32_SOP), select Route>Swap>Gates from the menus (or <click> the toolbar button in Route Mode).

50. Watch the prompts! The prompt says Select pin of the first gate to Swap. Select pin 6 of U18 (in the left column, second pin from the bottom). Equivalent pins of all the swappable gates (on all of the parts with the same Part Number) will be visible. The prompt says Select pin from second gate to Swap so select pin 11 of U18 (in the middle of the right column). With the 2 gates visible and the prompt saying Confirm Swap, <click> in the drawing area to complete the swap and watch the netlines move.

51. If you want, try another swap or Undo the last swap an do it again. Don’t spend a lot of effort here because there’s an automatic way of doing this.


SWAPPING PINS & GATES AUTOMATICALLY 52. <Click> the Fit Board toolbar button and then pan

the board graphics (<middle-click-drag>) to the left side of your working area slightly.

53. Select Place>Automatic>Swap by Part Number from the menus. Move the Automatic Swap by Part Number dialog to the right side of your working area.

54. On the Automatic Swap by Part Number dialog, <click> the right double arrow (Include All) to move all of the Excluded Part Numbers into the Included list.

55. Pull down the Swap Items list and select Gates. The Exhaustive swap option should be toggled on.

56. <Click> the Apply button and watch the netline changes on the board.

57. Cool huh? Now pull down the Swap Items list and select Pins. <Click> the Apply button and again watch the netline changes on the board.

58. Repeat steps 53 through 55 and see if there’s any further improvement.

59. <Click> the Close button on the Automatic Swap by Part Number dialog.

60. <Click> the File Viewer toolbar button and examine AutoSwap.txt. Close the File Viewer when you’re done.

BACK ANNOTATING 61. Look over the placement and netlines. See if any

improvements can be made such as rotating discrete parts, manually swapping pins and/or gates, etc. Take a few minutes now to tweak the placement.

62. When you are satisfied with the placement, the swapping changes need to be Back Annotated to the Common Database (CDB) so the schematic will reflect the new pin numbers. Select Setup>Project Integration from the menus.

63. On the Project Integration dialog, note the Schematic status indicators. Red means “no” and green means “yes”. The moral of the story here: The schematic and layout are not synchronized and your recent layout changes are restricting Forward Annotation. <Click> the Back Annotate button.

64. After Back Annotation, notice that all of the Schematic status indicators are now green (hopefully). <Click> the Close button the Project Integration dialog.

65. <Click> the File Viewer toolbar button and examine BackAnnotation.txt. Close the File Viewer when you’re done.

66. Exit Expedition PCB and save any changes if you’re prompted to do so. Note: Saving the layout automatically runs Back Annotation if you had forgotten to.

19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION L-1

L VERIFYING THE LAYOUT This chapter discusses Design Rule Checking, comparing the layout to the size and clearance rules set, using the Batch DRC program. Batch DRC is initially discussed here but should be run after various milestones in the layout process (routing, planes processing, etc.). The topics covered are:

� DRC WINDOW � BATCH DRC � REVIEWING DRC HAZARDS � DESIGN STATUS � DESIGN-LIBRARY VERIFICATION

L-2 EXPEDITION PCB INTRODUCTION WG2000

DRC WINDOW

BATCH DRC

Open your “2001” PCB layout if it’s not already open. If it is already open and there are any unsaved

changes, it is recommended to save them before Batch DRC is run. Select Analysis>Batch DRC from the menus (or <click> the toolbar button). On the Batch DRC dialog, toggle on the Connectivity and special rules option. Toggle off the Net Class clearances and rules and Plane clearances and rules options. General and element to element rules should be the only option toggled on. Toggle on all Pad to pad checks options. In the Layers list on the right, select Layer 1 and Layer 6 only. <Click> on the Connectivity and special rules tab. Toggle off all Traces options, all Nets options, all Planes options, and all Holes/pads/vias options except Min annular ring. Toggle on the Parts option. Save a local only scheme called proximity. <Click> the OK button on the Batch DRC dialog to run check the layout. <Click> the OK button at the Batch DRC engine completed successfully prompt.

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REVIEWING DRC HAZARDS

REVIEWING ON-LINE DRC HAZARDS

REVIEWING BATCH DRC HAZARDS <Click> the File Viewer toolbar button and examine Drc.txt. Close the File Viewer when you’re done.

Select Analysis>Review Hazards from the menus (or <click> the toolbar button). On the Review Hazards dialog, select Batch>Proximity from the menus and a list of hazards should appear. If no hazards exist then you must have done something wrong (huh?). Do not select any of the hazards in the list. The list should at least contain 2 hazards – the 2 connectors are too close to the Board Outline. You’ll have to live with these hazards. Any other hazards you’ll eventually want to repair. Another possible hazard may be Mounting Hole, Parts Pad. To review these hazards one at a time, toggle on the Select and the Fit view Graphic options at the bottom of the dialog. With no hazards selected in the list, <click> the Review button to graphically see the first hazard. Move the hazard dialog out of the way if necessary. Examine the Description of the hazard while looking at the actual hazard. <Click> the Review button for the next hazard.

Continue to <click> the Review button after examining each hazard. After reviewing the last hazard, the list cycles back to the first hazard. Once you have a good idea of what the hazards are, <click> the Close button on the Proximity hazards dialog. Take a few minutes now to repair any hazards (except the 2 connector hazards, of course). Move parts if you have to. If that’s too much effort, just fudge the clearance rules… NOT! If you need to measure distances, select Edit>Review>Minimum Distance from the menus. Use the Action Key to toggle between Edge-To-Edge mode and Center-To-Center mode. If you made any layout changes then 1) save the layout, 2) re-run Batch DRC and 3) review the hazards list again. Repeat this process until just the 2 connector Board Outline, Placement Outline hazards exist.

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DESIGN STATUS

DESIGN-LIBRARY VERIFICATION

Select File>Save Copy from the menus and <click> the Yes button to save your layout.

On the Job Management Wizard Copy dialog, <click> in the New project filename field and enter c:\mgtraining\project\2001placed\2001.prj (you can copy/paste from the Source project filename field and make the appropriate changes). Immediately <click> in the New PCB design filename field and then <click> the Finish button. Close the Summary dialog.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION M-1

M ROUTING TRACES This chapter discusses setting up for and routing the PCB layout using automatic, semi-automatic, and manual routing tools, as well as other utilities for editing traces. The topics covered are:

� ROUTING SETTINGS � ROUTING OVERVIEW � CONNECTING TO PLANES � MANUAL ROUTING � SEMI-AUTOMATIC ROUTING � AUTOMATIC ROUTING � CHANGING TRACE WIDTHS

M-2 EXPEDITION PCB INTRODUCTION WG2000

ROUTING SETTINGS

The Editor Control dialog contains many interactive and automatic routing settings. These settings could be changed often during the routing process if necessary.

Open your “2001” PCB layout if it’s not already open.

Select Setup>Editor Control from the menus (or <click> the toolbar button). On the Editor Control dialog, <click> the General tab if it is not displayed.

Note: On the Editor Control dialog, options marked with an asterisk (*) affect only interactive routing (except on the Grids tab).

EDITOR CONTROL - GENERAL Besides the previously discussed AutoSave intervals, the Editor Control General tab contains interactive routing, direction bias, and layer pairing controls.

INTERACTIVE ROUTING The Interactive Routing settings control how the router behaves during an interactive routing session. The defaults work well in most cases. The Effort setting defines the relative amount of effort used during an interactive routing session. The higher the effort level, the more complex the routing path may be. The Layer bias setting determines the relative difficulty of routing against the layer bias vs. placing a via. The higher the layer bias setting, the more difficult it is to route the trace against the bias The Via cost setting determines the relative cost of adding a via to a route path. The Max vias added setting determines the number of vias allowed during each interactive routing operation. The Trace and via shoving allowed option can be toggled off, not allowing existing traces to be moved while interactively routing. The Double-click to add via option allows using the mouse when changing between layer pairs.

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ROUTING & DIRECTION BIAS The Editor Control dialog can be used to conveniently toggle on or off an entire layer for routing. Of course, using the Net Class settings that allow or disallow routing on certain layers is preferred. The direction bias, Horizontal or Vertical, for each layer can be specified. The automatic and semi-automatic router will then route in this general direction for the particular layer.

Under Enable routing & direction bias of the Layers section, toggle on all of the six layers for routing.

Also, set the direction Bias based on your placement. If you placed the board based as the previous labs called out, the bias settings shown above work well.

LAYER PAIRS Layer Pairs can be set so, during interactive routing, using the <space bar> or a <double-click> will place a via and continue routing on the other “paired” layer. Note: Changing layers while routing will be discussed later in this chapter.

To set the layer Pairs, <click> on layer 1 and then <click> on layer 6. Match up the pairs

as shown. Note: To separate a layer pair, <click> on the layer number and then <click> on a blank row. To swap layers between pairs, <click> on a layer number within a pair and then <click> on a layer number from a different pair. 2

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EDITOR CONTROL - ROUTES The Editor Control Routes tab contains some general routing rules.

ROUTES The automatic and interactive routing default is to Allow 45 degree corners. While this option is toggled off, any additional traces will be routed orthogonal only. Any or all of the three Plow modes (interactive routing modes) can be toggled on here to be available when interactively routing. The characteristics of each plow mode with be discussed later.

On the Editor Control dialog, <click> the Routes tab. In the Routes section at the upper-left corner of the

dialog, verify that only Forced and Route plow modes are toggled on.

VIAS These via rules affect both interactive and automatic routing. The maximum number of vias specified for a net in Net Properties, can be overridden to Allow one additional via per SMD pin. The Use place outlines as via obstructs option keeps vias from be routed under components. The Enable fanouts of single pin nets option, in conjunction with the Project Integration’s Assign single pin nets to unused pins, allows for fanout vias on all pins. Max pins per plane fanout via sets the number of pins that can share a single fanout via. Max fanout length on restricted layers allows an SMD pin, on a restricted layer for that net (set in Net Classes), to at least route a fanout on the restricted layer.

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OPTIONAL NET RULES The Net Classes settings regarding Layer restrictions and the Net Properties settings regarding Stub lengths, Via restrictions, and Max delays & lengths can be temporarily disabled while interactively routing.

PAD ENTRY & EXPANSION When assigning a unique Minimum Width (pad entry width) to a Net Class, the Min distance at the pad entry width from the pad is controlled here during both automatic and interactive routing. When assigning a unique Expansion Width to a Net Class, the Min distance at same width controls the minimum segment length before an expansion can occur during both automatic and interactive routing. This option is only used during interactive routing if the Expand traces option is toggled on and is always used during an Expand pass while automatic routing.

EDITOR CONTROL - PAD ENTRY The Editor Control Pad Entry tab is used to set trace-to-pad entry rules and whether vias are allowed under the pad, for each pad shape used in the layout.

The Select Pads filter is for choosing pad shapes or groups of pad shapes in order to set rules for the specific pads. Selecting a single pad shape in the list and then toggling on the Fit view / highlight pad option lets the user see an actual pad within the layout. The Rules for all rectangular pads and Rules for selected pads options allows setting pad entry preferences and allowing vias under pads.

On Editor Control dialog, <click> the Pad Entry tab. Select (All Rectangular Pads) at the top of the list.

Now toggle off the Prefer option at the bottom of Rules for selected pads.

If necessary, <click> the Reset Selected Pads To Defaults button to reset the selected pad shape’s pad entry preferences back to the factory defaults.

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EDITOR CONTROL - GRIDS Expedition PCB is a shape-based router and needs no grids. The Editor control Grids tab allows setting an optional Route grid and/or Via grid. The highest route completion will be achieved without route/via grids set.

EDITOR CONTROL - FILTER The Editor Control Filter tab allows nets to be Included or Excluded from being selected, interactively routed, etc. By default, all nets are included. Regardless of what nets have been excluded, until the Enable filter option is toggled on, all nets are considered to be included. The Apply filter to netlines option turns off netline visibility for all excluded nets.

Click the OK button on the Editor Control dialog to save your settings and close the dialog.

Get a clean view of the layout, <click> the Fit Board toolbar button. <Click> the Display Control toolbar button if necessary. The Display Control dialog needs to be available throughout this lab so you could move it over to one side. On the Layer tab of the Display Control dialog, toggle on All Open Netlines (at the middle of the dialog) if it’s not already on. On the Part tab of the Display Control dialog, toggle off Part Items for both Top and Bottom.

ROUTING OVERVIEW

There are three basic approaches to routing in Expedition PCB; “manual”, “semi-automatic”, and “automatic”. The area between manual and semi-automatic routing and between semi-automatic and automatic routing is blurred. Semantics are not important… it just helps in explaining the use of the router.

MANUAL Manual routing refers to hand stitching in traces (plowing) and placing vias (changing layers) as-needed.

SEMI-AUTOMATIC Semi-automatic routing refers to tapping into the automatic routing functions a little at a time. For example: selecting a net and then executing the Route or Fanout command.

AUTOMATIC Automatic routing refers to using the Auto Route dialog to set up a hands-off routing strategy. Automatic routing can be used for the whole layout or just portions of it.

Note: It’s best to use a combination of manual, semi-automatic, and automatic routing approaches on a single PCB layout. For example: manually route critical traces while using some semi-automatic commands to speed up the process. Then automatically route the rest of the traces. Get the idea?

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CONNECTING TO PLANES

One philosophy for routing a multi-layer PCB layout is to connect the supply to each device first, before any other copper is placed on the board. This way power is assured even if the board cannot be 100% routed.

FANOUTS A “fanout” is short trace and via tied to an SMD pin for the purpose of picking up that net on another layer, such as a plane layer. To generate fanouts semi-automatically, the pin(s) must first be selected. Then select Route>Interactive>Fanout from the menus or use the Fanout Action Key. The Find command offers a great way to select specific nets for fanning out.

Fanout any SMD pins that connect to inner planes using the following steps:

<Click> the Find toolbar button. <Click> the Net Class tab on the Find dialog. Select Power in the Net Class list. Toggle on the Select Graphic options only and <click> the Apply button. Leave the dialog open but move it out of the way. Notice that all of the VCC, VDD, VEE, and GND (Power Net Class) pins are now “selected”. Press <F2> (the Fanout Action Key) to fanout all of the selected pins. Look for any missing fanouts due to placement problems. Repair the problems then repeat the fanout process. If you want a challenge, use the Review Hazards dialog (Online>Open Fanouts) to assist in finding any missing fanouts for the Power nets. Move any of the fanouts that you feel may later block routing channels. To move a fanout, just <click-drag> the via to a new location.

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FIXING TRACES & VIAS Traces (and vias) that need to follow a specific path on the layout should be routed and then immediately “Fixed”, thereby preserving their path. Fixed traces and vias cannot be moved or deleted.

FIX / UNFIX To fix a trace, first select the trace(s), then select Edit>Fix from the menus (or <click> the toolbar button). To unfix a trace, first select the trace(s), then select Edit>Unfix from the menus (or <click> the toolbar button). Objects must be selected prior to using the Fix and Unfix commands. Remember the many ways to select objects that were covered in the beginning of the course? There’s Edit>Add to Select Set>Unfixed Traces or Edit>Add to Select Set>Unfixed Vias from the menus. Similarly, there’s Edit>Add to Select Set>Fixed Traces or Edit>Add to Select Set>Fixed Vias from the menus. Fixed traces and vias are displayed hatched, not filled, for easy identification.

SEMI-FIX Semi-fix (Edit>Semi-fix) reacts exactly as “fix”, with the exception that the trace and/or via can still be moved manually. Any pushing/shoving by other traces will have no effect on Semi-fixed traces/vias. Note: Semi-fixed traces/vias revert back to an unfixed status when exiting the PCB layout.

When all of the fanouts are in place, select the Power Net Class again on the Find dialog. <Click> the OK

button to select the fanouts. <Click> the Fix toolbar button then <click> in a blank area to deselect everything. Zoom in for a closer look.

FIX / LOCK As with the Parts and Mounting Holes used earlier in the course, traces and vias can be “locked”. The critical locations of certain traces and vias warrant a Locked status. Locked allows the temporary use of the Fix and Unfix commands without affecting locked traces. Locked traces and vias display unfilled.

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MANUAL ROUTING

Manual routing refers to hand stitching in traces, dropping vias, and miscellaneous trace/via editing commands. Of course, Expedition PCB must be in Route Mode to manually route.

PLOWING To hand route a new trace is to “plow” that trace. Plow routing can start at any component pin that has a net assigned or start anywhere on an existing trace/via.

PLOWING IN GENERAL To invoke the Plow command, select Route>Interactive>Plow from the menus -or- change to Route Mode and <click> the toolbar button -or-change to Route Mode and select the Plow Action Key. The Plow command can be invoked on a previously selected pin or trace or the Plow command can be invoked before selecting a pin or trace. The quickest way to plow route one or more traces is: invoke the Plow command, <click> on the pin (or trace) to start routing from, <click> any anchor points desired along the trace path, then <click> on the destination pin (or trace), which automatically ends the route. Immediately select the next pin (or trace) to start a new route. Finally, when done routing the desired traces, <right-click> to cancel the Plow command.

PLOWING IN DETAIL Once in the Plow command, select a component pin, trace, or via to begin routing it. As the prospective trace follows the cursor, place anchor points (<click>) to continue to route the trace. While routing and placing an anchor point, a “ghosted” via location is shown in the graphics indicating a potential via site. The ghosted via honors the Via Grid setting in the Editor Control - Grids dialog.

Zoom in around the analog circuit (U13 and its associated components). Change to Route Mode if

necessary and then <click> the Plow Action Key. <Click> on a pin of one of the resistors or capacitors associated to U13 that has a netline attached. Now <click> on another pin attached to that net if it’s nearby to complete the route. You should be ready to route more traces. If the route didn’t complete, try routing it again but place anchor points (<click>) along the way to force a path for the trace. If the route did complete, but not to your satisfaction, use the Undo command and try again by placing anchor points.

Note: If All Open Netlines are toggled off in the Display Control dialog, the specific netlines will automatically display when routing that net.

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PLOW MODES There are four plow modes to choose from when manually routing: Forced Plow, Route Plow, Angle Plow, and Dyna-Plow. Each have special characteristics and can be used interchangeably. After invoking the Plow command, select the <F3> Toggle Plow Modes Action Key to toggle modes. Which Plow Modes will be available for toggling is based on the mode being enabled in the Editor Control - Routes dialog.

FORCED PLOW Forced Plow is the default plow mode. This is the most basic manual routing mode and is used to create a specific or “forced” trace path. No vias will be placed automatically. The prospective trace displays as a rubber-banding “hockey stick”.

ROUTE PLOW Route Plow is a smarter plow mode, taking advantage of semi-automatic routing algorithms. It honors layer direction bias, and will automatically insert vias and change layers if necessary. Route Plow can be used to intelligently cover longer distances between anchor points. The prospective trace displays as a straight rubber-banding line. Note: Route Plow is directly affected by the Interactive settings in the Editor Control - General dialog.

ANGLE PLOW Angle Plow allows “any angle” routing. Traces at angles other than 45° and 90° do not push and shove, so use Angle Plow sparingly. Also, the gloss setting (discussed later) has no effect during Angle Plow. Note: Angle Plow is disabled by default in the Editor Control - Routes dialog.

DYNA-PLOW Dyna-Plow is a unique plow mode similar to Forced Plow. It is not toggled with an Action Key, but rather it is activated using a <click-drag>. Dyna-Plow is useful for clearing a path by shoving other traces aside. To use Dyna-Plow, select a start point (pin, trace or via) and <click-drag> the left mouse key. The trace is dynamically laid down as the cursor is moved. Let up on the mouse key to place an anchor.


GLOSS MODES While plowing a trace, Expedition PCB dynamically cleans up the trace path, removing unnecessary bends. This is known as “glossing”. Glossing has three modes to choose from: Gloss On, Gloss Partial, and Gloss Off. Each have special characteristics and can be used interchangeably. During the plow command, the <F4> Toggle Gloss Mode Action Key is available for toggling modes.

GLOSS ON Gloss On is the default gloss mode. It automatically removes jogs and acute angles from the trace for manufacturability. Also, if possible, the trace entry into pads is modified to conform to Pad Entry preferences in the Editor Control dialog.

GLOSS PARTIAL Gloss Partial places the trace exactly where you <click>. No automatic clean up takes place.

GLOSS OFF Gloss Off behaves just like Gloss Partial, except trace segments added while in this mode are “semi-fixed” and cannot be shoved by either interactive or automatic routing commands during the current editing session. Remember! Any portion of the route can be moved manually. Closing the PCB layout and re-opening it resets the status of those trace segments to be as any other unfixed traces.

UNDO / REDO While Plowing a trace, the previous anchor points can be undone by using the Undo command. The Redo command puts the undone anchor points back in. The Undo and Redo Action Keys are the most convenient from here.

CHANGING LAYERS There are several ways to change trace layers while manually routing. Changing layers while plowing automatically adds a via. After placing an anchor point while plowing, a ghosted via displays, indicating its size and location if the user were to immediately change layers. When changing layers, the newly placed via may bump other vias and traces out of the way.

BETWEEN LAYER PAIRS While plowing a trace, press the <space bar> or <double-click> or use the Add Via Action Key to automatically place a via and change to the paired layer (layer pairs are set in Editor Control). Routing continues uninterrupted on the new layer.

TO ANY LAYER While plowing a trace, <click> on a different layer on the Layer tab of the Display Control dialog or press the <up arrow>/<down arrow> keys (watch the status bar) to automatically place a via and change layers. Routing continues uninterrupted on the new layer.


CHANGING WIDTHS/VIAS While plowing a trace, <right-click> to display a pop-up menu with width and via overrides. The Change Width items on the menu allow temporarily setting the trace width to the Minimum, Typical or Expansion trace widths defined for that Net Class. The Change Next Via items on the menu allow selecting any available via padstack, regardless of what is assigned in Net Classes, as the next via placed. Once placed, the default will resort back to the Net Class assigned via.

AUTO FINISH To automatically finish (or attempt to finish) connecting a trace while plowing, use the Auto Finish Action Key. This works best when the finish path is predictable and want to save a <click> or two. Auto Finish is actually a semi-automatic routing function that is used during manual routing.

MANUAL FANOUT A single via fanout can be placed while plowing. Select a pin to start routing and then, without placing an anchor point, <click> the Fanout Action Key.

STOP PLOWING To end any route command, such as Plow, just <right-click>. Some routing commands can contain several levels so each <right-click> backs out of the command one level. If a pop-up menus appears, the command is completely exited.

MOVING TRACES/VIAS To move existing traces and vias, Expedition PCB must be in Route Mode, but not in any particular route command, such as Plow. <Click-drag> on a via, a trace segment, or trace vertex to move it. Other traces and vias will get pushed out of the way if there’s room and if they’re not semi-fixed, fixed, or locked. Usually traces and vias can be moved so as to jump over existing traces and vias and component pins, as long as there’s no clearance violations. Note: Sometimes moving (and jumping) involves too many objects or is too complex to complete. In that case, try covering smaller distances or try a different approach.

USING THE <SHIFT> KEY Using a <Shift><click-drag> to move a trace segment attached to a pad allows bypassing the pad entry rules. Using a <Shift><click-drag> to move a fanout via aids in straightening the attached trace segment.

PUSHING TRACES TO ANOTHER LAYER To push trace segments to another layer and automatically place any needed vias, first select the desired trace segment(s). Then select the destination layer from the Display Control - Layers tab (or with the <up arrow>/<down arrow> keys). Finally, use the Push Trace Action Key.


COPYING TRACES/VIAS Existing traces and vias can be copied in order to save time and effort. The end points of the copied traces need to line up with new pins/traces of the same net. The copy will take on the new net name. To copy a trace first select it, <click> the Copy Trace toolbar button. A ghost image of the trace(s) will be attached to the cursor. Place it down. Dissimilar nets are metal conflicts so some pushing/shoving may occur.

DELETING TRACES/VIAS To easily delete all unfixed traces and vias, select Route>Delete All Traces and Vias from the menus. As discussed early in the course, any selected trace segments could be deleted using the <Delete> key or the Delete toolbar button.

MOVING ROUTED COMPONENTS A component can still be moved, rotated, or pushed, if traces are attached to it’s pins. Once the component is in its new location, the traces will attempt to re-route themselves. Note: Components with fixed or locked traces attached to any of its pins, cannot be moved, rotated, or pushed.

Route all of the short traces within the U13 analog circuit. You may need to move and/or rotate

components. Hint: When routing between SMD and through pins, start at the SMD pin first to easily set the correct active layer. Tweak all of the trace paths to your liking. Fence select around your new traces and <click> the Fix Selected Items toolbar button. Don’t forget to save you layout!

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SEMI-AUTOMATIC ROUTING

Commands that blur between manual routing and automatic routing such as Fanout, Multi-Plow, Route, Reroute, Tune, and Gloss are considered “semi-automatic”. For these commands to work, pins, traces, vias, and/or netlines have to be previously selected. During manual routing, Auto Finish and Push are also considered semi-automatic routing commands. The pushing and shoving of traces/vias while manually routing/editing is actually rerouting semi-automatically. Note: The Multi-Plow and Tune commands are advanced topics and are not covered in the course.

ROUTE A trace can be quickly routed by selecting pin(s) and using the Route Action Key. This calls on basic auto-routing algorithms to route the trace(s). Any selected pins, vias, traces, and netlines can be quickly routed this way.

Use the Find command to zoom in around the crystal Y1. Zoom out a little, if necessary, to see

the other components that are connected to it (U14, etc.). <Triple-click> on one of the pins of Y1 to select the entire net. <Click> the Route Action Key to route all of the pins on that net. Tweak the new traces as desired. <Triple-click> on the pin again to select the entire net and then <click> the Fix Selected Items toolbar button. Route (and fix) the other pin of Y1 similarly.

Note: The Route command is directly affected by the Interactive settings in the Editor Control - General dialog.

REROUTE When a routed trace is no longer optimum because of subsequent routing or placement editing, select the trace and then <click> the Reroute Action Key to allow Expedition PCB re-examine the trace path and reroute it. Note: The Reroute command is directly affected by the Interactive settings in the Editor Control - General dialog.

GLOSS The Gloss Action Key can be invoked on selected traces to clean them up for manufacturing. The Gloss command will not move or delete vias, nor reroute traces around different pads.

Practice your interactive routing skills now. Route some of the netlines in your layout using the

different Plow modes, change layers (placing vias), move and reroute traces, etc. Z-z-z-z-z-z-z! When you’re done practicing, select Edit>Delete All Traces and Vias from the menus so you have something for the auto router to do. Don’t worry, your fixed traces and vias will survive.

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AUTOMATIC ROUTING

Expedition PCB can automatically route the entire layout, selected nets, filtered nets, or specific nets.

AUTOMATIC VS. INTERACTIVE ROUTING As discussed previously, there are times to manually route and times to auto route.

MIX IT UP Automatic routing can be done at any time during the layout process. Automatic routing can be used exclusively or mixed with interactive routing, getting the bulk of the routing work out of the way or taking care of repetitive routing tasks.

DON’T MIX IT UP The automatic routing algorithms are the same algorithms used in the semi-automatic and manual routing commands. With automatic routing, different routing passes can be set, thus having more control and potentially attaining a higher percent completion in less time.

Select Route>Auto Route from the menus (or <click> the toolbar button while in Route Mode)

to display the Auto Route dialog. 13


Insert a new auto route pass.

Move the selected pass within the list.

List of autoroute passes,

processed fromtop to bottom.

Routing status.

Save (and delete)route schemes.

Reduce the Auto Route dialog to a Mini Status.

Start the auto router based on the passes to process.

Opens the current auto route status AutoRouteReport{xx}.txt file using the Windows Notepad.

Display the AutoRoute Options

dialog.

Display theInterrupt AutoRoute dialog.

“To process”checkbox.

AUTO ROUTE DIALOG


AUTO ROUTE PASSES <Click> the New Pass button on the Auto Route dialog to add routing passes (rows) to the list. Several passes with the same Pass Type but with different effort levels, nets, layers, etc. specified can co-exist in the list. Since the auto router runs the list in order from top to bottom, the passes can be re-ordered. First select a pass in the list and then <click> on the Move Up or Move Down buttons on the Auto Route dialog.

PASSES TO PROCESS The Pass checkbox is used to enable the pass for routing. While the auto router is running, enabled passes are automatically disabled when that pass is completed.

PASS TYPES Each Pass Type is used to get specific routing results during that pass and is complimented by other pass types that take place before and after it. Note: The pass types available depend on Expedition PCB licensing.

MEMORY The Memory pass is optimized to route memory arrays… pin to pin on like components. No vias are placed.

FANOUT The Fanout pass connects SMD pads to vias, allowing subsequent route passes to connect on other layers.

NO VIA The No Via pass makes general horizontal and vertical connections to pad and vias. No new vias are placed.

ROUTE The Route pass routes any connection, mostly honoring layer bias, and placing vias as needed.

TUNE The Tune pass attempts to tune all nets that have time/length rules defined.

VIA MIN The Via Min pass eliminates vias by rerouting.

SMOOTH The Smooth pass reroutes traces in order to eliminate meander (eliminating unnecessary vertices).

EXPAND The Expand pass expands traces, where possible, to their Expansion Width defined in Net Classes.

SPREAD The Spread pass spreads traces, where possible, to exceed clearance rules up to 2X.


ITEMS TO ROUTE For each pass, the Items to Route can be All Nets, Filtered Nets, Selected Nets, Tuned Pin-Pairs, Differential Pairs, or specific Nets from the list.

EFFORT LEVELS Effort levels can be assigned to each pass. The higher the effort level, the more the auto router will try to complete the task. Higher effort levels are not always appropriate as they may create undesirable trace paths and/or block routing channels. The effort levels for each Pass Type are as follows: Memory = 1 thru 3 Fanout = 1 thru 3 No Via = 1 thru 3 Route = 1 thru 5 Tune = 1 Via Min = 1 thru 5 Smooth = 1 thru 3 Expand = 1 thru 3 Spread = 1 thru 3 The Start and End effort levels need to be specified for each pass. The End effort level must be equal to or higher than the Start effort level. If a Start effort level for a pass is set to 1 and an End effort level is set to 3, that pass will run three consecutive times, one for each effort, before moving on to the next pass.

START Lower Start effort levels are used on passes that have not been run previously and/or on a barely routed layout. Higher Start effort levels are used where much of the layout is already routed.

END Higher End effort levels are used on denser layouts and/or after other passes (Pass Types) have done their work. In certain cases, higher effort levels will be ignored if there is nothing more that the particular Pass Type can do.

NOW The Now column displays the effort level currently running.

The trick is to start at lower effort levels on a fresh layout and conservatively work up to higher effort levels. Warning! Effort level 5 for the Route Pass Type will do whatever necessary to make connections. Use it sparingly.


LAYERS For each pass, the routing Layers can set to All Enabled or just specific Enabled Layers.

ROUTE / VIA GRIDS For each pass, the Rte. Grid (route grid) and Via Grid can be set to the Editor Control Default, to None, or to a specific value.

FIX After each pass, the traces routed in that pass can be fixed automatically.

PAUSE After each pass, the auto router can be paused. This allows viewing and even hand editing the routed traces before continuing on to the next pass. To resume auto routing, <click> the Route button again.

On the Auto Route dialog, <click> the New Pass button. A row is inserted into the list of passes.

<Click> the Move Down button until the new pass is at the bottom of the list. For that last pass, change the Pass Type to Smooth.

AUTO ROUTE SCHEMES After setting up the Auto Route passes, an Auto Route Scheme can be saved for later use. As with other schemes in Expedition PCB, the options are to Save locally with job or Save with PCB system files.

On the Auto Route dialog, <click> on the Save Scheme button. On the Save Scheme dialog

enter a Scheme name. Toggle on the Save locally with job option and toggle off the Save with PCB system files option. <Click> the OK button to save the scheme.

AUTO ROUTE OPTIONS <Click> the Options button to display the Auto Route Options dialog. The Allow Via Min, Smooth, Expand and Spread if not routed to 100% option may block routing channels for future routing. Set the Auto Route AutoSave interval time here or through the Editor Control dialog. 14

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RUNNING THE AUTO ROUTER Once the Auto Route dialog is set up, <click> the Route button to optionally save the layout and begin auto routing.

Verify that all of the passes in the Pass column are toggle on and the Items to Route is set to All Nets

for all passes. <Click> the Route button on the Auto Route dialog to route the rest of the layout. When prompted to Save current changes before Routing?, <click> the Yes button.

The passes are processed starting at the top of the list. The Pass checkbox is cleared when that pass is completed. While the auto router is running, completed traces are dynamically added to the graphics display. All zooming and panning functions are available. Graphics items can be toggled on or off using the Display Control dialog. <Click> the Mini Status button on the Auto Route dialog to display a smaller Auto Route Mini Status dialog, making more room for viewing the graphics.

INTERRUPT AUTO ROUTING While the auto router is running, <click> the Interrupt button on the Auto Route dialog to stop routing or just create a user checkpoint (a temporary save).

Did it route 100%? <Click> the Report button on the Auto Route dialog. Examine the routing report and close it (Notepad) when you’re done.

<Click> the Close button on the Auto Route dialog. Take a few minutes to detail your layout, moving and possibly rerouting traces and vias.

16 17


CHANGING TRACE WIDTHS

Trace widths should ideally be controlled thru Net Classes but sometimes individual trace segments need to changed. To manually change trace widths for selected trace segments, select Route>Change Width from the menus (or <click> the toolbar button). On the Change Width dialog, enter a New width or select a previously specified width from the pulldown list.

CHANGING MULTIPLE WIDTHS If more than one trace width has been selected, those widths will display in the Current width field separated by slashes. Specify a New width for each by also separating them with slashes (i.e. 8/10/12).

CHANGING TO DEFAULT WIDTHS To change selected trace segments back their Net Class widths, choose Net Class Width from the New width pulldown list.


Now that the layout is routed, you should check it for routing problems.

Save your layout and then <click> on the Batch DRC toolbar button. On the Batch DRC dialog, DRC Settings tab, toggle on the following options (refer to the “Verifying the Layout” lab for previous Batch DRC settings): Net Class clearances and rules On the Batch DRC dialog, in the Layers list, select only Layer 1, Layer 2, Layer 5, and Layer 6. On the Batch DRC dialog, Connectivity and Special Rules tab, toggle on the following options: All Traces options All Nets options Holes/Pads/Vias options: Dangling vias / jumpers Vias under… SMD pads On the Batch DRC dialog, <click> the Save scheme button to save a local only Batch DRC scheme called routes. Now <click> the OK button to process Batch DRC on the layout. <Click> the Review Hazards toolbar button. On the Review Hazards dialog, select the Batch pulldown menu and review each of the hazard types on that menu. Ignore any Unrouted / Partial Nets hazards associated to the nets GND, VCC, VDD, and VEE. Repair any other routing problems you may have. Close the Review Hazards dialog, save the layout, and re-run Batch DRC. Review hazards again.

Select File>Save Copy… from the menus and <click> the Yes button to save your layout.

On the Job Management Wizard Copy dialog, <click> in the New project filename field and enter c:\mgtraining\project\2001routed\2001.prj (you can copy/paste from the Source project filename field and make the appropriate changes). Immediately <click> in the New PCB design filename field and then <click> the Finish button.

18 19

19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION N-1

N GENERATING PLANES This chapter discusses how to generate positive and negative planes on dedicated plane layers and on routed signal layers. The topics covered are:

� WHAT ARE PLANES? � NEGATIVE VS. POSITIVE � PLANE SHAPES � PROCESSING PLANES � DELETING PLANE DATA � VERIFYING PLANE DATA

N-2 EXPEDITION PCB INTRODUCTION WG2000

WHAT ARE PLANES?

Planes are metal fills, normally tied to a power or ground net. A PCB layer can be a dedicated “plane layer”, associated to one net or to several nets (split plane), or it can be a routed signal layer containing plane areas. Several planes, assigned to several different nets, can exist in a single layout. “Through” component pads and vias, that are associated to the same net as the plane, are automatically connected to that plane. Pads and traces not associated to the same net as the plane are automatically provided plane clearances. The planes should be processed after all placement and routing has been completed. If placement and/or routing changes, such as incorporating an Engineering Change Order, planes should be re-processed to allow for new pad and trace locations and connections.

Open your “2001” PCB layout if it’s not already open. Select Setup>Setup Parameters from the menus

and <click> the Planes tab. Select Layer 3 and verify that the GND net is assigned to it. Select Layer 4 and verify that VCC, VDD, and VEE nets are assigned to it. Add VDD and VEE nets to Layer 4 if they are not already assigned and set their Clearance to 12. Close the Setup Parameters dialog when you’re done. To see what you’re doing, turn off some of the graphic objects using the Display Control dialog. - On the Parts tab, toggle off both the Top and Bottom options. - On the General tab, toggle off Route Obstructs and Origin - NC Drill. - On the Place & Route tab, toggle on Plane Data and Fill Plane Shapes (Options group). Select Lyr 4 and then toggle off both the Pads and Traces of all of the other layers (but leave the main Pads and Traces options toggled on). Save a local only Display Control scheme called layer 4.

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NEGATIVE VS. POSITIVE

Plane data can be created in two flavors – “negative” and “positive”. A particular plane layer will contain either negative plane data or positive plane data… not both.

NEGATIVE PLANES Negative planes are processed so that the photoplot image is an image of non-copper. Then, for board fabrication, the negative image of the layer is used. Negative plane graphics for unconnected pads show a clearance ring around pads that are not connected to the plane. Graphics for thermal connections show the copper void between connection spokes.

POSITIVE PLANES Positive planes are processed so that the photoplot image shows the actual copper area of the plane. Positive planes must be used when flooding copper around traces and pads or when “hatching” is necessary. Positive plane graphics are drawn using an outline around the clearance area surrounding the pad, then the plane is filled to that line. Graphics for thermal connections normally contain the spokes connecting from the pad to the filled area.

PLANE SHAPES

A Plane Shape is a “keep in” area used when processing plane data and must be assigned to a specific net. The Route Border can be used as a plane shape in order to contain the plane data of a single net on a given layer. If more than one plane net is needed on a particular layer or the Route Border is not used as a plane shape, then the required plane shapes must be created and each assigned a net. Plane shapes are “draw” objects, so Draw Mode must be used to create and manipulate the shapes.

Select Edit>Place>Plane Shape from the menus (or Route>Planes>Place Shape). This will put you in

Draw Mode and the Properties dialog will have a Type of Plane Shape ready to go. If the Properties dialog does not display, <click> the Draw toolbar Properties button.

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PLANE SHAPE PROPERTIES The Draw Mode Properties dialog allows several settings to be assigned to a particular plane shape.

LAYER The plane shape must be assigned to a physical Layer.

NET The plane shape must be assigned a Net from the nets contained in the database. When a net is chosen from the list, any visible pads attached to that net will be “net selected” (temporarily highlighted) in graphics. The net Shield Area (at the top of the list) is used when a plane fill is required but does not connect to any pads.

HATCH The plane shape can be filled to less than 100% by using a particular “hatch” pattern such as 45° or 90° criss-crossed lines. Plane shapes can be assigned a Hatch Type (pattern), a Hatch Width (line width), and a Hatch Distance (center-to-center distance between lines). The Default hatch options use the hatch settings from the Planes Processor (discussed later).

ROUTE OBSTRUCT The plane shape can optionally act as a Route Obstruct (which is the default setting). When creating plane shapes around traces and vias, toggle the Route Obstruct option off – otherwise routing changes will not be allowed within the shape.

The Snap Grid button on the Draw toolbar should be pressed in to indicate that “snap mode” is on. Also verify that the snap grid is

set to 25. On the Nets tab of the Display Control dialog, toggle on the Color by net option. In the Net Names list, toggle on the nets VCC, VDD, and VEE. Assign a unique color to each of the three nets. The Layer field of the Properties dialog should be set to 4P (the active layer). In the Net field of the Properties dialog, select VDD from the pulldown list. Zoom in around the highlighted pads. Draw a polygon around the highlighted VDD pads while avoiding the VCC and VEE pads (it doesn’t have to be perfect – you’ll have a chance to modify the shape in the next lab item). Remember, to automatically complete the last segment of the polygon, <right-click> and choose Close Polygon from the popup menu. <Click> the Add Polygon button on the Draw toolbar to re-initialize the command in order to draw a second plane shape. On the Properties dialog, change the Net field to VEE and repeat the drawing process for that net, avoiding VCC and VDD pads. Note: VCC will use the Route Border as a plane shape on this layer.

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MODIFYING PLANE SHAPES To modify the plane shape itself, any of the Draw Mode commands can be used for moving a vertex, adding a vertex, or deleting a vertex. Note: If two plane shapes overlap, the proper clearance from Setup Parameters will be maintained by cutting into the larger of the two shapes. With the Display Control Fill Plane Shapes option toggled on, the graphics will simulate what the final processed planes will look like. To modify the planes shape’s properties, such as assigning a different net to the shape, select the shape and then make the necessary changes on the Properties dialog.

Important! <Click> on nothing to deselect any selected plane shapes before poking around on the

Properties dialog. If you need to modify a plane shape, select it and then <click-drag> any of its endpoint or midpoint handles. Hint: To add a vertex to the polygon, <Ctrl><click–drag> on a mid-point handle. To delete a vertex, select the desired vertex, then <click> the Delete End Point Handle button on the Draw toolbar (or vice-versa). Now, select one of the plane shapes and verify that the correct net is assigned to it by monitoring the Properties dialog. If the selected shape appears to have the wrong pads highlighted, just change the net assigned to it. Select the other plane shape and make sure everything is as correct. Finally, in anticipation of the engineer’s next move, you might want to spread these plane shapes out to encompass the Analog discrete parts (as shown). Toggle on the Pads visibility for layer 6 in order to see them.

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PLANE SHAPES AND TRACES Plane shapes can be drawn on signal layers before or after routing. Of course the processing of these planes must be done after all routing is completed. Note: By default, plane shapes are set to act as route obstructs, which will restrict future trace and via editing within the shape.

The engineer now wants a GND shield around the Analog circuit on the bottom side of the layout.

On the Display Control Place & Route tab, toggle the main Pads option on. Select Lyr 6 and then toggle off the Pads and Traces for layers 3 and 4. Use the Find command to zoom in around part U13. When you’re there, zoom out enough to see the entire Analog circuit. Select Edit>Place>Plane Shape from the menus. On the Draw Mode Properties dialog, verify that the Layer field is set to 6 and the Net is GND. Scroll down and toggle off the Route Obstruct option. Draw a polygon around the U13 (even though it’s mounted on the top) and the other 12 discrete components. Edit the polygon if needed.

PROCESSING PLANES

Processing planes means generating “plane data” based on the plane definitions in Setup Parameters and any existing plane shapes within the layout. When processing positive planes, the plane shapes are filled with graphics. When processing negative planes, graphics for the clearances will be created.

SETUP PARAMETERS As discussed previously, on the Planes tab within the Setup Parameters dialog, the plane Type (positive or negative), the plane net, the plane-to-plane clearances, and the Route Border option are defined.

NET CLASSES AND CLEARANCES Within the Net Classes and Clearances dialog, the Clearance rules for Net Classes are also honored for planes. Positive plane data is considered “traces” so the Trace-Trace, Trace-Pad, and Trace-Via clearances are used. Negative plane data only uses the Trace-Trace clearance because the padstack definition is used for pad and via clearances.

PADSTACKS The plane “clearance” and “thermal” can be built into the padstack. If this plane information is not built into the padstack, Planes Processor defaults will be used.

Select Route>Planes>Processor from the menus (or <click> the toolbar button) to display

the Planes Processor dialog.

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PLANES PROCESSOR The Planes Processor generates the “plane data”.

PLANE LAYERS The Plane Layers list displays any layer that has been either defined as a plane layer in Setup Parameters or has an existing plane shape on that layer. The checkbox next to each layer is used for toggling whether or not to process that layer during the current Planes Processor session.

On the Planes Processor dialog, verify that 3 Negative, 4 Positive (different from the picture

shown), and 6 Positive in the Plane Layers list are toggled on for processing.

NETS FOR SELECTED LAYER Selecting a layer in the Plane Layers list (not the process checkbox) allows access to each net within that layer from the Nets for Selected Layer list. Each net also has its own process checkbox. Each net has its own Options for selected plane net settings at the lower half of the Planes Processor dialog.

<Click> on 3 Negative and notice that GND is the only net assigned to this layer and is toggled on for

processing. The rest of the dialog now only pertains to this net.

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NEGATIVE CLEARANCE PADS When processing negative plane data only, the Negative clearance pads for layer option is available. The Anti-Pad option does not add a pad on that layer where as the Donut option creates a pad, even though the pad is not tied to the plane.

NEGATIVE PLANE FILL DISTANCE When processing negative plane data only, the Negative plane fill distance beyond route border option is available. Negative plane data is actually clearance or “non-metal” graphics, so graphics must be placed outside of the Route Border to prevent metal near the board edge during fabrication.

Since the Route Border will be used as a Plane Shape here and it’s 50th inside than the Board Outline (see

the “Defining Board Geometry” chapter), specify a Negative plane fill distance beyond route border of 75 just to be sure.

OPTIONS FOR SELECTED PLANE NET The definitions set under the Options for selected plane net section of the dialog are unique for each net on each layer.

THERMAL DEFINITION If the thermal and clearance pads are defined in the padstack, then both positive and negative planes processing will use those pads (or at least their specifications) by default. If not defined in the padstack, then the Default via connection and Default non-via settings from the Planes Processor dialog will take precedence. The Use thermal definition from padstack option is only available for positive planes. Positive planes have the option of not using the padstack thermal definitions, even if they exist.

USE ROUTE BORDER The Use route border for plane shape option carries over the setting specified in Setup Parameters for using the Route Border as a plane shape. It can be changed here. Warning! Only one net per layer can use the Route Border for this purpose. Toggling this option on will automatically toggled it off for any other net on the same layer.

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DEFAULT CLEARANCES The Contour clearance is used to clear plane data away from all contours (board cut-outs) at the specified distance. An Other object clearance distance can optionally be used between objects like pads/traces and the plane data. The larger of this Other object clearance and the Net Class’ Trace-Pad clearance will be used. A Plane clearance distance is read-only and comes from the Setup Parameters plane clearances. The larger of this Plane clearance and the Net Class’ Trace-Trace clearance will be used by the Planes Processor. Note: If the two plane areas are assigned the same net, a plane clearance of “0” can be specified for that net in Setup Parameters to allow the two planes, having different processing settings, the ability to touch.

DISCARD PLANE AREA The Discard plane area options allows for excluding All untied areas of the plane (plane islands) or Any areas less than a specified size from the processed plane. If the All untied areas option is used, Areas tied to a single pad can also be excluded from the processed plane.

In the Discard plane area options section, toggle on the All untied areas option. Leave the rest of

the settings on this dialog default. The Anti-Pad option and the Use route border for plane shape option should definitely be on. Don’t <click> the OK button yet!

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HATCH OPTIONS Like the button says, Hatch options for positive planes is only available for positive plane data. Each net on a given layer will have its own Hatch Options.

On the Hatch Options dialog, select one of the Patterns, specify the line Width, and specify a center-to-center Distance or Metal percentage. The default Width is based on the Typical trace width set for the default Net Class. The default Distance is equal to the Width, making it 100% metal or a “solid” plane.

PLANES PROCESSOR ODDS & ENDS A positive plane obviously does not use the Negative clearance pads for layer or Negative fill distance beyond route border options because the plane data is created as WYSIWYG graphics.

Select 4 Positive in the Plane Layers list and notice that all three nets are toggled on for processing (if

not, toggle them on). <Click> on each net in the Nets For Selected Layer list and notice that they each have their own settings. Verify that VCC is the only net that has the Use route border for plane shape option toggled on (VDD and VEE have their own shapes). Also, in the Discard plane area options section, toggle on the All untied areas option for each of the three nets. Select 6 Positive in the Plane Layers list and make any setting you feel are necessary. Recheck your work by selecting each Plane Layer and each Nets For Selected Layer, verifying the dialog settings.

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PROCESSING THE PLANES Using the OK button on the Planes Processor dialog saves the dialog’s settings and generates the plane data.

<Click> the OK button on the Planes Processor dialog.

Open the File Viewer and examine the log, PlanesProcessor.txt for problems. Close the File Viewer. If the Planes Processor failed, draw or reassign plane shapes as necessary and run the Planes Processor again. Check the log for a clean bill of health.

COMMON PROBLEMS Always check the log file after processing planes data. Some common problems are: Problem: A plane net is assigned in Setup Parameters, yet no plane shape exists in the layout on the specified layer. The Planes Processor failed. Solution: Draw a plane shape based on the net and layer specified in Setup Parameters -or- remove the net from that layer in Setup Parameters. Rerun the Planes Processor. Problem: The plane shape doesn’t enclose all of the pads on that net. Solution: Modify the shape to enclose all of the pads for the net and rerun the Planes Processor -or- hand route to the unconnected pads on a different layer.

<Click> the Fit Board toolbar button. Pan and zoom around to inspect your new plane graphics

for layer 4. Toggle off Fill Plane Shapes on the Display Control, if you’d like, to get an unobstructed view of the actual plane data. Even if you’re dissatisfied with any of the results, wait until the next lab step. On the Display Control dialog, select Lyr 3 and then toggle off Lyr 4 Traces and Pads. At the upper end of the Place & Route tab, toggle off the main Pads option (negative plane data has its own pads). Inspect the negative plane graphics. Save a local only Display Control scheme called layer 3. Set up the display for layer 6 similarly (toggle on the main Pads option) and inspect those plane graphics. Save a layer 6 Display Control scheme.

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DELETING PLANE DATA

Plane data does not have to be first deleted and then reprocessed when modifying planes shapes or when making component and routing changes. Running the Planes Processor will automatically delete existing plane data for the selected layers/nets to be processed. Warning! Plane data must be deleted first, before rerunning the Planes Processor, when changing a plane layer’s positive/negative status. If deleting plane data is necessary, select Route>Planes>Delete Plane Data from the menus. Use the Delete Plane Data dialog to Delete plane data by layer (and by net for positive plane) or Delete all plane data.

If you unsatisfied with the plane data, such as a plane shape is blocking a connection, repair the

problem(s). To make it easier to see the plane shapes for editing, on the Display Control Layer tab, toggle off Plane Data. Don’t forget to toggle it back on later. The Planes Processor dialog retains the previous settings. Make any settings changes and run the Planes Processor again. You may toggle off layers from being processed if they haven’t changed, to speed things up, but it won’t hurt to process them again. Don’t forget to examine the log. Use your Display Control schemes to re-inspect the planes.

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VERIFYING PLANE DATA

After the planes are process, Batch DRC should be used to check the layout. Some common problems are: Problem: Unconnected plane nets. A plane shape did not enclose all pins tied to that net. Solution: Modify the plane shape to enclose all the necessary pins -or- hand route to the pin on a different layer. Problem: Plane islands. Solution: If the Planes Processor was not set to discard All untied areas for any of the plane nets, yet Batch DRC was set to check for Plane islands, change the Planes Processor settings -or- toggle off the Batch DRC check.

<Click> the Save toolbar button first. <Click> the Batch DRC toolbar button.

On the Batch DRC dialog, toggle on the Plane clearances and rules option. Also, select all of the layers in the Layers list. <Click> on the Connectivity and Special Rules tab and toggle on the 2 Planes options. On the Batch DRC dialog, <click> the OK button to check the layout. <Click> the Review Hazards toolbar button. On the Review Hazards dialog, select Batch>Plane Violations from the menus. No problems, right? Again, check some of the other “batch” hazards just in case.

Make a backup the design by selecting File>Save Copy… from the menus.

On the Job Management Wizard Copy dialog, <click> in the New project filename field and type c:\mgtraining\project\2001planes\2001.prj (you can copy/paste from the Source project filename field and make the appropriate changes). Immediately <click> in the New PCB design filename field and then <click> the Finish button. Close the Summary dialog and exit Expedition PCB.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION O-1

O FINALIZING THE SILKSCREEN This chapter discusses renumbering/relocating reference designators and adding silkscreen nomenclature in preparation for photoplotting. The topics covered are:

� WHAT IS A SILKSCREEN? � RENUMBERING REFERENCE DESIGNATORS � MOVING REFERENCE DESIGNATORS � ADDING NOMENCLATURE � GENERATING SILKSCREEN GRAPHICS

O-2 EXPEDITION PCB INTRODUCTION WG2000

WHAT IS A SILKSCREEN?

The final step in fabricating a printed circuit board is to “silkscreen” assembly graphics on one or both sides of the board. The silkscreen graphics typically show component outlines, component reference designators, the board assembly part number, and miscellaneous graphics such as a company logo. When generating silkscreen graphics during the layout process, reference designators could be renumbered and moved to readable locations and any assorted nomenclature and graphics could also be added. This silkscreen information would then be processed into Gerber data for board fabrication.

Open your “2001” PCB layout if it’s not already open and create the following Display Control schemes.

On the Display Control General tab: -Toggle off the Route Border (the Board Outline and Mounting Holes should still be on). -Toggle on the Fabrication Layers group and then toggle each individual option off except Soldermask-Top. On the Display Control Part tab: -Toggle on the main Top and Bottom options. -Only the Part Items and Silkscreen Items groups should be toggled on. -Under the Part Items group, only Placement Outlines should be toggle on (both Top and Bottom). -Under the Silkscreen Items group, only Outlines and Ref Des should be toggle on (both Top and Bottom). -Now toggle off the main Bottom option. On the Display Control Layer tab: -Toggle off the main Traces and Pads options. Only the silkscreen outlines and reference designators for the top side of the layout should be visible along with the placement outlines, soldermask pads and board outline. Save the scheme locally only as silk edit top. Make a similar scheme for the bottom called silk edit bottom by doing the following… On the Display Control Part tab: -Toggle on the main Bottom option and toggle off the main Top option. On the Display Control General tab: -Toggle on the Soldermask-Bottom option (Fabrication Layers group) and toggle off the Soldermask-Top option.

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Graphic view of the layout Ref Des “was is” list

(during the current renumber session)

Filter layout side and specific components

to renumber

RENUMBERING REFERENCE DESIGNATORS

Renumbering component reference designators makes finding a particular component later, on the assembled board, easier since the components will be numbered in sequence. The component locations do not change, only their reference designators change (example: U9 might change to U1).

Warning! This operation requires Back Annotation which will effect the original schematic reference designator assignment.

Select ECO>Renumber Ref Des from the menus to display the Renumber Reference Designator dialog.

<Click> on the Top and the Bottom tabs (on the right side of the Renumber Reference Designator dialog) to get a quick look at both sides of your layout.

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FILTER Specific components can be filtered for renumbering.

SIDE A specific Side of the layout can be set for renumbering – Top or Bottom (or Both).

On the Renumber Reference Designators dialog, in the Filter section, choose the Side Top. You are

going to renumber one side of the layout at a time.

SELECTION WINDOW With the Use selection window option toggled on, a fence can be defined, within the graphics view, around the desired components to renumber.

INCLUDE IN LIST Test Points, Spares, and Jumpers can be included in the renumber process.

PREFIXES One or more reference designator prefixes can be specified to filter the desired components. These prefixes can be part of an Include or Exclude list. The asterisk (*) represents all reference designator prefixes. Note: Type in the desired prefix(es), such as R or R C, and the press the <Enter> key to activate the filter.

GRAPHICS VIEW The right side of the Renumber Reference Designator dialog contains a graphical view of the layout. Each prefix is color coded for easy viewing. Reference designator text is displayed in graphics where possible. Some components are too small to clearly display the reference designator so, when positioning the mouse cursor over those components, the reference designator pops up temporarily.

TOP/BOTTOM The Top and Bottom tabs allow viewing either side of the layout (the Bottom tab was made unavailable because the filter Side was previously set to Top only).

DIRECTION The direction for renumbering the filtered reference designators is set by selecting one of the eight arrow buttons surrounding the graphic view.

Left to Right, Top to Bottom Right to Left, Top to Bottom Top to Bottom, Right to Left Bottom to Top, Right to Left Right to Left, Bottom to Top Left to Right, Bottom to Top Bottom to Top, Left to Right Top to Bottom, Left to Right

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RENUMBER BAND WIDTH The white vertical or horizontal lines (depending on the selected Direction) in the graphic view, divide the layout into “renumber bands”. Components within a particular band will get numbered sequentially before the renumber process moves on to the next band. The Renumber band width field is used to specify an appropriate band width.

In the Renumber band width field at the lower end of the dialog, specify 750 and press the <Enter> key.

(This setting is based on the placement used previously in this course. If your placement differs significantly, try this number first and then re-adjust it if necessary.) Within the graphics view on the right, manually drag the band width lines, if needed, to optimize which components fall into which band.

If the width needs to vary from band to band, the dividing lines can be adjusted individually by dragging them to the desired position. Note: Which band a component falls into is determined by the major portion of the component’s placement outline within that band. To verify which component will get numbered in which band, move the mouse cursor over the bands and the components within a single band will temporarily highlight.

PROCESS LIST The Process list is a “Was Is” list for the current Renumber Reference Designator session – Old Ref Des and New Ref Des. The icon next to each Old Ref Des denotes which side of the layout that component is on. Selecting a reference designator in the list temporarily highlights the component in the graphic view.

MANUAL RENUMBER Reference Designators in the New Ref Des column can be modified manually one at a time. The graphics view will maintain the Old Ref Des number until the changes are applied.

AUTO RENUMBER Based on the filters and the direction, the reference designators can be renumbered automatically.

STARTING NUMBER The default Starting number is 1, but any number can be specified to begin the numbering sequence for the current filtered components (example: U100).

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PREFIX / SUFFIX If a Prefix is specified here, all reference designator prefixes for components in the current filter will be overridden with the new prefix (example: U9 and U10 could be changed to IC1 and IC2). Warning! When overriding the prefix, be sure and set the Prefixes filter to a specific prefix. Otherwise the Auto Renumber process will make all prefixes the same. An optional Suffix can be added to the reference designator of the components in the current filter (example: U9 and U10 could easily be changed to U1A and U2A).

<Click> the Auto Renumber button. On the Renumber dialog, verify that the Starting number is 1

and no Prefix nor Suffix is specified. <Click> the OK button. Check out the graphics view on the right to see the new reference designators. Examine the Process list. Any problems? The duplicates can be removed when you renumber the bottom of the layout.

Note: When manually editing reference designators or when using Auto Renumber with only one side of the layout available (using the Side filter), it is possible to end up with duplicate reference designators. Expedition PCB will not let you keep the duplicates so they must be resolved in order to save the current renumber session.

Now renumber the bottom side components by doing the following:

Set the Filter - Side to Bottom. Set Direction: Right to Left, Top to Bottom (because the layout is mirrored in the graphics view). Specify 300 in the Renumber band width field and press the <Enter> key (again, try this number first and then re-adjust it if necessary). If necessary, manually adjust the band width lines so the capacitors and resistors fall into nice neat rows for renumbering. Because there are duplicate reference designators, you’ll need to process the capacitors and resistors separate from each other. Specify C in the Prefixes field and then press the <Enter> key to apply the filter to just the capacitors. <Click> the Auto Renumber button. On the Renumber dialog, specify a Starting number of 3 (C1 and C2 are already used). <Click> the OK button. Repeat the process for prefix R and this time specify a Starting number of 2 (R1 is already used). Set the Filter - Side to Both. Specify * (an asterisk) in the Prefixes field and press the <Enter> key. All components on both sides should be available. <Click> on the Top and Bottom tabs of the graphics view to examine your renumbering work. If you’re satisfied, <click> the OK button on the Renumber Reference Designator dialog to actually update the layout. Examine your layout and then save it.

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MOVING REFERENCE DESIGNATORS

In preparation for the silkscreen artwork, the reference designator text needs to be moved away from pads, resized, and rotated if necessary.

TEXT PROPERTIES Since text are “draw” items, Draw Mode must be used to manipulate reference designator text. While in Draw Mode, the selected text’s Properties are displayed, allowing the change of the font, size, rotation, etc… everything but the String. (To change the prefix for or renumber reference designators, only the Renumber Reference Designator command can be used.)

Select the silk edit top Display Control scheme. <Click> the Draw Mode toolbar button.

Select any reference designator text that you want to manipulate. Once selected, the text should have a boundary box around it and, on the Draw Mode Properties dialog, the Type will be Text. On the Properties dialog, make modifications if you’d like such as the rotation or size. Repeat this for any other reference designator text. Don’t worry about moving the text yet… that’s in the next lab step.

Note: More than one text item can be manipulated at the same time by first selecting them using a fence or using the <Ctrl><click>.

MOVING TEXT Selected text can be moved by 1) dragging the text to a new location or 2) specifying a new Location X and Location Y on the Properties dialog. The Placement Outline of the component is temporarily highlighted when the it’s reference designator is selected. When working on a crowded layout, toggle on the Placement Outlines graphics to keep track of what reference designator belongs to what component.

Select one of the reference designators you’d like to move. Locate the mouse cursor over the

selected text’s boundary box, the pointer cursor changes into a “move” cursor. At this point <click-drag> the text to where you want it. (Of course, locate the reference designator near the part but outside of the Silkscreen Outline and away from pads.) Keep the following in mind: -Several reference designators can be moved and/or rotated at once by first selecting them (using a fence select or the <Ctrl><click>). -Set a smaller grid snap to have more control over the location of the reference designators. The keyboard arrow keys can be used to move the selected object one grid point at a time. Take the time now to move and rotate any of the reference designators away from the soldermask pads, making the layout pretty. Be careful not to modify anything else – like Silkscreen Outlines. Select the silk edit bottom scheme and pretty up the bottom reference designators, too. Save your layout.

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DELETING TEXT Some reference designators exist on both the top and bottom of the layout – such as an edge connector. These were built into the cell. Any reference designator text can be deleted without affecting the database integrity. Note: if undesirable modifications have been made to a cell in the layout, the cells can be refreshed from the local libraries with the Replace Cell command.

ADDING NOMENCLATURE AND GRAPHICS

Adding loose text on a layout is sometimes necessary for silkscreening board assembly numbers.

Select the silk edit top Display Control scheme. <Click> the Draw Mode toolbar button. If the Draw

Mode Properties dialog is not displayed, <click> the button again. On the Draw toolbar, <click> the Add Text button. On the Properties dialog, select Silkscreen Top from the Layer pulldown list. Also specify the following text parameters: Height: 75 Rotation: 0 Pen width: 0 String: PWA2001 Make sure the Mirror button is not pressed. It is also recommended to use one of the Gerber fonts. The text string should be attached to your cursor. Place it anywhere you have room.

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GENERATING SILKSCREEN GRAPHICS

When assembling the finished board, silkscreen ink on component pads will contaminate the solder process.

SILKSCREEN GENERATOR The Silkscreen Generator can be used to break silkscreen graphics away from pads.

DESIGN LAYERS Information is be extracted from selected layers such as the Reference Designators, Silkscreen Outlines and any user defined layers. This extracted information will then be placed on a separate Silkscreen layer as dumb graphics, nicely trimmed away from any pads and ready for photo-plotting.

Select Output>Silkscreen Generator from the menus.

At the bottom of the Silkscreen Generator dialog, select the following layers to extract silkscreen information from for the Top side silkscreen for selected cell types: Silkscreen Reference Designators Top Silkscreen Outlines Top Also select the following layers for the Bottom side silkscreen for selected cell types: Silkscreen Reference Designators Bottom Silkscreen Outlines Bottom

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BREAKING GRAPHICS AND TEXT To break silkscreen away from pads, the objects and clearances must be specified.

LAYOUT SIDE The Silkscreen side to process can be set to Top, Bottom, or Both sides of the layout.

PADS The Break silkscreen using option can be set to use Conductive Pads or Soldermask Pads for breaking the silkscreen.

CLEARANCES To Break graphics and Break Text away from component pads and vias, a Pad clearance and Via clearance must be specified for each. The clearance is from either the conductive pads or soldermask pads, to the silkscreen. A 0 (zero) clearance specifies breaking the silkscreen at the edge of the pad.

LINE WIDTHS The line Widths options for Graphic lines and Text lines must be specified. The generated silkscreen graphics will be created using these line widths which will eventually be the photo-plotted width.

Finish filling in the Silkscreen Generator dialog using the following settings:

Silkscreen side to process: Both Break silkscreen using: Soldermask Pads Process: All Package Groups Toggle on the Pad clearance and Via clearance options for both Break graphics and Break text. Verify that the clearance distance is 0 for these options. Set both Width options to 8. <Click> the OK button on the Silkscreen Generator dialog. Using the File Viewer, examine the SilkscreenGenerator.txt log.

Note: The Silkscreen Generator must be run after any changes to the original reference designators, component silkscreen outlines, etc.

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Select the silk edit top Display Control scheme again. On the Parts tab, under the Silkscreen Items

group, toggle off Outlines and Ref Des and then toggle on Silkscreen Layer to see the generated silkscreen graphics. Also, toggle off Place Outlines and then save this as a new local Display Control scheme called silk top. Browse around your layout and look for reference designators with silkscreen breaks. If you find any, repair the problem by first selecting your silk edit top Display Control scheme, move the reference designator text away from the pad, then a re-run the Silkscreen Generator. Repeat the above steps in this lab item for the bottom side of the layout.

Make a backup of the layout by selecting File>Save Copy from the menus. Save your

backup to c:\mgtraining\project\2001silk. Exit Expedition PCB.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION P-1

P GENERATING GERBER DATA This chapter discusses generating Gerber output and viewing that output in GerbTool. The topics covered are:

� PHOTO-PLOTTING OVERVIEW � PHOTO-PLOTTING OUTPUT � REVIEWING GERBER DATA

P-2 EXPEDITION PCB INTRODUCTION WG2000

PHOTO-PLOTTING OVERVIEW

Now that all the layout graphics are done, special plot data must be generated. For every separate piece of artwork needed to fabricate a printed circuit board (i.e. copper layers, soldermasks, etc.) there needs to be an individual Gerber photo-plot. This Gerber data (along with drill data and a fabrication document) are used by the board fabricator to make the physical printed circuit board.

APERTURES & D-CODES FOR DUMMIES Invisible to the user, a (camera) aperture is assigned to each unique graphic element in the layout based on element’s size/width. For instance, all .008” traces in the layout will use a specific aperture. Each aperture is automatically described during output and mapped to D-Codes within the Gerber data. There are two basic modes for apertures, “flash” and “draw”. Flash apertures are where the camera aperture flashes a single instance of the shape (example: .025” round shape for a particular component pad). Draw apertures are where the camera aperture stays open and draws with the shape, which is usually round (example: .025” round shape drawn for .025” traces). In the previous examples, the same .025” round aperture will be used to both flash or draw as needed.

GERBER MACHINE FORMAT Expedition PCB outputs the industry standard “274X” and “274D” Gerber formats. Each 274X Gerber photo-plot includes the list of apertures (D-Codes) used. With 274D, an external aperture list must be supplied with the photo-plots.

Open your “2001” PCB layout if it’s not already open. Select Setup>Gerber Machine Format from the

menus. In the list of Gerber machine format files, select gerbermachinefile1.gmf. You will be using this file (and these settings) when writing Gerber. Look over the settings but do not change anything. <Click> the Close button.

Note: The Gerber Machine Format dialog is just for creating or editing the Gerber machine format file. This is not where the desired file is selected for use.

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PHOTO-PLOTTING OUTPUT

Gerber data for each piece of artwork is written to individual plot files. These Gerber plot files are then sent to the printed circuit board fabricator.

Select Output>Gerber from the menus to display the Gerber Output dialog. 2


GERBER MACHINE FORMAT FILE The required Gerber Machine Format file (discussed previously) must be chosen for the current photo-plotting session.

At the bottom of the Gerber Output dialog, <click> the Gerber Machine Format file browse

button and open gerbermachinefile1.gmf.

GERBER PLOT SETUP FILE The Gerber Plot Setup file (.gpf) will contain all photo-plot definitions – what elements need to be in each photo-plot and what photo-plot files need to be made. An existing Gerber Plot Setup file can be used or a new Gerber Plot Setup file can be created from scratch.

At the top of the Gerber Output dialog, <click> the Gerber Plot Setup file browse button. On the Select

Gerber Plot Setup File dialog, specify a new File name of 6layer and <click> the Open button. You’ll be prompted to create this file so <click> the Yes button.

Note: Any needed Gerber Plot Setup file(s) could be placed in the template ahead of time for easy access later.

OUTPUT FILE PARAMETERS The Parameters tab of the Gerber Output dialog is used to create new Output files or rename existing ones. The actual contents for each output file is defined elsewhere.

FILES TO PROCESS The names specified here will eventually become the individual plot files stored on the computer’s harddrive.

On the Parameters tab, <click> the New button just above the Files to process list. <Click> on the

new New.gdo file name, change the name to layer1 and then press <Enter>. A file extension will be added automatically (layer1.gdo). This will eventually contain the pads and traces for layer 1.

HEADER / TRAILER TEXT The Parameters tab is also used to insert Header text and Footer text (comments) into each Gerber output file. This is optional.

Just in case of a mix up at the board fabricator, in the Header text field beneath the list, type in copper layer

1 (top). In the Footer text field, type in your company name. These comments will be inserted into the layer1.gdo file.

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COPYING AN OUTPUT FILE To save time, existing output file definitions can be copied and altered as needed.

With layer1.gdo in the Files to process list selected, <click> the Copy button (next to the

New button). Rename the new layer1_1.gdo to layer2 and also change the Header text to copper layer 2. Repeat this process until you have all 6 layers each with updated Header text. <Click> the New button or Copy button and name the file masktop. Add or modify the Header text to be soldermask top. Copy that output file to maskbottom and modify the Header text appropriately. <Click> the New button or Copy button and name the file pastetop. Add or modify the Header text to be solderpaste top. Copy that output file to pastebottom and modify the Header text appropriately. <Click> the New button or Copy button and name the file silktop. Add or modify the Header text to be silkscreen top. Copy that output file to silkbottom and modify the Header text appropriately.

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The current Output file. The rest of the dialog is

used to specify the contents of this file.

If the current Output file isof a trace or plane layer, then the conductor layer

must be chosen from this list.

A list of conductor layer Items to choose from.

Board items to photo-plot with a conductor layer or by themselves (such as

Soldermask or Silksceen).

User-defined layers to photo-plot with a conductor

layer or board item or by themselves.

OUTPUT FILE CONTENTS The Contents tab of the Gerber Output dialog is used to describe what each Output files will need to contain (such

as Part Pads, Traces, Board Outline, Silkscreen, Soldermask, etc.).


<Click> on the Contents tab.Select layer1.gdo from the Output file pulldown list. Now select items from

the rest of the dialog that you want included in that file. (Remember to <Ctrl><click> when selecting multiple items.) Select the following contents: *Conductors - In the Layer pulldown list, select Signal Layer 1. Everything in the Items list below it should be selected except Via Holes. *Board items – Select Board Outline only. *Cells – All Types should be selected. Now select layer2.gdo from the Output file pulldown list and repeat the previous steps except select Signal Layer 2 from the Layer pulldown list. Repeat the steps for the rest of the 6 layers.

In the Output file list, select masktop.gdo. Select the following contents:

*Conductors - In the Layer list, select (None). *Board items – Select Board Outline and Soldermask Top (make sure they’re both selected) *Cells – All Types should be selected. Repeat similarly for maskbottom.gdo.

In the Output file list, select pastetop.gdo. Select the following contents:

*Conductors - In the Layer list, select (None). *Board items – Select Board Outline and Solderpaste Top. *Cells – All Types should be selected. Repeat similarly for pastebottom.gdo.

In the Output file list, select silktop.gdo. Select the following contents:

*Conductors - In the Layer list, select (None). *Board items – Select Altered Silkscreen Top and Board Outline. *Cells – All Types should be selected. Repeat similarly for silkbottom.gdo.

Choose each of the Output files again, inspecting their settings. When you’re satisfied,

<click> the Gerber Plot Setup file Save button.

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GENERATING GERBER <Click> the Processed Checked Output Files button in the lower-right corner of the Gerber

Output dialog. After all of the Gerber .gdo files have been extracted, <click> the Close button. Using the File Viewer, examine the GerbPlot.txt log. Close the File Viewer when you’re done.

CHECKING THE GERBER DATA <Click> the GerbTool toolbar button. This launches GerbTool® and automatically opens

your new Gerber files. You may get a warning message about arcs. Uh… it’s probably nothing to worry about so just <click> the Yes button.

Select any button from the Layer palette (1 thru 12) and then <click> the Redraw button at the top of

the palette. <Click> the View All button on the View palette to zoom around all of the graphics. Toggle on and off different Gerber layers as desired (usually one at a time). Use the window/zoom/pan buttons on the View palette to inspect the Gerber graphics in detail.

View Window

Zoom In

Zoom Out

View All

Redraw

Pan Window

Redraw

Gerberlayer

toggle

When your satisfied that the Gerber data is ready to go, exit GerbTool®. Otherwise you may have to

make changes to your layout or edit the plot definitions and then re-extract the Gerber. Save your layout and exit Expedition PCB.

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION Q-1

Q GENERATING DRILL DATA This chapter discusses generating drill data for board fabrication and documentation. The topics covered are:

� PADSTACK HOLES REVIEW � NC DRILL � DRILL CHART � DRILL DATA OUTPUT FILES � EXPORTING DXF

Q-2 EXPEDITION PCB INTRODUCTION WG2000

PADSTACK HOLES REVIEW

Expedition PCB uses hole information from the padstack to generate drill data. The Properties for a particular hole in the Padstack Editor specifies the drill Type and Hole size. Also, Drill symbol assignment is used for displaying the specified drill symbols on a drill drawing.


NC DRILL

Along with Gerber data, NC (numerical control) drill data must be supplied to the board fabricator. This data is used to drill the proper size holes in precise locations on a PCB layout. Also, NC profile router data can be used to cut slots, make cutouts within the board area, and route boards out of a panel.

Open your “2001” PCB layout if it’s not already open. Using the Display Control dialog, toggle off all graphic

items except Board Outline and Drill Drawing – Through. Save a local only Display Control scheme called drill dwg. <Click> the Fit Board toolbar button. Now select Output>NC Drill from the menus to start the NC Drill generation process.

NC DRILL GENERATION The NC Drill Generation dialog is used to configure the drill data output.

NC DRILL MACHINE FORMAT FILE An NC drill machine format file for English units or Metric units can be attached using the Browse button. This .mmm ASCII file controls the format of the drill output files.

DRILL GENERATION OPTIONS The Sweep axis and Bandwidth options determine the order of the drills within the drill output files. The NC Drill Generation process creates log files. The Summary units within those log files can be reported in English or Metric regardless of the drill output units. The Machine file extension of the drill output files (for the board vendor) can be specified. The default is .ncd.

On the NC Drill Generation dialog, browse for an NC drill machine format file. Choose a format…

NCDrillEnglish.mmm or NCDrillMetric.mmm (use English if you have no preference). Leave the rest of the settings on this dialog default unless you feel you know better. Do NOT <click> the OK button yet.

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DRILL CHART

The Drill Chart is used for drill drawing documentation and lists all of the drills used in the layout. The NC Drill Generation process automatically generates drill chart graphics and places them on the Drill Drawing – Through layer.

On the NC Drill Generation dialog, <click> the Drill Chart Options button to open the Drill Chart Options

dialog.

DRILL CHART OPTIONS The Drill Chart Options dialog is used to set up how the drill chart will appear in graphics.

COLUMNS By default, the drill chart will display the columns Symbol, Diameter, Tolerance, Plated, then Quantity from left to right. The column order can be rearranged. New Columns can be added – Hole Name (the padstack hole name) and Notes (a blank column for adding text later).

TEXT SETTINGS The Font name, Font size, Line spacing, and Pen width (line thickness) can be specified for the drill chart text (and graphics). The Format for the hole size can be set to display the desired number of digits on each side of the decimal point. If set to 1.3 for example, a 34th hole will display as 0.034.

DEFAULT TOLERANCE If a hole tolerance was not specified in the padstack, the Default tolerance specified here will then be used.

HEADER/TRAILER TEXT An additional line of text can be added to the top and/or bottom of the drill chart.

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On the Drill Chart Options dialog, change the Font size to 90, the Format to 1.3.

On the Drill Chart Options dialog, <Click> the OK button to save the drill chart settings. Once Back at the NC Drill Generation dialog, <Click> the OK button to process the drill data and drill chart graphics.

DRILL CHART GRAPHICS The drill generation process first creates drill data and logs, then places the drill symbols and drill chart into the graphics. The upper left corner of the drill chart is located at the Board Origin (0/0) by default. Since the drill chart is a cell, it can be moved using placement commands.

Select View>Fit All from the menus. Change to Place Mode and define a fence

around a portion of the drill chart graphics, being careful to not select any of the layout.

<Click> the Move Action Key and move the drill chart, placing it to the right of your layout (as pictured). Select View>Fit All from the menus to get a better look.

DRILL DATA OUTPUT FILES

The drill data output files needed for board fabrication are stored within the PCB project’s output folder. Summary files are also stored with the rest of the log files.

Using the File Viewer, examine the three NC drill generation log files – NCDThruHolePlated.txt,

NCDThruHoleNonPlated.txt and NCDrill.txt. Using the Windows Explorer, browse out to c:\mgtraining\project\2001\pcb\output and open the ncdrill folder. The .ncd files (along with the Gerber files created previously), would be given to your board fabricator.

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EXPORTING DXF

In order to add intelligent dimensions to your layout for documentation, the drill drawing graphics must be exported from Expedition PCB and imported into a drafting tool such as MicroStation® or AutoCAD®. This is done using the DXF file format.

Save your layout. Select File>Export>DXF from the menus to open the

DXF Export dialog.

The Export DXF dialog lists all of the graphics elements used in the current layout. To keep the export/import operation simple, only the desired graphic items need to be selected for export.

On the Export DXF dialog, specify an DXF output filename of drill (the .dxf extension will be added

automatically). Select the items Board Outline and Drill Drawing for export. <Click> the OK button to export the selected graphics. Using the Windows Explorer, browse out to c:\mgtraining\project\2001\pcb\output and note that drill.dxf is stored there.

Make a final backup of the layout and store it in c:\mgtraining\project\2001done.

Exit Expedition PCB.

“Congratulations on a job well done!”

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19-OCT-01 PMCQ

EXPEDITION PCB INTRODUCTION R-1

R FINAL EXAM Don’t worry… this section is still under construction. This chapter is will be the final exam and consists of basic lab instructions to complete a simple layout. The topics covered are:

� JOB MANAGEMENT WIZARD � BOARD GEOMETRY � PART PLACEMENT � ROUTING � POST PROCESSING

Documents

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