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ESE 232 Introduction to Electronic Circuits
Professor Paul [email protected](314) 853-6200
Bryan Hall 302A
Chapter 1. Signals and Amplifiers
Copyright 2004 by Oxford University Press, Inc.
Microelectronics • Integrated circuit technology• Billions of components• Typically implement in silicon wafer < 100 mm2
• Examples: microprocessors, memories, logic chips
ESE 232• Study of microelectronics• Analysis and design• Functional circuits
Copyright 2004 by Oxford University Press, Inc.
Electrical circuits
• Processes signals• Driven by power sources (voltage or current)• At every point in a circuit, voltage and current are
defined.
Signal (or power) represented in voltage(Thevenin form)
Signal (or power) represented in current(Norton form)
Equivalent and translatable
vs(t) = Rs is(t)
Copyright 2004 by Oxford University Press, Inc.
Signals
• Contain time-varying information. • Exist in various forms (mechanical, electrical, chemical,
acoustical, etc.)• Can be conveniently processed by electrical circuits.• Converting non-electrical signal to electrical signal is done by
transducer (or sensor).
Copyright 2004 by Oxford University Press, Inc.
Frequency Spectrum of Signals
• Often difficult to express signals in time (in mathematical form).
• Signals can be shown in frequency spectrum: Fourier series, Fourier transform, Z-transform, etc. → At what frequencies does the signal contain energy and by how much?
Copyright 2004 by Oxford University Press, Inc.
Fourier Series
• Example: sine-wave va(t) = Va sin wt
va(t) has all its energy at the angular frequency of w = 2πf.
f is frequency in Hz. T = 1/f is period in seconds.Magnitude of this sine-wave at the angular frequency w
is Va.
Copyright 2004 by Oxford University Press, Inc.
Example: square-wave
Time expression
Frequency expression
w0= 2π/T
Copyright 2004 by Oxford University Press, Inc.
Frequency Allocations in the U.S.A.
Copyright 2004 by Oxford University Press, Inc.
Digital v. Analog
• Analog signal: continuous value, continuous time• Digital signal: discrete value, discrete time
Sample QuantizeAnalog Signal
DigitalSignal
Continuous timeContinuous value
Discrete timeContinuous value
Discrete timeDiscrete value
Copyright 2004 by Oxford University Press, Inc.
Why Digital?
• Less expensive circuits• Privacy and security• Small signals (less power)• Converged multimedia• Error correction and reduction
Why Not Digital?
• More bandwidth• Synchronization in electrical circuits• Approximated information
Copyright 2004 by Oxford University Press, Inc.
Notation
•Total instantaneous quantities: lowercase symbols with uppercase subscripts (e.g., iC)
•dc quantities: uppercase symbols with upper case subscripts (e.g., IC)•Power supply voltages: uppercase V’s with double letter uppercase subscripts (e.g., VEE)•dc currents draw from power supply: uppercase I’s with double letter uppercase subscripts (e.g., ICC)•Incremental signal quantities: lowercase symbols with lower case subscripts (e.g., ic)
Copyright 2004 by Oxford University Press, Inc.
Amplifiers
• Amplification of input signal• Linear amplifier: vo(t) = Avi(t) (A: constant gain)• Voltage amplifier: changes input signal amplitude
Av = voltage gain = vo / vi
• Preamplifier: shaping in frequency (i.e., amplifies different frequency components differently).
• Power amplifier: gains in voltage and current
symbols
Copyright 2004 by Oxford University Press, Inc.
Transfer Characteristic
Copyright 2004 by Oxford University Press, Inc.
load power ( )= power gain =
input power ( )
= current gain
voltage gain in decibels 20log
current gain in decibels 20log
power gain in decibels 10log
O OLp
I I I
Oi
I
p v i
v
i
p
v iPA
P v i
iA
i
A A A
A dB
A dB
A dB
Copyright 2004 by Oxford University Press, Inc.
Power Supplies
dc 1 1 2 2
dissipated
dc
dc power delivered to amplifer:
power drawn from sources:
power delivered to load:
power dissipated in amplifier:
amplifier efficiency: 100
I
L
L
P V I V I
P
P
P
P
P
Copyright 2004 by Oxford University Press, Inc.
1 2
Example. Amplifier with 10 V power supplies.
ˆGiven: ( ) sin , ( ) 9sin , 1 , 0.1 mA
9.5 mA
9= = 9 V/V (or 19.1 dB)
1ˆ9 V 9ˆ 9 mA 90 A/A (or 39.1 dB)ˆ1 k 0.1
I O L I
v
OO i
I
L
v t wt v t wt R k I
I I
A
II A
I
P
dc
dissipated dc
dc
9 9 1 0.140.5 mW, 0.05 mW
2 2 2 29 90 810 W/W (or 29.1 dB)
10 9.5 10 9.5 190 mW
190 0.05 40.5 149.6 mW
100 21.3%
rms rms rms rmso o I i i
p v i
I L
L
V I P V I
A A A
P
P P P P
P
P
Copyright 2004 by Oxford University Press, Inc.
Amplifier Saturation
maximum output
minimum output
To avoid saturation:
Iv v
L Lv
A A
Copyright 2004 by Oxford University Press, Inc.
at
quiescent point: instantaneous input: ( ) instantaneous output: ( )
input voltage is dc shifted by : ( ) ( )
output voltage: ( ) ( ) where ( ) ( ) and
i o
I I I i
OO O o o v i v
I
Q v t v t
V v t V v t
dvv t V v t v t A v t A
dv
Q
Nonlinear Transfer Characteristics and Biasing
•To avoid saturation, input signal should be shifted. → Biasing•Input signals are biased to operate in the middle of linear region.
Copyright 2004 by Oxford University Press, Inc.
4011
Example. transistor amplifier transfer characteristic:
10 10 for 0 V and 0.3 V
0.3 V. At 0.3 V, 0.690 V.
is highest when is lowest, i.e., 0 V.
Therefore,
IvO I O
O I
O I I
v e v v
L v v
v v v
L
0.673
when 0 V. 10 V.
We want to find such that 5 V.
0.673 V
= = -200 V/V I
O I
I O
I
Ov
I v
v v L
V V
V
dvA
dv
Copyright 2004 by Oxford University Press, Inc.
Circuit Models for Voltage Amplifiers
To make gain larger, make smaller. This also decouples the effects of unknown value of .
Ideal amplifiers have 0.
If , . This decouples
L o Lo vo i v vo
L o i L o
o L
o
L v vo
R v Rv A v A A
R R v R R
R R
R
R A A
the voltage gain of the amplifer from the values of .
If , then . Input is reduced by a voltage divider.
We want . Ideally, .
Overall voltage gain:
L
ii i s
i s
i s i
ovo
s
R
RR v v
R R
R R R
v RA
v
i L
i s L o
R
R R R R
Copyright 2004 by Oxford University Press, Inc.
Cascaded Amplifiers
Multiple stages of amplifiers put together.
Each stage may serve different purpose ( . ., power gain,
followed by voltage gain).
e g
High Ri with gain 10(Signal may be small.)
Modest Ri with gain 100(Provide gain.)
Small Ri with gain 1(Buffer output for next
stage.)
Copyright 2004 by Oxford University Press, Inc.
1
21
1
32
2
33
1 2 31
1
10.909 V/V
1 100
10010 9.9 V/V
100 1
10100 90.9 V/V
10 1
101 0.909 V/V
10 100
818 V/V
i
s
iv
i
iv
i
Lv
i
Lv v v v
i
L L
s i
v M
v M k
v kA
v k k
v kA
v k k
vA
v
vA A A A
v
v v
v v
1 1
6
1
8
1 1
743.6 V/V
/1008.18 10 A/A
/1
66.9 10 W/W
i iv
s s
o Li
i i
L oLp
i i
v vA
v v
i vA
i v M
v iPA
P v i
Copyright 2004 by Oxford University Press, Inc.
Different Amplifier Types
General Relationship: o mvo is m o
i i
R RA A G R
R R
Copyright 2004 by Oxford University Press, Inc.
Example 1.4. Small signal model for Bipolar Junction Transistor (BJT)
B: Base, E: Emitter, C: Collector
Emitter as common ( . ., ground) Common Emitter Ai e mplifier
Let 5 , = 2.5 , g 40 m A/V, 100 , and 5 . s m o LR k r k r k R k
BJT
and ||
|| 63.5 V/V. If , 66.7 V/V
be s o m be L os
o om L o o
s s s
rv v v g v R r
r R
v r vg R r r
v r R v
Copyright 2004 by Oxford University Press, Inc.
Frequency Response
With a sinusoidal input to a linear amplifier, the output is a sinusoid with
the same frequency, but with different amplitude and phase shift.
( ) : Transfer function of amplifier
( ) o
i
T w
VT w
V and ( )
Need to determine ( ) and ( ) for all frequencies.
T w
T w T w
Copyright 2004 by Oxford University Press, Inc.
1 2
1 2
1 2
Constant gain between and . Should operate in this region.
Gain dropping away from and . Signals are distorted
at frequencies away from and
We say the amplifier has the bandwi
w w
w w
w w
1 2dth between and .w w
Typically
3 dB
Copyright 2004 by Oxford University Press, Inc.
First Order Systems: systems with a single time constant
circuits have a single time constant
circuits have a single time constant
General solution (during a time period: initial
RC RC
LRL
R
Final Initial Final
time final time)
( )
Frequency domain analysis ( : angular variable, : Laplace variable)
1 1 , or , or
t
t
x t x x x e
w s
R R C L jwL sLjwC sC
Copyright 2004 by Oxford University Press, Inc.
Copyright 2004 by Oxford University Press, Inc.
Low pass RC circuit
No distortion means constant amplitude gain and linear phase shift.
Copyright 2004 by Oxford University Press, Inc.
High pass RC circuit
No distortion means constant amplitude gain and linear phase shift.
Copyright 2004 by Oxford University Press, Inc.
1
1Example 1.5. and ||
11
1 1 1
1 1 1
iii i
i s i i isi s s
i i si i
oLo i
s oL o s s ii
i L s i
RsCZ V
V V Z R CRZ R VR sC R
sC R
VRV V
R RR R V R RsCR R R R
constant Function of s
Time constant: ||s ii i s i
s i
R RC C R R
R R
Copyright 2004 by Oxford University Press, Inc.
Only the input circuit is a first order system (or single time constant circuit).
Output circuit is a zero order system ( . ., no energy storing element).
Overall transfer function ( ) 1
1o
i e
K KT s
s sw
0
( : 3 dB frequency)
1 1
1 1
o
o
s os s
i L
w
VK
R RVR R
Copyright 2004 by Oxford University Press, Inc.
Different Shapes of Amplifier Frequency Response
For all devices, the transfer function loses amplitude
gain at high frequency because of internal capacitance.
Simple low pass configuration.
Direct coupled amplifier
Amplifier can block low frequency components
(including DC) by putting a capacity in series
with input (i.e,. input circuit is a high pass circuit).
Capacitively coupled amplifier
Amplifier can "filter-in" only selective frequency
components. Typically higher order circuits.
Tuned amplifier
Copyright 2004 by Oxford University Press, Inc.
Logic Inverter
Circuit symbol• input 1 (high) → out put 0 (low)• input 0 (low) → out put 1 (high)
Transfer function• high vi (> 0.690V) → low vo (≈ 0.3V)
• low vi (≈ 0V) → high vo (≈ VDD)
• linear region for mid value of vi
Linear region for ordinary amplifier operation (transition region)
Nonlinear (saturation) region for digital binary logic operation
Copyright 2004 by Oxford University Press, Inc.
Noise Margin• For cascaded inverters• Noise margin for high input NMH = VOH - VIH
• Noise margin for low input NML = VIL - VOL
Copyright 2004 by Oxford University Press, Inc.
Ideal Inverter
NMH = NML =VDD / 2
Copyright 2004 by Oxford University Press, Inc.
Abstract Implementation of Inverter
voltage controlled switch.
When vI is low, switch is open, leaving the vertical path disconnected.→ vo = VDD is an open circuit voltage.
When vI is high, switch connects the vertical path.→ vo is a low level voltage determined largely by Voffset, a characteristic of the voltage controlled switch.(Ron is typically small.)
Copyright 2004 by Oxford University Press, Inc.
Propagation Delay• Change of output after input change is not instantaneous.• Internal capacitance of devices causes the delay.
Copyright 2004 by Oxford University Press, Inc.
Copyright 2004 by Oxford University Press, Inc.
offset
on
offsoffset
When the switch is on (input high), it provides the vertical path with
and . The capacity is open circuit at steady state. Thus the steady state
output value is low: DDOL
V
R
V VV V
et
onon
0.55 V.
When the switch becomes off (input becomes low), the vertical path is
connected by the capacitor only. The final value of output is because
once again, the capacitor becomes an DD
RR R
V
8 810 10
open circuit at steady state.
Assuming the input changes at 0,
(0 ) ( ) (0 ) (where )
5 (0.55 5) 5 4.45
Define to be the time for output to go from low
t
o o o o
t t
PLH
t
v t v v v e RC
e e
t
to the half way point
1 1to the final high output value. 5 0.55
2 2From this we get, =6.9 ns.
o PLH OH OL
PLH
v t V V
t