ES II Assignment

8/22/2019 ES II Assignment

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Q:1 Explain in brief the features of ARM microcontroller that are supported to Advanced

Embedded system design.

Ans:The main feature of ARM are as follows

1. It has32bit architecture but also supports 16 or 8bit data types .It supports 16bitinstructions also in Thumb mode

2. ARM is programmable as little endian or big endian data.

3. ARM provides the advantage of using a CISC in term of functionality, along with the

advantage of an RISC in term of faster program implementation as well as reduced code

lengths. It implement faster because the register word instantly availability to execution-

unit. Code lengths are reduced because most instructions use registers as operands. Few

bits in the instruction specify a register as operand .8,16 or 24 bit a specify memory

address as operand and the displacement bit in the instruction.

4. ARM7 and ARM9 microprocessor have combined RISC and CISC features. ARM

support complex addressing mode-base instruction set.

5. ARM7 has Princeton memory architecture. ARM9 has Harvard architecture.

6. ARM debug and trace tools quickly debug real-time software and trace instruction

execution and associated program data at full core speed.

7. A wide choice of development tools and of simulation model for leading EDA

environments and excellence debug support for SoC design are available.

8. ARM codes are forward compactable with higher version.

9. ARM permits programming by additional instruction set designed for 16bit operations.

10. ARM uses Intelligence Energy Manger technology. It implements advanced algorithms

to optionally balanced processor workload and energy consumption.

11. ARM processor uses AHB interface .AMBA is an established open source specification

for on-chip interconnects.



Q:2 Explain the architecture of microkernel in QNX RTOS.

Ans: QNX is intended for use in micro critical application in the area such as medical

instrumentation, internet routine, telemetric device, process control application and air traffic

control systems.QNX Neutrino offers POSIX- compliant API and implemented using

microkernel architecture.

The microkernel architecture is as shown in the below fig.

Because of the fine grained scalability of the microkernel architechture,it can be confured to very

small size-a critical advantage in high volume devices, where even a 1% reduction in memory

cost can return millions of dollars in profit.

Neutrino and its micro GUI called photon are designed to operate extremely fast on a very small

memory footprint, making inclusion in portable devices possible.

In fact,QNX and neutrino already web applications, set top boxes,MP3 players etc.

QNX Neutrino has been ported to number of platforms and now run on most modern CPUs that

are used in the embedded market.



Q: 3 Explain rate monotonic and deadline rate monotonic algorithm with example.

Ans: Rate Monotonic Algorithm: Rate monotonic is the priority based event driven

scheduling algorithm for periodic tasks. The priorities assigned to the task based on their

priorities values. A task with lower priority value is assigned higher priority.

Rate Monotonic Analysis(RMA) that uses simple model of the system staed as follows:

1. All process run on the single CPU, thus there is no task parallelism.

2. Context switching time ignored.

3. Execution time for different invocations of task are same and constant.

4. Tasks are totally independent of each other.

5. The deadline of an instance of the task occurs at the end of the period.

The term Rate Monotonic refers to the fact that monotonically higher to the priorities are

assign to the task having higher rate of occurrence.

Example:

The following table shows the set of three tasks along with their execution time (ei) and

Priorities (Pi).



A complete schedule for this task is shown is the following diagram:

At time instant 0, assume that the all three tasks P1,P2 & P3 has arrived. Further

instances will come at instances 3,9,12 etc. At time instance 0,since P1 is the highest priority task

it get scheduled. Once it is over at instance 1,P2 get schedule.

Deadline-Rate monotonic Algorithm



Deadline-monotonic priority assignment is a priority assignment policy used with fixed priority

pre-emptive scheduling.

With deadline-monotonic priority assignment, tasks are assigned priorities according to their

deadlines; the task with the shortest deadline being assigned the highest priority.This priority assignment policy is optimal for a set of periodic or sporadic tasks which comply

with the following restrictive system model:

1. All tasks have deadlines less than or equal to their minimum inter-arrival times (or

periods).

2. All tasks have worst-case execution times (WCET) that are less than or equal to their

deadlines.

3. All tasks are independent and so do not block each others' execution (for example by

accessing mutually exclusive shared resources).

4. No task voluntarily suspends itself.

5. There is some point in time, referred to as a critical instant, where all of the tasks become

ready to execute simultaneously.

6. Scheduling overheads (switching from one task to another) are zero.

7. All tasks have zero release jitter (the time from the task arriving to it becoming ready to

execute).

Consider the following example

http://en.wikipedia.org/wiki/Fixed_priority_pre-emptive_scheduling


http://en.wikipedia.org/wiki/Worst-case_execution_time

http://en.wikipedia.org/wiki/Worst-case_execution_time





To handle the case of overloads many researchers are considering load sharing schemes which

migrate tasks between the nodes of distributed systems.In industrial process control

environments such schemes are not applicable because only communicating task can be

migrated.In contrast to this,control tasks are highly input/output bound,and the permanent wiring

of the peripherels to certain nodes makes load shaaring impossible.Therefore the eariliest

deadline first algorithm is applicable.

Q:4 Differentiate between the hard,firm and soft real time operating system with suitable

example.

Ans: Hard Real-Time System

It guarantees that critical tasks complete on time. This goal requires that all delays in the

system be bounded from the retrieval of the stored data to the time that it takes the

operating system to finish any request made of it.

Hard real time systems are systems that cant tolerate any delay or if delay happens the

whole system will be worthless.

must finish the task within the restrict time



Often a hard real-time system operates on a preemptive, context switching operating

system where tasks will be switched in and out execution state upon its defined and

scheduled time slots to maintain its real-time characteristics.

Example:-Consider the example of an anti-missile system that has to perform critical

task.

It must first detect all incoming missiles, properly position the antimissile gun and then

fire to destroy the incoming missile before the incoming missile can do any damage. All

these tasks are hard real time in nature and the antimissile system would be considered to

have failed, if any of its tasks fails to complete before the corresponding deadlines.

Soft Real Time System

In this system critical real-time task gets priority over other tasks and retains that priority

until it completes.

Soft real time systems that can tolerate delay.

Can finish the task "on time" or exceed the deadline time for a few amount of time.

A soft real-time system, often denotes a system that attempts to meet all time constraints

imposed by its tasks or operations or applications by enjoying the powerful system

resources such as high clock rate, faster processors, speedy cache, and lightening buses.Yet, it is still a 'soft' real-time system because some critical tasks might be delayed due to

some system-oriented processes that are bulky and time-consuming and not preemptive.

Example:-Example of soft real-time system is web browsing. After an Uniform

Resource Locator(URL) is clicked, the corresponding web page is fetched and displayed

within a couple of seconds on an average. However when it takes several minutes to

display a requested page we still do not consider the system to have failed, but merely

express that performance of system has degraded..

Firm Real Time System:

Firm real time task is associated with some predefined deadline before which it is

required to produce its results.



In firm real time system if task does not complete within its deadline, the system does

not fail.

Infrequent deadline misses are tolerable, but may degrade the system's quality of service.

The usefulness of a result is zero after its deadline.

Firm real time task typically abound in multimedia applications.

Example:- Video conferencing

In video conferencing application, video frames and accompanying audio are converted

into packets and transmitted to the receiver over network. However some frames may get

delayed at different nodes. When a certain frame is being played if preceding frame

arrives at the receiver, then this frame is of no use is discarded.

Q:5 Explain the role of Binary semaphore in handling critical section.



Ans: Binary semaphores are used for both mutual exclusion and synchronization purposes.

Binary semaphores and mutexes are very similar but have some subtle differences:

Mutexes include a priority inheritance mechanism, binary semaphores do not. This makes

binary semaphores the better choice for implementing synchronization and mutexes the better choice for implementing simple mutual exclusion. The description of how a mutex can be used

as a mutual exclusion mechanism holds equally for binary semaphores. This sub section will

only describe using binary semaphores for synchronization.

Semaphore API functions permit a block time to be specified. The block time indicates the

maximum number of 'ticks' that a task should enter the Blocked state when attempting to 'take' a

semaphore, should the semaphore not be immediately available. If more than one task blocks on

the same semaphore then the task with the highest priority will be the task that is unblocked the

next time the semaphore becomes available.

Binary semaphore as a queue that can only hold one item. The queue can therefore only be

empty or full (hence binary). Tasks and interrupts using the queue don't care what the queue

holds - they only want to know if the queue is empty or full. This mechanism can be exploited to

synchronize (for example) a task with an interrupt.

Consider the case where a task is used to service a peripheral. Polling the peripheral would be

wasteful of CPU resources, and prevent other tasks from executing. It is therefore preferable that

the task spends most of its time in the Blocked state (allowing other tasks to execute) and only

execute itself when there is actually something for it to do. This is achieved using a binary

semaphore by having the task Block while attempting to 'take' the semaphore. An interrupt

routine is then written for the peripheral that just 'gives' the semaphore when the peripheral

requires servicing. The task always 'takes' the semaphore (reads from the queue to make the

queue empty), but never 'gives' it. The interrupt always 'gives' the semaphore.

Task prioritization can be used to ensure peripherals get services in a timely manner - effectively

generating a 'differed interrupt' scheme. An alternative approach is to use a queue in place of the

semaphore. When this is done the interrupt routine can capture the data associated with the

peripheral event and send it on a queue to the task. The task unblocks when data becomes

available on the queue, retrieves the data from the queue, then performs any data processing that

is required. This second scheme permits interrupts to remain as short as possible, with all post

processing instead occurring within a task.

http://www.freertos.org/Embedded-RTOS-Binary-Semaphores.html#Mutexes





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