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Enhanced Metamodeling Techniques for High- Dimensional IC Design Estimation Problems Andrew B. Kahng, Bill Lin and Siddhartha Nath VLSI CAD LABORATORY, UC San Diego Presented by: SeokHyeong Kang

Enhanced Metamodeling Techniques for High-Dimensional IC Design Estimation Problems

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Enhanced Metamodeling Techniques for High-Dimensional IC Design Estimation Problems. Andrew B. Kahng, Bill Lin and Siddhartha Nath VLSI CAD LABORATORY, UC San Diego Presented by: SeokHyeong Kang. Outline. Motivation Our Work Metamodeling Background Hybrid Surrogate Modeling (HSM) - PowerPoint PPT Presentation

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Page 1: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Enhanced Metamodeling Techniques for High-Dimensional IC Design Estimation

ProblemsAndrew B. Kahng, Bill Lin and Siddhartha Nath

VLSI CAD LABORATORY, UC San Diego

Presented by: SeokHyeong Kang

Page 2: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Outline• Motivation• Our Work• Metamodeling Background• Hybrid Surrogate Modeling (HSM)• Sampling Strategies• Low-dimension: NoC• High-dimension: PDN-Noise, CTS• Conclusions

Page 3: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Estimation in IC Design Problems• Combinatorial explosion in parameters

– Microarchitectural• E.g., NoC flit-width, #buffers, #VCs, #Ports

– Operational• E.g., workload activity factor, supply voltage

– Design implementation• E.g., core area, tool knobs, constraints

– Technology• E.g., library, corners

– Manufacturing• E.g., guardbands

Page 4: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Why Surrogate Modeling?• Implications of large parameter space

– Complex interactions between parameters– Difficult to capture effects in closed-form

analytical model• Surrogate models can be accurate

– Models derived from actual physical implementation data

– High accuracy demonstrated in previous works e.g., Samadi10, Nath12

Page 5: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Outline• Motivation• Our Work• Metamodeling Background• Hybrid Surrogate Modeling (HSM)• Sampling Strategies• Low-dimension: NoC• High-dimension: PDN-Noise, CTS• Conclusions

Page 6: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Axes of Our Studies• Modeling techniques

– Multivariate Adaptive Regression Splines (MARS) – Radial Basis Functions (RBF)– Kriging (KG)– Hybrid Surrogate Modeling (HSM)

• Resource Metrics– Number of dimensions (D) – number of samples (N)

• Sampling strategies– Latin Hypercube Sampling (LHS)– Adaptive Sampling (AS)

• Quality-of-Results Metrics– Maximum and average percentage errors

Page 7: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Our IC Design Estimation Problems• Network-on-Chip (NoC)

– Estimate: area and power– Dimensionality: low– Parameters: microarchitectural and implementation

• Power Delivery Network (PDN)– Estimate: cell delay and slew in presence of PDN noise– Dimensionality: high– Parameters: implementation and technology

• Clock Tree Synthesis (CTS)– Estimate: wirelength and buffer area of clock trees– Dimensionality: high– Parameters: implementation and technology

Page 8: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Key Contributions• Demonstrate accuracy limits of popular metamodeling

techniques as D increases– RBF and KG are preferred at low-D– MARS is preferred at high-D

• Demonstrate application of Adaptive Sampling (AS) to reduce errors and sample set sizes– Up to 1.5x reduction in worst-case estimation errors– Up to 1.2x reduction in sample set size

• Present Hybrid Surrogate Modeling (HSM) to achieve up to 3x reduction in worst-case estimation error

Page 9: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Outline• Motivation• Our Work• Metamodeling Background• Hybrid Surrogate Modeling (HSM)• Sampling Strategies• Low-dimension: NoC• High-dimension: PDN-Noise, CTS• Conclusions

Page 10: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Brief Background on Metamodeling• General form of estimation

where,Predicted response

deterministic response

Random noise function

Regression coefficients

Page 11: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Metamodel Classification• Tree-based

– MARS• Gaussian process-based

– RBF– KG

• We use cross-validation to make models generalizable

Page 12: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Regression Function: MARS

where,Ii : # interactions in the ith basis function

bji: ±1

xv: vth parameter

tji: knot location Knot = value of parameter where line segment changes slope

Page 13: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Regression Function: RBF

where,aj: coefficients of the kernel function

K(.): kernel functionµj: centroid

rj : scaling factors

Page 14: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Regression Function: KG

where,R(.): correlation function (Gaussian, linear, spherical, cubic, …): correlation function parameter

Page 15: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Outline• Motivation• Our Work• Metamodeling Background• Hybrid Surrogate Modeling (HSM)• Sampling Strategies• Low-dimension: NoC• High-dimension: PDN-Noise, CTS• Conclusions

Page 16: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Multicollinearity at High-D• If is a linear combination of one or more ’s

– Matrix (N x D) of parameters ’s is ill-conditioned– Large variance in ’s– Proper relationship between ’s and is hard to determine

• Impact on estimation results– Large errors between and as D increases

• Diagnostic tests to detect multicollinearity– Variance Inflation Factor (VIF)– F-test– ANOVA

Page 17: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Hybrid Surrogate Modeling• “Cure” adverse effects of multicollinearity as D

increases• Variant of Weighted Surrogate Modeling but uses least-

squares regression to determine weights

where,w1 : weight of predicted response of surrogate model for MARS

w2 : weight of predicted response of surrogate model for RBF

w3 : weight of predicted response of surrogate model for KG

Page 18: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Metamodeling Flow

Generate training samples(LHS, AS)

Derive model (MARS/RBF/KG/…)

Surrogate models

Generate test data points

Estimate response

Compute model accuracy

Generate golden data

points

Page 19: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Outline• Motivation• Our Work• Metamodeling Background• Hybrid Surrogate Modeling (HSM)• Sampling Strategies• Low-dimension: NoC• High-dimension: PDN-Noise, CTS• Conclusions

Page 20: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Latin Hypercube Sampling• Sample uniformly (“exploration”) across parameter space

– Only 5 samples

1 2 3 4 5 6 7 8 9 10 110

10000

20000

30000

40000

50000

60000

70000

Error

Page 21: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Adaptive Sampling• Sample using “exploration” and “exploitation” across parameter space

– Only 5 samples

1 2 3 4 5 6 7 8 9 10 110

10000

20000

30000

40000

50000

60000

70000

Error

Page 22: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Results of Our PDN Studies

• AS reduces – error by 1.5x compared to LHS for same #samples– #samples by 1.2x compared to LHS for same % error

LHS AS LHS AS LHS AS LHS ASMARS RBF KG HSM

0%

20%

40%

60%

80%600 650 700 750 800 850 900

~1.5x in error~1.2x in #samples

Page 23: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Outline• Motivation• Our Work• Metamodeling Background• Hybrid Surrogate Modeling (HSM)• Sampling Strategies• Low-dimension: NoC• High-dimension: PDN-Noise, CTS• Conclusions

Page 24: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Experimental Setup: NoC (Low-D)• Metrics to estimate

– Total area of standard cells and total power• Parameters

– Microarchitectural: # Ports, #VCs, #Buffers, Flit-Width Implementation: Clock frequency

• Others– Technology libraries: TSMC65GPLUS and TSMC45GS– SP&R Tools: Synopsys Design Compiler and Cadence SOC Encounter– Router RTL: Netmaker from Cambridge University

• Methodology– Perform SP&R with above tools and parameters– Extract post-P&R area and power– Derive surrogate models

Page 25: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Maximum Estimation Error: NoC (Low-D)

• With a training sample set size of 36 data points– RBF and KG (Gaussian process-based) have in general 1.5x less error than

MARS (tree-based) – HSM can have up to 3x less error than MARS

MAR

S

RBF

KG

HSM

MAR

S

RBF

KG

HSM

Area Power

0%

8%

16%

24%

32%

40% 36 48 64 102#Samples

~1.5x reduction ~3x reduction

RBF, KG and HSM are highly accurate at low-dimensions

Page 26: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Outline• Motivation• Our Work• Metamodeling Background• Hybrid Surrogate Modeling (HSM)• Sampling Strategies• Low-dimension: NoC• High-dimension: PDN-Noise, CTS• Conclusions

Page 27: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Experimental Setup: PDN (High-D)• Metrics to estimate

– Cell delay and slew• Parameters

– Implementation: • Cell: cell size, load capacitance, input slew, body bias• PDN noise: noise amplitude, noise slew, noise offset• Corner: temperature, process-performance ratio

– Technology: supply voltage, threshold voltage• Others

– Technology libraries: TSMC65GPLUS – Tool: Synopsys HSPICE – Netlist: 10-stage INV chain

• Methodology– Perform SPICE simulation with above parameters– Extract delay and slew of cells– Derive surrogate models

Page 28: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Maximum Estimation Error: PDN (High-D)

• With training sample set size of 700 data points– MARS and HSM have 3x less error than RBF with ridge regression– At D = {8, 9}, MARS and HSM have similar accuracy, because other models

have large average errors

MAR

S

RBF+

RR RBF

KG

HSM

MAR

S

RBF+

RR RBF

KG

HSM

Cell delay Output slew

0%

50%

100%

150%

200%

250%

300%

350% 6 7 8 9

~3x reduction

Large errors due to multicollinearity

D =

MARS and HSM are highly accurate at high-dimensions

Page 29: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Experimental Setup: CTS (High-D)• Metrics to estimate

– Wirelength and total buffer area• Parameters

– Implementation: #sinks, buffer type, max. # levels, core area, max. skew, max. delay

– Technology: max. buffer size, max. buffer and sink transition times, max. wire widths

• Others– Technology libraries: TSMC65GPLUS and TSMC45GS– Tool: Cadence SoC Encounter – Testcase: Uniformly placed sinks

• Methodology– Perform CTS with SOC Encounter and above parameters– Extract wirelength and buffer area of clock trees– Derive surrogate models

Page 30: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

MAR

S

RBF+

RR RBF

KG

HSM

MAR

S

RBF+

RR RBF

KG

HSM

Wirelength Buffer area

0%50%

100%150%200%250%300%350%400% 6 7 8 9 10

~2x reduction~3x reduction

Maximum Estimation Error: CTS (High-D)

• With training sample set size of 84 data points– HSM has up to 3x less error than all other surrogate models– Errors grow with D in MARS, RBF, KG due to multicollinearity

D =

HSM remains highly accurate at high-dimensions

Page 31: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Outline• Motivation• Our Work• Metamodeling Background• Hybrid Surrogate Modeling (HSM)• Sampling Strategies• Low-dimension: NoC• High-dimension: PDN-Noise, CTS• Conclusions

Page 32: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

IC Design Modeling Guidelines

All VIF values <

0.33?

N Y

All VIF values <

0.33?

Y

Try HSM/RBF/

KGTry MARS

N

Estimates with small

µ & σ2?

Try HSM/MARS/RBF/RBF+RR/KG

Try HSM/MARS/

RBF/KG

Try MARS

D > 5?

Y N

N Y

Page 33: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Conclusions• Metamodeling techniques can be effective for IC design estimation

problems• We study three problems along multiple axes

– NoC, PDN, CTS– Quality and resource metrics, modeling techniques and sampling

strategies• We use AS and demonstrate

– 1.5x reduction in error vs. LHS– 1.2x reduction in sample size vs. LHS

• We propose Hybrid Surrogate Modeling (HSM) to “cure” multicollinearity at high dimensions.

• HSM can be up to 3x more accurate than MARS, RBF and KG at low- and high-dimensions

• Ongoing: (1) Techniques to reduce multicollinearity, (2) dimensionality reduction, and (3) application to other IC physical design problems

Page 34: Enhanced  Metamodeling  Techniques for High-Dimensional IC Design Estimation Problems

Thank you