Embedded-Systems Unit 2 Notes

8/13/2019 Embedded-Systems Unit 2 Notes

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UNITIIDEVICESANDBUSESFORDEVICESNETWORK

IOporttypes-SerialandparallelIOports

Aportisadevicetoreceivethebytesfromexternalperipheral(s)[ordevice(s)orprocessor(s)orcontrollers]forreadingthemlaterusinginstructionsexecutedontheprocessor tosendthebytestoexternalperipheralordeviceorprocessorusinginstructionsexecutedonprocessor.

APortconnectstotheprocessorusingaddressdecoderandsystembuses.Theprocessorusestheaddressesoftheport-registersforprogrammingtheportfunctionsormodes,readingportstatusandforwritingorreadingbytes.

Example SIserialinterfacein8051 SPIserialperipheralinterfacein68HC11 PPIparallelperipheralinterface8255 PortsP0,P1,P2andP3in8051orPA,PB,PCandPDin68HC11 COM1andCOM2portsinanIBMPC

IOPortTypesTypesofSerialports

SynchronousSerialInput SynchronousSerialOutput AsynchronousSerialUARTinput AsynchronousSerialUARToutput(bothasinputandasoutput,forexample,modem.)

Typesofparallelports ParallelportonebitInput Parallelonebitoutput ParallelPortmulti-bitInput ParallelPortmulti-bitOutput


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SynchronousSerialInputExample

Inter-processordatatransfer,readingfromCDorharddisk,audioinput,video input,dialtone,networkinput,transceiverinput,scannerinput,remotecontrollerinput,serialI/Obusinput,writingtoflashmemoryusingSDIO(SecureDataAssociationIObasedcard).

SynchronousSerialInput ThesenderalongwiththeserialbitsalsosendstheclockpulsesSCLK(serialclock)tothe

receiverportpin.Theportsynchronizestheserialdatainputbitswithclockbits.Eachbitineachbyteaswellaseachbyteinsynchronization

Synchronizationmeansseparationbyaconstantintervalorphasedifference.Ifclockperiod=T,theneachbyteattheportisreceivedatinputinperiod=8T.

Thebytesarereceivedatconstantrates.Eachbyteatinputportseparatesby8Tanddatatransferrateortheseriallinebitsis(1/T)bps.[1bps=1bitpers]

Serialdataandclockpulse-inputs Onsameinputlinewhenclockpulseseitherencodeormodulateserialdatainputbits

suitably.Receiverdetectstheclockpulsesandreceivesdatabitsafterdecodingordemodulating.

OnseparateinputlineWhenaseparateSCLKinputissent,thereceiverdetectsatthemiddleor+veedgeorveedgeoftheclockpulsesthatwhetherthedata-inputis1or0and


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savesthebitsinan8-bitshiftregister.Theprocessingelementattheport(peripheral)savesthebyteataportregisterfromwherethemicroprocessorreadsthebyte.

Masteroutputslaveinput(MOSI)andMasterinputslaveoutput(MISO)MOSIwhentheSCLKissentfromthesendertothereceiverandslaveisforcedto

synchronizesentinputsfromthemasteraspertheinputsfrommasterclock.

MISOwhentheSCLKissenttothesender(slave)fromthereceiver(master)andslaveisforcedtosynchronizeforsendingtheinputstomasterasperthemasterclockoutputs.

Synchronousserialinputisusedforinterprocessortransfers,audioinputsandstreamingdatainputs.

ExampleSynchronousSerialOutputInter-processordatatransfer,multiprocessorcommunication,writingtoCDorharddisk,

audioInput/output,videoInput/output,dialeroutput,networkdeviceoutput,remoteTVControl,transceiveroutput,andserialI/ObusoutputorwritingtoflashmemoryusingSDIOSynchronousSerialOutput

Eachbitineachbytesentinsynchronizationwithaclock. Bytessentatconstantrates.Ifclockperiod=T,thendatatransferrateis(1/T)bps. SendereithersendstheclockpulsesatSCLKpinorsendstheserialdataoutputandclockpulse-inputthroughsameoutputlinewithclockpulseseithersuitablymodulateorencodetheserialoutputbits.


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Synchronousserialoutputusingshiftregister Theprocessingelementattheport(peripheral)sendsthebytethroughashiftregisterattheporttowherethemicroprocessorwritesthebyte.

Synchronousserialoutputisusedforinterprocessortransfers,audiooutputsandstreamingdataoutputs.

SynchronousSerialInput/output

Eachbitineachbyteisinsynchronizationatinputandeachbitineachbyteisinsynchronizationatoutputwiththemasterclockoutput.

Thebytesaresentorreceivedatconstantrates.TheI/OscanalsobeonsameI/Olinewheninput/outputclockpulseseithersuitablymodulateorencodetheserialinput/output,respectively.

If

clock

period

=

T,

then

data

transfer

rate

is

(1/T)bps.

Theprocessingelementattheport(peripheral)sendsandreceivesthebyteataportregister

toorfromwherethemicroprocessorwritesorreadsthebyte


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AsynchronousSerialportlineRxD(receivedata).

Doesnotreceivetheclockpulsesorclockinformationalongwiththebits.

Eachbit

is

received

in

each

byte

at

fixed

intervals

but

each

received

byte

is

not

in

synchronization.

Bytesseparatebythevariableintervalsorphasedifferences. AsynchronousserialinputalsocalledUARTinputifserialinputisaccordingtoUARTprotocol

ExampleSerialAsynchronousInput

Asynchronousserialinputisusedforkeypadinputsandmodeminputsincomputers Keypadcontrollerserialdata-in,mice,keyboardcontroller,modeminput,charactersend

inputsonserialline[alsocalledUART(universalreceiverandtransmitter)inputwhenaccordingtoUARTmode]


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UARTprotocolseriallineformat Startingpointofreceivingthebitsforeachbyteisindicatedbyalinetransitionfrom1to0

foraperiod=T.[T1calledbaudrate.] Ifsendersshift-clockperiod=T,thenabyteattheportisreceivedatinputinperiod=

10.Tor11.Tduetouseofadditionalbitsatstartandendofeachbyte.ReceiverdetectsnbitsattheintervalsofTfromthemiddleofthestartindicatingbit.Then=0,1,,10or11andfindswhetherthedata-inputis1or0andsavesthebitsinan8-bitshiftregister.

Processingelementattheport(peripheral)savesthebyteataportregisterfromwherethemicroprocessorreadsthebyte.

AsynchronousSerialOutput AsynchronousoutputserialportlineTxD(transmitdata). Eachbitineachbytetransmitatfixedintervalsbuteachoutputbyteisnotin

synchronization(separatesbyavariableintervalorphasedifference).Minimumseparationis1stopbitintervalTxD.

Doesnotsendtheclockpulsesalongwiththebits. Sendertransmitsthebytesattheminimumintervalsofn.T.Bitsreceivingstartsfromthe

middleofthestartindicatingbit, n=0,1,,10or11andsendersendsthebitsthrougha10or11-bitshiftregister.

Theprocessingelementattheport(peripheral)sendsthebyteataportregistertowherethemicroprocessoristowritethebyte.


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SynchronousserialoutputisalsocalledUARToutputifserialoutputisaccordingtoUARTprotocolExampleSerialAsynchronousOutput_Outputfrommodem,outputforprinter,theoutputonaserialline[alsocalledUARToutputwhenaccordingtoUART]HalfDuplex

Halfduplexmeansasfollows:ataninstantcommunicationcanonlybeoneway(inputoroutput)onabi-directionalline.

Anexampleofhalf-duplexmodetelephonecommunication.Ononetelephoneline,thetalkcanonlyinthehalfduplexwaymode.

FullDuplex Fullduplexmeansthatataninstant,thecommunicationcanbebothways.

AnexampleofthefullduplexasynchronousmodeofcommunicationisthecommunicationbetweenthemodemandthecomputerthoughTxDandRxDlinesorcommunicationusingSIinmodes1,2and3in8051ParallelPortsinglebitinput

Completionofarevolutionofawheel, Achievingpresetpressureinaboiler, Exceedingtheupperlimitofpermittedweightoverthepanofanelectronicbalance, Presenceofamagneticpieceinthevicinityoforwithinreachofarobotarmtoitsendpoint

andFillingofaliquiduptoafixedlevel.ParallelPortOutput-singlebit

PWMoutputforaDAC,whichcontrolsliquidlevel,ortemperature,orpressure,orspeedorangularpositionofarotatingshaftoralineardisplacementofanobjectorad.c.motorcontrol

Pulsestoanexternalcircuit Controlsignaltoanexternalcircuit

ParallelPortInput-multi-bit ADCinputfromliquidlevelmeasuringsensorortemperaturesensororpressuresensoror

speedsensorord.c.motorrpmsensor Encoderinputsforbitsforangularpositionofarotatingshaftoralineardisplacementofan

object.


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ParallelPortOutput-multi-bit LCDcontrollerforMultilaneLCDdisplaymatrixunitinacellularphonetodisplayonthe

screenthephonenumber,time,messages,characteroutputsorpictogrambit-imagesfordisplayscreenore-mailorwebpage

Printcontrolleroutput Stepper-motorcoildrivingbits

ParallelPortInput-Output PPI8255 Touchscreeninmobilephone

PortsorDevicesCommunication andcommunicationprotocols TwoModesofcommunicationbetweenthedevicesandcomputersystemFullDuplexBothdevicesordeviceandcomputersystemsimultaneouslycommunicateeachother.HalfDuplexOnlyonedevicecancommunicatewithanotherataninstanceThreewaysofcommunicationbetweentheportsordevices

1. Synchronous2. Iso-synchronous3. Asynchronous

1.SynchronousandIso-synchronousCommunicationinSerialPortsorDevicesSynchronousCommunication.

Whenabyte(character)oraframe(acollectionofbytes)inofthedataisreceivedortransmittedattheconstanttimeintervalswithuniformphasedifferences,thecommunicationiscalledassynchronous.Bitsofafullframearesentinaprefixedmaximumtimeinterval.Iso-synchronous

Synchronouscommunicationspecialcasewhenbitsofafullframearesentinthemaximumtimeinterval,whichcanbevariable.SynchronousCommunication

Clockinformationistransmittedexplicitlyorimplicitlyinsynchronouscommunication.Thereceiverclockcontinuouslymaintainsconstantphasedifferencewiththetransmitterclock.Bitsofadataframemaintainuniformphasedifferenceandaresentwithinafixedmaximumtimeinterval.


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Exampleofsynchronousserialcommunication FramessentoveraLAN.Framesofdatacommunicatewiththeconstanttime

intervalsbetweeneachframeremainingconstant. Anotherexampleistheinter-processorcommunicationinamultiprocessorsystem

OptionalSynchronousCodebits OptionalSyncCodebitsorbi-synccodebitsorframestartandendsignalingbits

Duringcommunicationfewbits(eachseparatedbyintervalT)sentasSynccodetoenabletheframesynchronizationorframestartsignaling.

Codebitsprecedethedatabits. Maybeinversionofcodebitsaftereachframeincertainprotocols. Flagbitsatstartandendarealsousedincertainprotocols.Alwayspresent

Synchronousdeviceportdatabits ReciprocalofTisthebitpersecond(bps). Databitsmframebitsor8bitstransmitsuchthateachbitisatthelinefortimeT

or,eachframeisatthelinefortime(m.T)mmaybe8oralargenumber.ItdependsontheprotocolSynchronousdeviceclockbits

ClockbitsEitheronaseparateclocklineorondatalinesuchthattheclockinformationisalsoembeddedwiththedatabitsbyanappropriateencodingormodulation

Generallynotoptional


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Firstcharacteristicsofsynchronouscommunication1.Bytes(orframes)maintainaconstantphasedifference,whichmeanstheyare

synchronous,i.e.insynchronization.Nopermissionofsendingeitherthebytesortheframesattherandomtimeintervals,thismodethereforedoesnotprovideforhandshakingduringthecommunicationintervalThisfacilitatesfastdatacommunicationatpre-fixedbps.Secondcharacteristicsofsynchronouscommunication

2.Aclocktickingatacertainratehasalwaystobetherefortransmittingseriallythebitsofallthebytes(orframes)serially.Mostly,theclockisnotalwaysimplicittothesynchronousdatareceiver.ThetransmittergenerallytransmitstheclockrateinformationAsynchronousCommunication fromSerialPortsorDevices

AsynchronousCommunicationClocksofthereceiverandtransmitterindependent,unsynchronized,butofsamefrequencyandvariablephasedifferencesbetweenbytesorbitsoftwodataframes,whichmaynotbesentwithinanyprefixedtimeinterval.Exampleofasynchronouscommunication

UARTSerial,Telephoneormodemcommunication.RS232CcommunicationbetweentheUARTdevicesEachsuccessivebytecanhavevariabletime-gapbuthaveaminimumin-betweenintervalandnomaximumlimitforfullframeofmanybytes


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Twocharacteristicsofasynchronouscommunication

1.Bytes(orframes)neednotmaintainaconstantphasedifferenceandareasynchronous,i.e.,notinsynchronization.ThereispermissiontosendeitherbytesorframesatvariabletimeintervalsThisfacilitatesin-betweenhandshakingbetweentheserialtransmitterportandserialreceiverport

2.Thoughtheclockmusttickingatacertainratealwayshastobetheretotransmitthebitsofasinglebyte(orframe)serially,itisalwaysimplicittotheasynchronousdatareceiverandisindependentofthetransmitterClockFeatures

_Thetransmitterdoesnottransmit(neitherseparatelynorbyencodingusingmodulation)alongwiththeserialstreamofbitsanyclockrateinformationintheasynchronouscommunicationandreceiverclockthusisnotabletomaintainidenticalfrequencyandconstantphasedifferencewithtransmitterclockExample:IBMpersonalcomputerhastwoCOMports(communicationports)

_COM1andCOM2atIOaddresses0x2F8-0xFFand0xx38-0x3FF _HandshakingsignalsRI,DCD,DSR,DTR,RTS,CTS,DTR _DataBitsRxDandTxDExample:COMportandModemHandshakingsignals _Whenamodemconnects,modemsendsdatacarrierdetectDCDsignalat

aninstancet0. _Communicatesdatasetready(DSR)signalataninstancet1whenitreceives

thebytesontheline. _Receivingcomputer(terminal)respondsataninstancet2bydataterminal

ready(DTR)signal.AfterDTR,requesttosend(RTS)signalissentataninstancet3

_Receivingendrespondsbycleartosend(CTS)signalataninstancet4.AftertheresponseCTS,thedatabitsaretransmittedbymodemfromaninstancet5tothereceiverterminal.

_Betweentwosetsofbytessentinasynchronousmode,thehandshakingsignalsRTSandCTScanagainbeexchanged.Thisexplainswhythebytesdonotremainsynchronizedduringasynchronoustransmission.


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3.CommunicationProtocols1.Protocol

Aprotocolisastandardadopted,whichtellsthewayinwhichthebitsofaframemustbesentfromadevice(orcontrollerorportorprocessor)toanotherdeviceorsystem[Even

in

personal

communication

wefollow

aprotocol

we

say

Hello!

Thentalk

and

then

say

good

bye!]Aprotocoldefineshowaretheframebits:

1)sentsynchronouslyorIsosynchronouslyorasynchronouslyand atwhatrate(s)?2)precededbytheheaderbits?Howthereceivingdeviceaddresscommunicatedsothatonlydestineddeviceactivatesandreceivesthebits?[Neededwhenseveraldevicesaddressedthoughacommonline(bus)]

3)Howcanthetransmittingdeviceaddressdefinedsothatreceivingdevicecomestoknowthesourcewhenreceivingdatafromseveralsources?

4)Howtheframe-lengthdefinedsothatreceivingdeviceknowtheframe-sizeinadvance?5)Frame-contentspecificationsArethesentframebitsspecifythecontrolordeviceconfiguringorcommendordata?6)Aretheresucceedingtoframethetrailingbitssothatreceivingdevicecanchecktheerrors,ifanyinreceptionbeforeitdetectsendoftheframe?Aprotocolmayalsodefine:7)Framebitsminimumandmaximumlengthpermittedperframe


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ThecountsmultipliedbytheintervalTgivethetime.The(presentcountsinitialcounts)Tintervalgivesthetimeintervalbetweentwoinstanceswhenpresentcountbitsarereadandinitialcountswerereadorset.

Timer _Hasaninputpin(oracontrolbitincontrolregister)forresettingitforallcountbits=0s. _Hasanoutputpin(orastatusbitinstatusregister)foroutputwhenallcountbits=0s

afterreachingthemaximumvalue,whichalsomeansaftertimeoutoroverflow.Counter

Adevice,whichcountstheinputduetotheeventsatirregularorregularintervals.Thecountsgivesthenumberofinputeventsorpulsessinceitwaslastread.HasaregistertoenablereadofpresentcountsFunctionsastimerwhencountingregularintervalclockpulses_Hasaninputpin(oracontrolbitincontrolregister)forresettingitforallcountbits=0s._Hasanoutputpin(orastatusbitinstatusregister)foroutputwhenallcountbits=0safterreachingthemaximumvalue,whichalsomeansaftertimeoutoroverflow.

TimerorCounterInterrupt_Whenatimerorcounterbecomes0x00or0x0000after0xFFor0xFFFF(maximumvalue),itcangenerateaninterrupt,oranoutputTime-OutorsetastatusbitTOV


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FreerunningCounter(BlindrunningCounter)Acountingdevicemaybeafreerunning(blindcounting)devicegivingoverflowinterruptsatfixed

intervals

Apre-scalarfortheclockinputpulsestofixtheintervalsFreeRunningCounter

Itisusefulforactionorinitiatingchainofactions,processorinterruptsatthepresetinstancesnotingtheinstancesofoccurrencesoftheevents

_processorinterruptsforrequestingtheprocessortousethecapturingofcountsattheinputinstance_comparingofcountsontheeventsforfutureActions


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Freerunning(blindcounting)deviceManyApplications Basedon_comparingthecount(instance)withtheonepreloadedinacompareregister[anadditional

registerfordefininganinstanceforanaction]_capturingcounts(instance)inanadditionalregisteronaninputevent.

[Anadditioninputpinforsensinganeventandsavingthecountsattheinstanceofeventandtakingaction.]

Freerunning(BlindCounts)inputOCenablepin(oracontrolbitincontrolregister)

Forenablinganoutputwhenallcountbitsatfreerunningcount=preloadedcountsinthecompareregister.AtthatinstanceastatusbitoroutputpinalsosetsinandaninterruptOCINTofprocessorcanoccurforeventofcomparisonequality.Generatesalarmorprocessorinterruptsatthepresettimesorafterpresetintervalfromanotherevent

Freerunning(BlindCounts)inputcapture-enablepin(oracontrolbitincontrolregister)forInstanceofEventCaptureAregisterforcapturingthecountsonaninstanceofaninput(0to1or1to0ortoggling)transition_AstatusbitcanalsosetsinandprocessorinterruptcanoccurforthecaptureeventFreerunning(BlindCounts)Pre-scalingPrescalarcanbeprogrammedasp=1,2,4,8,16,32,..byprogrammingaprescalerregister.Prescalardividestheinputpulsesaspertheprogrammedvalueofp.


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Countinterval=pTintervalT=clockpulsesperiod,clockfrequency=T1Freerunning(BlindCounts)Overflow

Ithasanoutputpin(orastatusbitinstatusregister)foroutputwhenallcountbits=0safterreachingthemaximumvalue,whichalsomeansaftertimeoutoroverflowFreerunningn-bitcounteroverflowsafterp2nTintervalUsesofatimerdevice

_RealTimeClockTicks(SystemHeartBeats).[Realtimeclockisaclock,which,oncethesystemstarts,doesnotstopandcan'tberesetanditscountvaluecan'tbereloaded.Realtimeendlesslyflowsandneverreturnsback!]RealTimeClockissetforticksusingprescalingbits(orratesetbits)inappropriatecontrolregisters. Initiatinganeventafterapresetdelaytime.Delayisaspercountvalueloaded. Initiatinganevent(orapairofeventsorachainofevents)afteracomparison(s)withbetweenthepre-settime(s)withcountedvalue(s).[Itissimilartoapresetalarm(s).].

ApresettimeisloadedinaCompareRegister.[Itissimilartopresettinganalarm]. Capturingthecountvalueatthetimeronanevent.Theinformationoftime(instanceofthe

event)isthusstoredatthecaptureregister. Findingthetimeintervalbetweentwoevents.Countsarecapturedateacheventincapture

register(s)andread.Theintervalsarethusfoundout. Waitforamessagefromaqueueormailboxorsemaphoreforapresettimewhenusing

RTOS.ThereisaApredefinedwaitingperiodisdonebeforeRTOSletsataskrun.Watchdogtimer.Itresetsthesystemafteradefinedtime.

_BaudorBitRateControlforserialcommunicationonalineornetwork.Timertimeoutinterruptsdefinethetimeofeachbaud

_Inputpulsecountingwhenusingatimer,whichistickedbygivingnonperiodicinputsinsteadoftheclockinputs.Thetimeractsasacounterif,inplaceofclockinputs,theinputsaregiventothetimerforeachinstancetobecounted.

_Schedulingofvarioustasks.Achainofsoftware-timersinterruptandRTOSusestheseinterruptstoschedulethetasks.

_Timeslicingofvarioustasks.Amultitaskingormulti-programmedoperatingsystempresentstheillusionthatmultipletasksorprogramsarerunningsimultaneouslybyswitchingbetweenprogramsveryrapidly,forexample,afterevery16.6ms.


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_Processknownasacontextswitch.[RTOSswitchesafterpresettime-delayfromonerunningtasktothenext.task.Eachtaskcanthereforeruninpredefinedslotsoftime]

Timedivisionmultiplexing(TDM) _Timerdeviceusedformultiplexingtheinputfromanumberofchannels. _Eachchannelinputallottedadistinctandfixed-timeslottogetaTDMoutput.[For

example,multipletelephonecallsaretheinputsandTDMdevicegeneratestheTDMoutputforlaunchingitintotheopticalfiber.

SoftwareTimer_Asoftware,whichexecutesandincreasesordecreasesacount-variable(countvalue)onaninterruptfromonasystemtimeroutputorfromonarealtimeclockinterrupt._Thesoftwaretimeralsogenerateinterruptonoverflowofcount-valueoronfinishingvalueofthecountvariable.

SystemclockInasystemanhardware-timingdeviceisprogrammedtotickatconstantintervals.AteachtickthereisaninterruptAchainofinterruptsthusoccuratperiodicintervals.TheintervalisasperapresetcountvalueTheinterruptsarecalledsystemclockinterrupts,whenusedtocontroltheschedulesandtimingsofthesystem

Softwaretimer(SWT)SWTisatimerbasedonthesystemclockinterruptsTheinterruptfunctionsasaclockinputtoanSWT.ThisinputiscommontoalltheSWTsthatareinthelistofactivatedSWTs.AnynumberofSWTscanbemadeactiveinalist.EachSWTwillsetastatusflagonitstimeout(count-valuereaching0).


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Actionsareanalogoustothatofahardwaretimer.Whilethereisphysicallimit(1,2or3or4)forthenumberofhardwaretimersinasystem,SWTscanbelimitedbythenumberofinterruptvectorsprovidedbytheuser.Certainprocessors(microcontrollers)alsodefinestheinterruptvectoraddressesof2or4SWTs

SERIALBUSCOMMUNICATIONPROTOCOLSI2CInterconnectingnumberofdevicecircuits,Assumeflashmemory,touchscreen,ICsfor

measuringtemperaturesandICsformeasuringpressuresatanumberofprocessesinaplant._ICsmutuallynetworkthroughacommonsynchronousserialbusI2CAn'InterIntegratedCircuit'(I2C)bus,apopularbusforthesecircuits.

_SynchronousSerialBusCommunicationfornetworking_EachspecificI/Osynchronousserialdevicemaybeconnectedtootherusingspecificinterfaces,forexample,withI/OdeviceusingI2Ccontroller

_I2CBuscommunicationuseofonlysimplifiesthenumberofconnectionsandprovidesacommonway(protocol)ofconnectingdifferentorsametypeofI/Odevicesusingsynchronousserialcommunication

IOI2CBus_AnydevicethatiscompatiblewithaI2Cbuscanbeaddedtothesystem(assuminganappropriatedevice

driverprogram

is

available),

and

aI2C

devicecan

be

integrated

into

any

system

thatuses

that

I2Cbus.


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OriginallydevelopedatPhilipsSemiconductorsSynchronousSerialCommunication400kbpsupto2mand100kbpsforlongerdistancesThreeI2Cstandards

1. Industrial100kbpsI2C,2.

100

kbps

SM

I2C,

3. 400kbpsI2C

I2CBus_TheBushastwolinesthatcarryitssignalsonelineisfortheclockandoneisforbi-

directionaldata._ThereisastandardprotocolfortheI2Cbus.DeviceAddressesandMasterintheI2Cbus_Eachdevicehasa7-bitaddressusingwhichthedatatransferstakeplace._Mastercanaddress127otherslavesataninstance._MasterhasataprocessingelementfunctioningasbuscontrolleroramicrocontrollerwithI2C(InterIntegratedCircuit)businterfacecircuit.SlavesandMastersintheI2Cbus_EachslavecanalsooptionallyhasI2C(InterIntegratedCircuit)buscontrollerandprocessingelement._Numberofmasterscanbeconnectedonthebus.


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_However,ataninstance,masterisone,whichinitiatesadatatransferonSDA(serialdata)lineandwhichtransmitstheSCL(serialclock)pulses.Frommaster,adataframehasfieldsbeginningfromstartbit

SynchronousSerialBusFieldsanditslength_

First

field

of

1

bit

Start

bit

similar

to

onein

an

UART

_Secondfieldof7bitsaddressfield.Itdefinestheslaveaddress,whichisbeingsentthedataframe(ofmanybytes)bythemaster_Thirdfieldof1controlbitdefineswhetherareadorwritecycleisinprogress_Fourthfieldof1controlbitdefineswhetheristhepresentdataisanacknowledgment(fromslave)_Fifthfieldof8bitsI2Cdevicedatabyte_Sixthfieldof1-bitbitNACK(negativeacknowledgement)fromthereceiver.Ifactivethenacknowledgmentafteratransferisnotneededfromtheslave,elseacknowledgementisexpectedfromtheslave_Seventhfieldof1bitstopbitlikeinanUARTDisadvantageofI2CbusTimetakenbyalgorithminthehardwarethatanalyzesthebitsthroughI2Cincasetheslavehardwaredoesnotprovideforthehardwarethatsupportsit.CertainICssupporttheprotocolandcertaindonot.Opencollectordriversatthemasterneedapull-upresistanceof2.2Koneachline


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SERIALBUSCOMMUNICATIONPROTOCOLSCANDistributedControlAreaNetworkexample-anetworkofembeddedsystemsinautomobile_CAN-buslineusuallyinterconnectstoaCANcontrollerbetweenlineandhostatthenode.Itgivestheinputandgetsoutputbetweenthephysicalanddatalinklayersatthehostnode._TheCANcontrollerhasaBIU(businterfaceunitconsistingofbufferanddriver),protocolcontroller,status-cumcontrolregisters,receiver-bufferandmessageobjects.Theseunitsconnectthehostnodethroughthehostinterfacecircuit

Threestandards:1. 33kbpsCAN,2. 110kbpsFaultTolerantCAN,3. 1MbpsHighSpeedCAN

CANprotocolThereisaCANcontrollerbetweentheCANlineandthehostnode._CANcontrollerBIU(BusInterfaceUnit)consistingofabufferanddriver_MethodforarbitrationCSMA/AMP(CarrierSenseMultipleAccesswithArbitrationonMessagePrioritybasis)EachDistributedNodeUses:


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TwistedPairConnectionupto40mforbi-directionaldataLine,whichpullstoLogic1througharesistorbetweenthelineand+4.5Vto+12V.LineIdlestateLogic1(Recessivestate)UsesabuffergatebetweenaninputpinandtheCANlineDetectsInputPresenceattheCANlinepulleddowntodominant(active)statelogic0(ground~0V)byasendertotheCANlineUsesacurrentdriverbetweentheoutputpinandCANlineandpullslinedowntodominant(active)statelogic0(ground~0V)whensendingtotheCANlineProtocoldefinedstartbitfollowedbysixfieldsofframebitsDataframestartsafterfirstdetectingthatdominantstateisnotpresentattheCANlinewithlogic1(Rstate)to0(Dstatetransition)foroneserialbitintervalAfterstartbit,sixfieldsstartingfromarbitrationfieldandendswithsevenlogic0send-field3-bitminimuminterframegapbeforenextstartbit(RDtransition)occurs

ProtocoldefinedFirstfieldinframebits_Firstfieldof12bits'arbitrationfield._11-bitdestinationaddressandRTRbit(RemoteTransmissionRequest)


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_Destinationdeviceaddressspecifiedinan11-bitsub-fieldandwhetherthedatabytebeingsentisadataforthedeviceorarequesttothedevicein1-bitsub-field._Maximum211devicescanconnectaCANcontrollerincaseof11-bitaddressfieldstandard11-bitaddressstandardCAN_Identifiesthedevicetowhichdataisbeingsentorrequestisbeingmade._WhenRTRbitisat'1',itmeansthispacketisforthedeviceatdestinationaddress.Ifthisbitisat'0'(dominantstate)itmeans,thispacketisarequestforthedatafromthedevice.ProtocoldefinedframebitsSecondfield_Secondfieldof6bitscontrolfield.Thefirstbitisfortheidentifiersextension._Thesecondbitisalways'1'._Thelast4bitsspecifycodefordataLength_Thirdfieldof0to64bitsItslengthdependsonthedatalengthcodeinthecontrolfield.Fourthfield(thirdifdatafieldhasnobitpresent)of16bitsCRC(CyclicRedundancyCheck)bits.Thereceivernodeusesittodetecttheerrors,ifany,duringthetransmissionFifthfieldof2bitsFirstbit'ACKslot'ACK='1'andreceiversendsback'0'inthisslotwhenthereceiverdetectsanerrorinthereception.Senderaftersensing'0'intheACKslot,generallyretransmitsthedataframe.Secondbit'ACKdelimiter'bit.ItsignalstheendofACKfield.Ifthetransmittingnodedoesnotreceiveanyacknowledgementofdataframewithinaspecifiedtimeslot,itshouldretransmit.Sixthfieldof7-bitsend-of-theframespecificationandhasseven'0'sSERIALBUSCOMMUNICATIONPROTOCOLSUSBUSBHostApplicationsConnecting

flashmemorycards,pen-likememorydevices,digitalcamera,printer,mouse-device,PocketPC,videogames,Scanner


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UniversalSerialBus(USB)

_Serialtransmissionandreceptionbetweenhostandserialdevices_Thedatatransferisoffourtypes:(a)Controlleddatatransfer,(b)Bulkdatatransfer,(c)Interruptdrivendatatransfer,(d)Iso-synchronoustransfer_Abusbetweenthehostsystemandinterconnectednumberofperipheraldevices

USBProtocolFeatures

_Maximum127devicescanconnectahost._Threestandards:USB1.1(alowspeed1.5Mbps3meterchannelalongwithahighspeed12Mbps25meterchannel),USB2.0(highspeed480Mbps25meterchannel),andwirelessUSB(highspeed480Mbps3m)

Hostconnectiontothedevicesornodes_UsingUSBportdrivingsoftwareandhostcontroller,_Hostcomputerorsystemhasahostcontroller,whichconnectstoaroothub._Ahubisonethatconnectstoothernodesorhubs._Atree-liketopology


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USBDevicefeatures_Canbehotplugged(attached),configuredandused,reset,reconfiguredandused_Bandwidthsharingwithotherdevices:Hostschedulesthesharingofbandwidthamongtheattacheddevicesataninstance._Canbedetached(whileothersareinoperation)andreattached._AttachinganddetachingUSBdeviceorhostwithoutrebootingUSBdevicedescriptor_Hasdatastructurehierarchyasfollows:_Ithasdevicedescriptorattheroot,whichhasnumberofconfigurationdescriptors,whichhasnumberofinterfacedescriptorandwhichhasnumberofendpointdescriptor.PoweringUSBdevice_Adevicecanbeeitherbus-poweredorself-powered._Inaddition,thereisapowermanagementbysoftwareatthehostforUSBportsUSBprotocol_USBbuscablehasfourwires,onefor+5V,twofortwistedpairsandoneforground._Terminationimpedancesateachendasperthedevice-speed._ElectromagneticInterference(EMI)-shieldedcableforthe15MbpsUSBdevices.


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_SerialsignalsNRZI(NonReturntoZero(NRZI)_Thesynchronizationclockencodedbyinsertingsynchronouscode(SYNC)fieldbeforeeachUSBpacket_ReceiversynchronizesitsbitsrecoveryclockcontinuouslyUSBProtocolApolledbusHostcontrollerregularlypollsthepresenceofadeviceasscheduledbythesoftware.Itsendsatokenpacket.Thetokenconsistsoffieldsfortype,direction,USBdeviceaddressanddeviceend-pointnumber.Thedevicedoesthehandshakingthroughahandshakepacket,indicatingsuccessfulorunsuccessfultransmission.ACRCfieldinadatapacketpermitserrordetectionUSBsupportedthreetypesofpipes

1. 'Stream'withnoUSB-definedprotocol.Itisusedwhentheconnectionisalreadyestablishedandthedataflowstarts

2. 'DefaultControl'forprovidingaccess.3. 'Message'forthecontrolfunctionsforofthedevice.

Hostconfigureseachpipewiththedatabandwidthtobeused,transferservicetypeandbuffersizes.PARALLELBUSDEVICEPROTOCOLSPCIBus_Parallelbusenablesahostcomputerorsystemtocommunicatesimultaneously32-bitor64-bitwithotherdevicesorsystems,forexample,toanetworkinterfacecard(NIC)orgraphiccardComputersystemPCIWhentheI/Odevicesinthedistributedembeddedsubsystemsarenetworkedallcancommunicatethroughacommonparallelbus.PCIconnectsathighspeedtoothersubsystemshavingarangeofI/Odevicesatveryshortdistances(


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_networksubsystems,_videocard,_modemcard,_harddiskcontroller,PCIbusconnects_thinclient,_digitalvideocapturecard,_streamingdisplays,_10/100BaseTcard,_Cardwith16MBFlashROMwitharoutergatewayforaLANand_CardusingDEC21040PCIEthernetLANcontroller. WhentheI/Odevicesinthedistributedembeddedsubsystemsarenetworked,allcancommunicatethroughacommonparallelbus.PCIconnectsathighspeedtoothersubsystemshavingarangeofI/Odevicesatveryshortdistances(


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_Anothersixteen16-bitregisteridentifiesadeviceIDnumber.Thesetwonumbersletallowthedevicetocarryoutitsauto-detectionbyitshostcomputer.PeripheralComponentInterconnect(PCI)Bus_IndependentfromtheIBMarchitecture._NumberofembeddeddevicesinacomputersystemusePCI_ThreestandardsforthedevicesinterfacingwiththePC_PCI32bit/33MHz,and64bit/66MHz_PCIExtended(PCI/X)64bit/100MHz,_CompactPCI(cPCI)BusTwosuperspeedversions_PCISuperV2.3264/528MBps3.3V(on64-bitbus),and132/264(on32-bitbus)and_PCI-XSuperV1.01afor800MBps64-bitbus3.3Volt.PCIbridge_PCIbusinterfaceswitchesaprocessorcommunicationwiththememorybustoPCIbus._Inmostsystems,theprocessorhasasingledatabusthatconnectstoaswitchmodule_Someprocessorsintegratetheswitchmoduleontothesameintegratedcircuitastheprocessortoreducethenumberofchipsrequiredtobuildasystemandthusthesystemcost._Communicateswiththememorythroughamemorybus(asetofaddress,controlanddatabuses),adedicatedsetofwiresthattransferdatabetweenthesetwosystems._AseparateI/ObusconnectsthePCIswitchtotheI/Odevices.AdvantageofSeparatememoryandI/Obuses_I/Osystemgenerallydesignedformaximumflexibility,toallowasmanydifferentI/Odevicesaspossibletointerfacetothecomputer_Memorybusisdesignedtoprovidethemaximum-possiblebandwidthbetweentheprocessorandthememorysystem.PCI-X(PCIextended)133MBpstoasmuchas1GBpsBackwardcompatiblewithexistingPCIcardsUsedinhighbandwidthdevices(FiberChannel,andprocessorsthatarepartofaclusterandGigabitEthernet)Maximum264MBpsthroughput,uses8,16,32,or64bittransfers6UcardscontainadditionalpinsforuserdefinedI/OsLiveinsertionsupport(Hot-Swap),


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Supportstwoindependentbusesonthebackplane(ondifferentconnectors)SupportsEthernet,Infiniband,andStarFabricsupport(Switchedfabricbasedsystems)CompactPCI(cPCI)EachPCIdeviceonBus_Performaspecificfunction,_Maycontainaprocessorandsoftwaretoperformaspecificfunction._Eachdevicehasthespecificmemoryaddress-range,specificinterrupt-vectors(pre-assignedorautoconfigured)andthedeviceI/Oportaddresses._AbusofappropriatespecificationsandprotocolinterfacesthesetothehostcomputersystemorcomputeConfigurationaddressspace_UniquefeatureofPCIbusuniquefeatureisitsconfigurationaddressspace.PCIcontrollerFeaturesAccessesonedeviceatatimeAllthedeviceswithinhostdeviceorsystemcansharetheI/Oportandmemoryaddresses,butcannotsharetheconfigurationregistersDevicecannotmodifyotherconfigurationregistersbutcanaccessotherdeviceresourcesorsharetheworkorassisttheotherdeviceIftherearereasonsfordoingitso,aPCIdrivercanchangethedefaultbootupassignmentsonconfigurationtransactions.PCIDeviceInitializationAdevicecaninitializeatbootingtimeAvoidsanyaddresscollisionDeviceonbootupdisablesitsinterruptandclosesitsdoortoitsaddressspaceexcepttotheconfigurationregistersspace

PCIBIOS(BasicInput-OutputSystem)Performstheconfigurationtransactionsandthen,memoryandaddressspacesautomaticallymaptotheaddressspaceinthedevicehostingsystem

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Embedded-Systems Unit 2 Notes