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Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Embedded Software Design Peter R. Wihl (former Guest Lecturer)

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Page 1: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Embedded Software Design

Peter R. Wihl(former Guest Lecturer)

Page 2: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Overview

• Data flow practices (Throughput)

• Real time systems

• Software design overview

• Communication protocols

• An example software design

Feel free to ask questions at any time

Page 3: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Execution Flow

• A diagram that describes the major steps in the sequential software flow.

• Illustrates each logical step and decision point in the overall design of the software.

• Provides a starting point for the design of the software.

• Is to embedded software as logical architecture is to hardware.

• Is mapped later to Routines, Functions or Objects

Page 4: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Before Designing Execution Flow

1. Identify which logical architectural modules are mapped to software.

2. Identify what time period all logical software function must be completed in.

3. Identify any additional overhead functionality due to modules mapped to software and/or characteristics of the physical design. ie. Polling/Interrupts

Page 5: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Logical Design Architecture Example

ADC

ECC

Error

Error Detect

Error Correct

DAC

ControllerSM

16

2

16

16

DRdy

En

En

En

EnLoad

Enable1

Enable2

Enable3DAC_Load ED_Enable

Data_ReadyFr = 20 – 20 KHz

Fr = 20 – 20 KHz

Vpp = 1 VVoff = 0 V

Vpp = 1 VVoff = 0 V

FS = 44.1 KHz

Page 6: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Physical Architecture Mapping

ADC

DAC

Microcontroller

16

16

DRdy

Load

DAC_Load

Data_ReadyFr = 20 – 20 KHz

Fr = 20 – 20 KHz

Vpp = 1 VVoff = 0 V

Vpp = 1 VVoff = 0 V

FS = 44.1 KHz

ADC_Data[15:0]

DAC_Data[15:0]

ECC

Error

Error Detect

Error Correct

TP = 1/44.1 KHz= 22.7 us

Page 7: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Logical Design Architecture Example

ADC

ECC

Error

Error Detect

Error Correct

DAC

ControllerSM

16

2

16

16

DRdy

En

En

En

EnLoad

Enable1

Enable2

Enable3DAC_Load ED_Enable

Data_ReadyFr = 20 – 20 KHz

Fr = 20 – 20 KHz

Vpp = 1 VVoff = 0 V

Vpp = 1 VVoff = 0 V

FS = 44.1 KHz

Mapped to microcontroller

Page 8: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Role of Microcontroller

• Read 16-bit word from ADC

• Calculate Error Correction Code (2-bit)

• Inject possible error

• Detect if there is an error

• If there is an error correct it

• Write new 16-bit word to DAC

Page 9: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Execution Flow DiagramInitialize

Read ADC Byte(Register)

Write ADC Byte to memory

Last byte in word?

Yes

No

Calculate ECC

Store ECC Value

Inject possible error

Calculate if there is error

Error Detected?

Calculate correct ADC word value

Write Byte to DAC

Last byte in word?

Yes

No

Page 10: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Data Throughput in SW

• What is synchronous data flow?– Data arrives at regular intervals

• What is asynchronous data flow?– Data does not arrive at regular intervals

• What is isochronous data flow?– Data must be delivered within certain time

constraints

Page 11: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Data Flow Practices

• Polling

• Interrupt triggered (blocking)

• Interrupt triggered (non-blocking)

• Event driven– Often referred to as interrupt driven

Page 12: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Sample Problem

• Need to receive 16 bytes into a buffer and then process the buffer

• Bytes arrive asynchronously

Page 13: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Polling Overview

Read ADC Port

Store ADC Value

Process Buffer

Buffer Full?

Enter Loop

No

Yes

Page 14: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Polling

main do forever count = 0 while count < 16 while byte not ready nop get byte buffer[count] = byte incr count process buffer

Page 15: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Interrupt (Blocking) Overview

Read ADC Port

Store ADC Value

Process Buffer

Buffer Full?

Enter IRQ

No

Yes

IRQ Loop

Disable Interrupts

Enable Interrupts

Exit IRQ

Enable Interrupts

Loop Forever

Enter Main

Main Loop

Page 16: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Interrupt Triggered(Blocking)

interrupt rx_byte

disable interrupts

count = 0

while count < 16

get byte

buffer[count] = byte

incr count

process buffer

enable interrupts

return

main

enable interrupts

do forever

nop

Page 17: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Interrupt (Non-Blocking) OverviewEnter IRQ

IRQ Loop

Process Buffer

Yes

Exit IRQ

Buffer Full?

Read ADC Port

Store ADC Value

Increment Count

No

Increment Count

Enable Interrupts

Loop Forever

Enter Main

Main Loop

Count = 0

Page 18: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Interrupt Triggered(Non-blocking)

interrupt rx_byte

if count < 16

get byte

buffer[count] = byte

incr count

else if count = 16

process buffer

count = 0

return

main

count = 0

enable interrupts

do forever

nop

Page 19: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Event Driven OverviewEnter Main

Main Loop

Count = 0

Process Buffer

Process = 1

Enable Interrupts

Process = 0

Enter IRQ

No

Yes

IRQ Loop

Exit IRQ

Read ADC Port

Count <16

Increment Count

Store ADC Value

Page 20: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Event Driven

interrupt rx_byte

if count < 16

get byte

buffer[count] = byte

incr count

return

main

count = 0

enable interrupts

do forever

if count = 16

process buffer

count = 0

Page 21: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Real Time

• Hard real time– Absolute deterministic response to an

event

• Soft real time– Average response to an event

Page 22: Embedded Software Design Peter R. Wihl (former Guest Lecturer)
Page 23: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Embedded Software Practices

Peter R. Wihl

ECE 164 Spring 2004

Page 24: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Overview

• Data flow practices

• Real time systems

• Communication protocols

• Software design overview

• An example software design

Feel free to ask questions at any time

Page 25: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Data Flow Types

• What is synchronous data flow?

• What is asynchronous data flow?

• What is isochronous data flow?

Page 26: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Data Flow Types

• What is synchronous data flow?– Data arrives at regular intervals

• What is asynchronous data flow?– Data does not arrive at regular intervals

• What is isochronous data flow?– Data must be delivered within certain time

constraints

Page 27: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Data Flow Practices

• Polling

• Interrupt triggered (blocking)

• Interrupt triggered (non-blocking)

• Event driven– Often referred to as interrupt driven

Page 28: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Sample Problem

• Need to receive 16 bytes into a buffer and then process the buffer

• Bytes arrive asynchronously

Page 29: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Polling

main do forever count = 0 while count < 16 while byte not ready nop get byte buffer[count] = byte incr count process buffer

Page 30: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Interrupt Triggered(Blocking)

interrupt rx_byte

disable interrupts

count = 0

while count < 16

get byte

buffer[count] = byte

incr count

process buffer

enable interrupts

return

main

enable interrupts

do forever

nop

Page 31: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Interrupt Triggered(Non-blocking)

interrupt rx_byte

if count < 16

get byte

buffer[count] = byte

incr count

else if count = 16

process buffer

count = 0

return

main

count = 0

enable interrupts

do forever

nop

Page 32: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Event Driven

interrupt rx_byte

if count < 16

get byte

buffer[count] = byte

incr count

return

main

count = 0

enable interrupts

do forever

if count = 16

process buffer

count = 0

Page 33: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Real Time

• Hard real time– Absolute deterministic response to an

event

• Soft real time– Average response to an event

Page 34: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Trick Questions

• Which is better, hard or soft real time?

• Which design methods are hard real time?

• Which design methods are soft real time?

Page 35: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Communication Protocols

• What is a communication protocol?– An established set of conventions by which

multiple systems exchange data

• The speech analogy– The sounds you can make are the

communication medium– The language you use is the protocol

Page 36: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Sample Protocol

Byte Data

0 Synchronization

1 Payload size

2…2+size Payload

2+size+1 Packet checksum

Page 37: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Protocol Interrupt

interrupt rx_byte get byte checksum = byte checksum switch (state) SYNC if byte = sync checksum = byte state = SIZE SIZE size = byte if size > 0 count = 0 state = PAYLOAD else state = CHECKSUM

PAYLOAD buffer[count] = byte incr count if count = size state = CHECKSUM CHECKSUM if checksum = 0 state = ACCEPT else state = SYNC ACCEPT drop byte return

Page 38: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Protocol Main

main

state = SYNC

enable interrupts

do forever

if state = ACCEPT

process buffer

state = SYNC

• This is a simple event loop that provides mutual exclusion for the buffer

Page 39: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Time For A Break

Page 40: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Software Design Overview

• Requirements Analysis

• Architecture

• Design

• Implementation

• Module Testing

• Design Validation Testing

Page 41: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Example Problem

• I want to build a Heads Up Display for my car.

• I would like to see both my engine RPM and fuel economy on my windshield.

• My car has a serial diagnostic interface that provides this data.

Page 42: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Requirements

• System shall have a Heads Up Display (HUD)

• System shall interface with vehicle’s onboard diagnostic system

• HUD shall display current RPM

• HUD shall display current fuel economy (MPG)

Page 43: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Hardware Constraints

• Vehicle’s onboard diagnostic system– Needs a wake-up signal sent every 1 second– Operates at 10,500 bps

• Heads Up Display– 256x128 pixels– Full display must be calculated and mirrored– Operates at 115,200 bps

Page 44: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Processor Requirements

• Processor shall have 2 UARTs1. Vehicle’s onboard diagnostic system2. Heads Up Display

• Processor shall have a timer– Vehicle’s onboard diagnostic system wake-up

• Processor shall have more than 8192 bytes of memory– Processed display image (4096 bytes)– Mirrored display image (4096 bytes)

Page 45: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Hardware Design

Heads UpDisplay

Vehicledata

Processor /microcontroller

Serial vehicle data

Serial display control

Page 46: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Software Architecture

Heads UpDisplay

Vehicledata

Serial vehicle data

Serial display control

Vehicle datainterface

RPM dataformatting

MPG dataformatting

Display processing

RPM data MPG data

MPG textRPM text

Display controlinterface

Display image

Page 47: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Software Design

• Modules– Vehicle Diagnostic Interface (VDI)– RPM Data Formatting (RDF)– MPG Data Formatting (MPG)– Display Processing (DP)– Display Control Interface (DCI)

Page 48: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Software Design

• Modules– Vehicle Diagnostic Interface (VDI)– RPM Data Formatting (RDF)– MPG Data Formatting (MPG)– Display Processing (DP)– Display Control Interface (DCI)

• Main/Initialization

Page 49: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Vehicle Diagnostic Interface

RPM data MPG data

Serial vehicle data Serial vehicle data

Receive blockSend wake up

signalTimer

Data type?

Extract RPM data Extract MPG data

RPM MPG

Data block

Page 50: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Vehicle Diagnostic Interface

interrupt rx_byte … rx_state = ACCEPT … return

extract_data if data type = RPM extract RPM data rpm_format(data) else if data type = MPG extract MPG data mpg_format(data) return

main

do forever

if rx_state = ACCEPT

extract_data

rx_state = SYNC

Page 51: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Vehicle Diagnostic Interface

interrupt timer

wakeup = 1

return

tx_wakeup

send wakeup control block

return

main

do forever

if wakeup = 1

tx_wakeup

wakeup = 0

Page 52: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

RPM Data Formatting

RPM integer data

Formatted RPM text

Integer to textconversion

Text formatting

Text RPM value

Page 53: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

MPG Data FormattingMPG integer data

Text formatting

Integer to floatingpoint conversion

Floating point totext conversion

Text MPG value

Formatted MPG text

Floating point MPG value

Page 54: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Display ProcessingFormatted RPM text Formatted MPG text

Display imagegeneration

Mirrored display image

Mirror image

RPM placement MPG placement

MPG imagegeneration

RPM imagegeneration

RPM image MPG image

Placed MPGPlaced RPM

Display image

Page 55: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Display Control Interface

Mirrored display image

Serial display control

Image tocommandconversion

Command send

Display command

Page 56: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Test Plan

1. Test functionality of every module

2. Test functionality of every module interaction

3. Test functionality of the final system

Page 57: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Implementation

This is when you actually write your code.

Page 58: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Module Testing

• Simple implementations to test a single module or module interaction

• Total testing code will often be larger than the actual system’s code base

• Is this good or bad?

Page 59: Embedded Software Design Peter R. Wihl (former Guest Lecturer)

Design Verification Testing

• A scripted test plan that guides a tester through use of the system

• A table with the following:– Every system requirement– Whether or not the requirement was met