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FEBRUARY 2016VOLUME 14
embedded-computing.com
#1
SiliconBuild an intelligent irrigation system How-to guide on page 9
PLUS
Must-sees at Embedded World PG. 30
WHAT DEVELOPERS NEED TO KNOW ABOUT CONNECTING
TO THE CLOUDSTARTS ON PAGE 22
What I want to see at Embedded World 2016By Rory Dear, Technical Contributor [email protected]
“IoT,” “M2M,” and “Industrie 4.0” are a few obvious examples of the plethora of buzzwords I’ve little doubt I will be visually assaulted with as I meander around Nuremberg Messe’s Embedded World 2016, the same as I was last year, and the year before that. These tech-nologies generally fit into the category of “connected” or “connected devices.”
For me, Embedded World 2014 was when these connected-device terminol-ogies really caught the imagination of exhibitors. Of course, as is the case with so many desperate to climb aboard the latest bandwagon, what they actually exhibited was often of the loosest rel-evance to the buzzwords emblazoned across their stands. Through inter-viewing, many conceded they simply had to publicly pay homage, and the substance would definitely come later. To be fair, many exhibitors had had time to ponder their “connected” strate-gies and were able to demonstrate which directions their connected solu-tions would take and speculate which applications they would end up in. I witnessed excitement, enthusiasm, and plans formulating, but that previous verb “speculate” is what defined the event for me: speculation.
I entered Embedded World 2015 last year in trepidation, though I was pleas-antly surprised to see so many exhibi-tors had responded to my (and no doubt countless others’) despondency in the lack of real substance to their connected visions. I witnessed a smart
lighting example as "intelligent street lighting;" I observed a connected logis-tics solution for public transport; I even saw a demonstration of an IoT stair lift for the elderly; and whilst appearing initially farcical its value quickly became apparent to me. What the exhibition lacked, predominantly through lack of elapsed time since the previous event, was sufficient real-world usage exam-ples to really drive home the benefits of what our industry is trying to achieve for “yet to convince” onlookers.
If you haven’t guessed it yet, what I want to see at Embedded World 2016 is proof. I want to see, read, and hear about com-pleted projects, finished deployments where statistics following smart con-nectivity prove to the world its value. I want to see case studies, with indisput-able statistics and feedback from those well outside of our industry of the ben-efits they value, and from those with no vested interest – or even better no interest at all in fact – what the tech-nology actually is at its core. This for me is what takes the connected devices movement beyond clever marketing fodder and presents a palpable benefit to people’s lives.
Earlier this year I personally reviewed XeThru’s respiration detection evalua-tion kit on my (then) 2-month-old baby son before its official release. It promised a revolution in remote baby monitoring and the elderly (typically monitored far more remotely) alongside potential applications in point of sale. He’s now
a year old and having used the kit I’m desperate to see where this technology drove their clients and understand exactly where and how such sensors are being used today. I mention this (at its core) “unconnected” example as this revolution can be revolutionized itself by combining it with increased connectivity. Maternity wards or nursing homes can, for the first time, have centralized health and wellbeing monitoring without intru-sive surveillance cameras.
Perceptual computing is an emerging area that I covered recently that prom-ises a new way to interact with machines in an immersive, seamless fashion. We’ve also seen advances this year in artificial intelligence (AI). Both technologies offer the opportunity for a fresh wave of innovation on show at Embedded World 2016, though I’m hoping for more than pure speculation.
Quite how these technologies will com-bine in a decade’s time is potentially a scary thought; the complexity of secu-rity in such devices is already a huge challenge, and vulnerabilities in what we’d consider “safe” devices seem to be regularly revealed. The fear of relin-quishing control, be that to a malicious “hacker” or a rogue artificial brain, I’m not sure which is the bigger threat. Our experience of AI for most of us now is restricted to trying to confuse online bots – just how comfortable will we feel once we concede or believe AI has the upper intellectual hand on ourselves, I don’t know.
TRACKING TRENDS
2 Embedded Computing Design | February 2016
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Silicon
9 Build an intelligent irrigation system using Microchip Curiosity, part 1By Brandon Lewis, Technology Editor
12 IoT continues momentum as new integration in MCUs emerges
By Curt Schwaderer, Editorial Director
14 The expansion of a semiconductor contraction
By Ray Zinn, Former Micrel CEO
Software
16 Hardware emulation to debug embedded system software
By Dr. Lauro Rizzatti
19 Formal verification going mainstream for SoC block verification
By David Kelf, OneSpin Solutions
Strategies
22 Maximizing cloud value with strategy before connectivity
By Catherine Ter Horst, Dedicated Computing
25 Evaluating Bluetooth Smart – What IoT developers need to know about getting connected
By Mark Bowyer, Anaren
28 Embedded device security for the IoT
By Mike Rohrmoser, Digi International
Web Extras
Annual Reader Survey: What are your preferences? The results are in.
By Rich Nass, Embedded Brand Director opsy.st/ReaderSurvey15
Build versus buy when it comes to IoT By Adebayo Onigbanjo, Zebra Technologies
opsy.st/BuildvsBuyIoT
Floored: CES 2016 recap By Brandon Lewis, Technology Editor
opsy.st/CES2016recap
IoT Design Weekly Newsletter Subscribe at opsy.st/IoTDesignENLsubscribe
DOWNLOAD THE APPDownload the Embedded Computing Design app:iTunes: itun.es/iS67MQMagzter: opsy.st/ecd-magzter
Departments
2 Tracking Trends
Rory Dear, Technical Contributor
What I want to see at Embedded World 2016
7 IoT Insider
Brandon Lewis, Technology Editor
An IoT development kit comparison
38 Editor's Choice
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FEBRUARY 2016VOLUME 14
embedded-computing.com |@embedded_comp | opsy.st/ECDLinkedIn
#1
4 Embedded Computing Design | February 2016
9
FEBRUARY 2016VOLUME 14
embedded-computing.com |@embedded_comp | opsy.st/ECDLinkedIn
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13 COMMELL Systems Corporation – Leading provider of SBCs
40 Dell – Dell Internet of Things Contest – Connect what matters
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17 Gigabyte – IoT cloud/embedded solutions – We are exactly what you need
21 Micro Digital, Inc. – SMX RTOS is IoT ready
3 WinSystems, Inc. – Accelerate your product development cycle
Embedded World Profiles Category31 Acnodes Corporation Industrial
31 ADL Embedded Solutions Inc. Hardware
30 Anaren IoT
34-35 Connect Tech, Inc. (CTI) Hardware
32 Digi International Hardware
32 Dolphin Interconnect Solutions Inc. Networking
33 MicroMax Computer Intelligence Hardware
33 Quantum Leaps Operating Systems & Tools
36 VersaLogic Corp. Hardware
37 WinSystems, Inc. Hardware
6 Embedded Computing Design | February 2016
IoT INSIDER
An IoT development kit comparisonBy Brandon Lewis, Technology Editor [email protected]
Over the past couple of years, I have routinely hinted at the rise of development kits, the Internet of Things (IoT), and how the two go hand in hand. It’s a serendipitous relationship that facilitates quick development and prototyping in a large, fast-growing market – not to mention that an increasing number of kits can be had on the cheap. Furthermore, where early dev boards offered a basic processing unit, some assortment of I/O, limited memory, and the expectation that engineers would navi-gate the web for open-source software and tools, today’s often provide connectivity, cloud access, and ship with low-cost or no-cost development environments and debuggers for a truly out-of-the-box experience.
While Arduino, BeagleBoard, and Raspberry Pi still dominate the space, data from Embedded Computing Design’s 2015 Reader Study shows that more than 38 percent of engineers planning to adopt a development kit in their next design will use one from a specific manufacturer. With that in mind – and after returning from the Consumer Electronics Show where dev kits were at the heart of countless demos – I decided to start compiling a list of IoT-centric kits available on the market today. Though apples-to-apples comparisons are difficult because each manufacturer’s kit emphasizes dif-ferent features based on their silicon and tools, I was able identify seven categories of interest to IoT developers that are common across most kits. Represented in Table 1 (next page), these are Wireless, Compute, Memory, I/O & Peripherals, Tools, Cloud, and Cost:
õ Wireless is essential to classification as an “IoT dev kit,” and as such includes information about on-board connectivity like Bluetooth, Wi-Fi, 6LoWPAN, etc.;
õ Compute attempts to isolate a board’s general-purpose/applications processor (or core in the case of systems-on-chip (SoCs))
õ Memory can include on-chip RAM or ROM as well as any additional storage provided on the board
õ I/O & Peripherals is defined loosely as physical access to any onboard resources for the purposes of low-level programming (expansion headers are assumed)
õ Tools highlights software made accessible to developers with the purchase of a particular kit
õ The Cloud section outlines compatibility with various backend services, either exclusive to the manufacturer or available through partnerships
õ Cost is the final measure, which is subject to change
õ Sensors are not included since many dev kit ecosystems rely on third-party or add-on sensors
The initial comparison includes five kits from Anaren, Atmel, Imagination Technologies, Marvell Semiconductor, and Texas Instrument, although the list will certainly grow as the price of electronic components drops and manufacturers look to elimi-nate barriers to entry. Over time, I hope this proves a valuable resource for the next generation of IoT app developers.
With that, I leave the evaluation to you.
Clockwise from top left:
• Anaren Bluetooth Smart Development Kit (A20737A-MSDK1)
• Atmel SAM W25 Xplained Pro Evaluation Kit
• Imagination Technologies Creator Ci40 IoT Kit
• Texas Instruments SimpleLink Wi-Fi CC3200 LaunchPad development kit
• Marvell Semiconductor EZ-Connect MW302 IoT Starter Kit
www.embedded-computing.com 7
Compute Memory I/O & Peripherals Wireless Tools Cloud Cost
Anaren A20737A-MSDK1¹
ARM Cortex-M3
• 320 KB ROM• 64 KB EEPROM
• ADC• I2C• UART• SPI• PWM • GPIO• I2S audio
• Bluetooth 4.1
• Anaren Atmosphere
• Anaren Strato- sphere (TBA)
$30-$35
Atmel SAM W25 Xplained Pro²
48 MHz ARM Cortex-M0+ MCU
• 8 MB Serial Flash
• Atmel Data Gateway Interface • GPIO• I2C• UART• USB• SPI• Virtual COM
• 802.11 b/g/n Wi-Fi
• Atmel Studio• Embedded Debugger
• Arrayent• Exosite• Proximetry• PubNub• wot.io• Zatar
$42.65
Imagination Creator Ci40³
550 MHz dual-core, dual-threaded MIPS32 InterAptiv CPU
• 256 MB DDR3 SDRAM• 512 MB NAND Flash
• ADC• EJTAG• GPIO• I2C• mikroBUS• PWM• Raspberry Pi B+• SPI• UART
• 2x2 802.11 b/g/n/ac Wi-Fi• 802.15.4 (6LoWPAN)• Bluetooth 4.1
• FlowCloud SDK
• FlowCloud $52
Marvell EZ-Connect MW302⁴
200 MHz Cortex-M4F MCU
• 512 KB SRAM• External QSPI Flash
• ADC• DAC• GPIO• I2C• I2S• JTAG• PWM• SPI• UART• USB 2.0
• 1x1 802.11 b/g/n Wi-Fi
• Marvell AWS IoT Starter SDK• Eclipse• ARM GNU Compiler/ Debugger • OpenOCD
• AWS IoT• Arrayent• Ayla• Evrythng• Xively
$49
Texas Instruments Simple-Link Wi-Fi CC3200 LaunchPad⁵
80 MHz ARM Cortex-M4 MCU
• 256 KB RAM• External SPI Flash• ROM Bootl- oader• 32-chan- nel µDMA
• ADC• I2C• I2S• Parallel Camera• PWM• SDMMC• SPI• UART
• 802.11 b/g/n Wi-Fi
• Code Composer Studio• GNU Com- piler/De bugger• OpenOCD• IAR Embed- ded Work- bench
• AWS IoT• Arrayent• Exosite• IBM IoT Cloud• Xively
$29.99
Notes:1. Anaren Atmosphere enables simultaneous embedded code generation and app creation in online development tool2. Current measurement header allows real-time monitoring of the low-power SAM W25 Wi-Fi module with ammeter3. Supported distributions include OpenWrt, Debian, and Google’s Brillo operating system4. Hardware root-of-trust enables secure boot for trusted storage and communications5. Embedded Wi-Fi security and TCP/IP stack includes protocols such as mDNS, DNS, HTTP, and example code for XMPP and SMTP
IoT INSIDER
8 Embedded Computing Design | February 2016
Build an intelligent irrigation system using Microchip Curiosity, part 1By Brandon Lewis, Technology Editor
Goal: The following is the first in a multi-part series describing how to build an intelligent irrigation system using the Microchip Curiosity Development Board and associated tools as a foun-dation. Building off of our introduc-tion to the Curiosity board, MPLAB X Integrated Development Environment (IDE), and MPLAB Code Configurator (MCC), part 1 of the series details how to generate two pulse-width modulated
waveforms and process them through a configurable logic cell (CLC) to create a heartbeat LED that will indicate when watering is needed based on the voltage output received by a comparator from a Grove moisture sensor. Developing the logic for this portion of the application requires no coding when using a CLC and MCC.
Difficulty level: Beginner
Hardware/Software required:
õ Microchip Curiosity Development Board (Outfitted with PIC16(L)F161X MCUs – Used here is the PIC16F1619)
õ Grove Moisture Sensor – Available from Seeed Studio
õ Microchip MPLAB X IDE version 3.05 or later
õ MPLAB XC Compiler
õ MPLAB Code Configurator version 2.25 plugin
Creating a breathing LEDThe first step of our project is to create a breathing LED. Typically this is achieved using a software algorithm that includes loops to slowly increase and decrease the duty cycle of the LED. To achieve this without writing any code, however, we’re going to use two pulse-width modula-tors (PWMs) with the same pulse width but slightly offset timer periods and fre-quencies. The duty cycle for each PWM will be set to 50 percent, but one PWM (PWM3) clock cycle will be set to 31 ms while the other (PWM4) is set to 32 ms so that the signals driving the LED (LED
D7) pass each other in time, resulting in a transition that cre-ates a “breathing” effect. The con-figurable logic cell (CLC) peripheral integrated into Curiosity’s onboard PIC16F1619 microcontroller handles the “AND-OR” function required for this operation.
Integrated MCUs
www.embedded-computing.com 9
Setting up PWM periods and frequenciesTo get started, create a New Project in the MPLAB X IDE and launch the MPLAB Code Configurator and name it “Curiosity_WaterSensor (for detailed instructions on how to do this, as well as enabling Low-Voltage Programming [IMPORTANT!], read the previous tutorial. Once you have created a new project, select both avail-able PWMs (PWM3 and PWM4) from the Device Resources window by double clicking them.
Adding a PWM will automatically include an 8-bit timer (TMR2) in your project, to which both PWM3 and PWM4 will default as their time base. However, to generate a breathing LED we’ll need two separate time bases, and an additional timer is needed. You can easily add one to your project by clicking PWM4 (now in your Project Resources window) and selecting Timer4 from the “Select a timer:” dropdown menu in the MPLAB Code Configurator window. TMR4 (also an 8-bit timer) should now be added to your project.
At this point you need to configure the PWMs to generate two waveforms at dif-ferent frequencies. The timers governing the PWMs are based on the system clock source; so in order to slow down the rate of the system clock oscillator for our breathing LED, navigate to the System window under Project Resources and make sure that the System Clock Select is set to the frequency of the oscillator (FOSC). In the same window set the Internal Clock frequency to 31KHz_LF, a rate slow enough for our application.
Now that you’ve configured the system clock, it’s time to set up the timers. Back in the Project Resources window, select the TMR2 timer and change the Clock Source to FOSC/4 in the MPLAB Code Configurator window (as its name suggests, selecting a FOSC/4 clock is going to provide a clock source that is one-fourth the frequency of the System Clock). You’re also going to want to set the Prescaler to a 1:2 ratio in order to get a more precise Timer Period (for an explanation of Prescaler and Postscaler, see the “PWM control” section of the
Curiosity introduction article). In the Timer Period box you will now enter a value of “31.0 ms” and hit enter. This hasn’t been an incredibly scientific exer-cise, but the system should return a value very close to 31 ms (30.968 ms in my case).
In the Project Resources window navigate to TMR4 and perform these exact steps, but set the Timer Period to “32.0 ms.” By navigating to either PWM3 or PWM4 and ensuring they are configured to different timers, you’ll note that each has a slightly different PWM Period and Frequency.
Using configurable logic cells to circumvent codingIn order to create a breathing LED the two PWM outputs will need to be com-bined using “AND-OR” logic and driven to the same microcontroller pin. As men-tioned, AND-OR functions are typically performed in software, but by using CLC peripherals you can achieve this without having to write any code.
Under Device Resources, add a CLC resource to your project by double-clicking “CLC1,” then select it in the Project Resources menu. In the MCC window a graphical representation of logic gates will appear that allows you to select the input/output of various resources and apply combinational or sequential logic to them. To drive the two PWM outputs to generate the breathing LED you’re going to select the “AND-OR” combinational logic setting from the menu at the top of the graphical representation, and then select “PWM3_OUT” and “PWM4_OUT” from the first two dropdowns on the left-hand side of the graphic, respectively. Now, trace the signal from the PWM3 output to its cor-responding input on “GATE 1” and open the connection by clicking the overlaying X once until you have a solid line. Do the same for the PWM4 output on “GATE 2” (the solid black dots represent the signal trace to each gate, so you should have selected the first input on GATE 1 and the second input on GATE 2).
You’ve just established some simple logic. If a 1 (or “on high”) registers on
both of the PWM inputs, the output of the CLC will register as a 1, running the LED high. Conversely, if a 0 registers on either or both of the outputs, the com-bined output will be a zero (for some basic background on logic gates, check out Wikipedia). The overlapping PWM periods created earlier produce alter-nating intervals of 1 and 0, which pro-vides the breathing effect.
All that’s left to do for the breathing LED is connect our CLC to the pins driving our LEDs. Open up the MCC Pin Manager, and locate CLC1OUT from the available modules in the table on the left and connect it to the RC5 pin that drives LED D7 by closing the lock in the corresponding grid cell (once you click the blue open lock, it will close and turn green). Select “yes” when you are prompted to change the pin allocation. Now click “Generate Code” from the top left of the MCC window, and select “yes” when asked if you’d like to gen-erate a main.c file. From the top naviga-tion select “Make and Program Device Main Project” from the menu next to the downward-facing arrow. LED D7 should now be “breathing.”
Setting up a comparator and incorporating the moisture sensorBecause this is an irrigation system, we of course need to incorporate a moisture sensor into our project. This project uses a Grove Moisture Sensor from Seeed Studio, though any basic moisture sensor with an analog output should do. What allows the use of such a basic sensor in a smart irrigation system, however, is that by leveraging the intelligent analog peripherals on the PIC16F1619 microcontroller you are able to instruct a comparator (a device that compares two analog voltage inputs then outputs a dig-ital signal) to trip at different values depending on the time of day, time of year, the type of plant being watered, etc. For this project, the comparator inputs will be a multiple of the fixed voltage reference (FVR) of 1.024 V (C1IN+) and the voltage obtained from the pin tied to the moisture sensor (C1IN1-). The comparator output
SILICOn Integrated MCUs
10 Embedded Computing Design | February 2016
will be a “1” if the C1IN1- voltage is greater than the C1IN+ value, and oth-erwise, will be a “0.”
To add a comparator to the project, select it from the Device Resources window and double-click CMP1. Programming options will now appear for the comparator in the MCC window, and you’ll want to ensure that the Negative Input is set to “C1IN1-” and the Positive Input is set to “FVR_pin.” Additionally, click the “Enable Low Power” check box because this applica-tion doesn’t require high-performance
interfacing with the microcontroller, and you’ll want to be as energy efficient as possible since the eventual power source will be four AA batteries.
You’ll notice that when you selected the FVR_pin as your Positive Input refer-ence, an FVR was added to your Project Resources. To configure the FVR, select it from the Project Resources menu, and in the MCC window change the “FVR sent to Comparators, DAC and CPS” to 2x to give us an FVR of 2.048 V (since we’re just installing the moisture sensor to make sure everything is working
properly at this point, a 2.048 V FVR provides a more median value on the system’s 5 V range for indicating the presence or lack of moisture).
Now, in the MCC Pin Manager, con-nect CMP1 to a pin by locating the lock that corresponds with C1IN1- and the RC1 port, and clicking so the lock icon closes and is encircled by a green box.
Tying the breathing LED to the comparator outputWith the goal in mind of having the breathing LED report when a plant needs water, you now need to create a condition that combines the outputs of the first CLC and the comparator and runs them through a second CLC. To do so, add CLC2 to your project by selecting it from the Device Resources menu, then highlight it once it’s been added to your Project Resources. In the graphical representation that appears in the MCC window, again make sure that the AND-OR logic setting is selected, and choose the “LC1_out” signal from the first dropdown on the left to include CLC1 and “C1OUT” from the second dropdown for CMP1. Again, trace the LC1_out signal to the corre-sponding input on GATE 1 and click the X until you have a solid line, and do the same for the C1OUT on GATE 2 (if you want the breathing LED to report when the sensor is in the water, you’ll need to invert the comparator output; to do so, click the corresponding trace signal until a circle appears where there was originally an X (Figure 1)). In the MCC pin manager, you can now connect the CLC2OUT to port RA2. Click Generate Code, then Make and Program Device.
At this point, all that’s left to do is wire the Grove – Moisture Sensor to your Curiosity board. Connect the sensor’s black wire to the ground (GND) pin to ensure that both the board and sensor are using the same baseline, and run the yellow wire to the RC1 pin, which we selected as the Comparator 1 input (both of these pins are located on the J11 expansion header). On the J3 expansion header, run the red wire to the Vdd port to power the sensor.
Curiosity’s LED D6 is now also breathing. Fill a cup of water and dip the end of the sensor in. When it’s wet, LED D6 will turn off (Figure 2).
If you want Curiosity’s LED to breathe when the sensor is in the water, you have to invert the comparator input on logic GATE 2. To do so, trace the signal for CMP1 and click the X until a hollow circle appears. To have the LED report when the sensor is dry, just click the X until a solid line appears.
Figure 1
Once the sensor is properly wired to Curiosity, dip it in a glass of water. When dry, LED D6 will respond by breathing; when the sensor’s wet, LED D6 will be off.Figure 2
www.embedded-computing.com 11
IoT continues momentum as new integration in MCUs emergesBy Curt Schwaderer, Editorial Director [email protected]
Wireless connectivity is a big driver in the world of IoT. Combining wireless protocols with compute power,
power management, and sensor technologies has opened the door to a wide variety of IoT applications. In
this feature, we’ll look at how Redpine Signals leveraged their expertise in wireless technology to create
integrated MCUs for the IoT market.
In many ways the Internet of Things (IoT) represents the conver-gence of the increased usefulness of information from network embedded systems within a variety of industries with the cost economics of the mobile phone industry whose economy of scale drives down costs of components and technologies. The result is IoT: Internet-connected devices collecting information that, when deployed on a large scale, collected, and analyzed, can change the way the world lives, learns, works, and plays.
Venkat Mattela, Chairman and Chief Executive Officer at Redpine Signals (www.redpinesignals.com) describes IoT as “an inch-deep, mile-wide” market.
“When you look at the IoT space, it spans virtually every market in existence – medical, industrial, consumer, automotive, building automation, and smart energy among others,” Mattela says. “All these markets have vastly different characteristics and use cases, but there are a few common underlying themes – compute, power management, and wireless connectivity. That’s why we decided to leverage our core expertise in wireless pro-tocols and integrate this within an MCU architecture.”
Redpine was originally going after the mobile phone market with a convergence IC. They started with wireless, incorpo-rating dual-band 802.11 Wi-Fi with a/b/g/n variants. Bluetooth EDR and LE have also become important wireless device tech-nologies. ZigBee is a third that has been gaining critical mass.
Mattela views the IoT market as starting in 2008. Redpine recognized they needed an effective low-power CPU core
architecture to blend with their wireless capabilities as an IoT System on Chip (SoC). They decided to use the Cortex-M4 for the compute core in order to leverage the right mix of com-pute performance and power efficiency. The result is called the WiSeMCU (Wireless Secure MCU) product line. The WiSeMCU is based on their own silicon and certified modules. The result is the ability for IoT developers to leverage a mix of modules on a single MCU to put together their device quickly and easily with optimized cost.
Mattela also mentioned another aspect of the IoT “inch-deep, mile-wide” attribute is there are millions of customers, but each only consumes modules in the 10s, 100s, or 1,000s of units as opposed to consuming millions of specific SoC silicon like the smartphone market.
This represents unique challenges to module developers to identify a common-denominator set of capabilities and pro-vide a fixed range of capabilities that address the majority of these customers.
“We have about 4,000 customers today spread across lots of markets and applications versus one or a few customers pur-chasing millions of devices,” Mattela says. “This is a very big challenge if you don’t understand how to sustain an inch-deep, mile-wide paradigm.”
Redpine has identified three main variants – the RS10001 Wireless MCU single band module with multi-protocol capability and Cortex-M4 processor. The M4 runs at 100 MHz
Integrated MCUs
12 Embedded Computing Design | February 2016
with 512 KB of flash and 104 KB of SRAM. It is also the smallest module of its kind at 8.6 mm x 8.6 mm x 1.7 mm. The part fea-tures integrated Wi-Fi, Bluetooth 4.0, and ZigBee.
Mattela mentioned that people also wanted a drop-in replace-ment for their popular RS9113 module. Thus the RS10002 was born – same capabilities and specs as the RS10001, but in a foot-print compatible with existing RS9113 connectivity modules.
For larger IoT applications, the RS10003 provides a 160 MHz Cortex-M4 processor with up to 1 MB of flash and 128 KB of SRAM plus dual-band Wi-Fi, Bluetooth, and ZigBee protocol support.
Figure 1 shows the RS10002 block diagram. There are a number of available peripherals for the device that provides a robust set of features for peripherals for a variety of IoT applications. The Cortex-M4 and peripherals combine with the four integrated types of wireless connectivity protocols for a unique one-chip IoT solution that can address inch-deep, mile-wide markets.
Another interesting feature relevant to IoT is the “Security Accelerator” block. This enables a binding of silicon and software that provides an added measure of protection. Redpine calls this “physically unclonable functions” (PUFs). Every chip has an integrated signature that can be used for software verification to prevent malicious mal-ware updating or illegal software down unlicensed systems.
Of course IoT support isn’t complete without some kind of software devel-opment kit (SDK) and development board to prototype device features and capabilities. There is a develop-ment board available for this purpose along with an SDK including a wireless applications library with example proj-ects using Wi-Fi, Bluetooth, and ZigBee (Figure 2). Demonstration applications
make it easy to bring up prototype environments and there are tool chains and integrated development environments (IDEs) from CoIDE, Keil, and IAR available.
Mattela finished with an illustration of how their WyzBee plat-form and product synthesis concept is so important.
“Redpine has gone through many projects where customers historically took up to 18 months to develop and integrate, only to give them a 10,000 unit order,” Mattela says.
“We asked ourselves why it was taking so long?”
It turned out to be the product synthesis. When customers were pulling in the Cortex-M4 and sensors, and then had to deal with the wireless on-ramp connectivity to the Internet to get the data to the cloud, it became very time consuming and challenging where some companies had to grow core compe-tencies from scratch. Then when integration issues occurred, there were delays.
Redpine decided to create the integrated WyzBee IoT Device Maker Platform with a goal of being able to create the proto-type with a push-button.
“The WyzBee platform shrinks prototype execution to a couple days as opposed to months,” Mattela says. “Customers can now choose the right products from a library, then push a button and produce the prototype quickly including creating a cloud instance. In addition, the single-source-solution elimi-nates integration delays. The WiSeMCU is a one-stop-shop for an IoT processor.”
IoT is giving rise to innovative integration from unlikely sources. New integrated environments that target IoT applications and shrink development time for this “inch-deep, mile-wide” market promises to advance concepts quickly and enable more innovative applications of IoT for all industries.
www.embedded-computing.com 13
A software development kit (SDK) and development board are available for prototyping.Figure 2
The Redpine RS10002 block diagram.Figure 1
The expansion of a semiconductor contractionBy Ray Zinn
The semiconductor industry is consolidating as it is expanding. This
seemingly contradictory situation has an origin, but no end in sight.
I’ve seen this before, having founded Micrel 37 years ago and having been in the semiconductor industry for 50 years. At Micrel, we rode out many cycles, survived the dot-com imposition (our only unprofitable year), and have seen fabrications facilities (fabs) grow from a handful, mainly in Silicon Valley, to more than a thousand scattered around the world. Semiconductors went from specialized chips used primarily by the military to consumer goods to ever more powerful (yet shrinking) IT servers to putting a wireless computer into nearly every pocket.
The industry is currently contracting because it grew rapidly, with demand for chips growing, with new device types arriving weekly. But with industry standards driving specialized chips to the margins, the semiconductor
industry grows in spurts. It has to endure relatively sudden changes in direction. Micrel rode the consumer products chip wave for a while, and saw many competitors disappear due to seemingly minor mistakes and sudden market changes.
In short, for every growth spurt in the industry – whether due to chasing a market or a market segment, or innova-tions that become commoditized – the number of semi companies and fabs grows. Then when markets change, some companies suffer revenue hits and have to sell out. Others plateau and shareholders force a sale. Others simply die. Thus the number of semi compa-nies shrinks.
This current contraction is just another cycle, though amplified by recent growth history.
Two factors – industry standards for products and shrinking silicon geom-etries – caused demand to skyrocket and margins to shrink. In high growth periods, especially ones with new mar-kets, more companies come online to fulfill demand. Once industry standards and competition increases to a fever pitch, margins fall and consolidation begins. It seems impossible that con-solidation is starting in this era when the consumer electronics markets – from iPhones to Nests to FitBits – are exploding. But the trend will not abate for now. Capacity is larger than even
consumers and recovering economies can absorb.
Combine this natural boom/bust cycle with a global economy that has been growing very slowly over the past six years. Since so much of the semicon-ductor industry is now based on con-sumer products, and with the economy ailing, growth for all these semicon-ductor companies has been poor despite larger markets – the pie is being divided into very thin slices. To meet the demands of institutional and activist investors, some companies are forced to grow via acquisition, driving consolidation even faster. Between the normal cycle, massive overbuild, and economic amplifications, we have a per-fect storm for industry consolidation.
Two other reasons, horribly combined, are making the current round of consoli-dation extreme. These are cheap money and inorganic growth.
Interest rates have been held artifi-cially low for years in an effort to sta-bilize world economies. Borrowing money effectively costs nothing today. Companies interested in buying other companies have to either have a lot of treasury shares (stock they kept for themselves and not sold on the open market) to trade for shares in the acquired company, or they need a lot of cash. Normally, an acquiring com-pany would not borrow money for M&A activities because the cost to borrow
Mergers & Acquisitions
14 Embedded Computing Design | February 2016
hundreds of millions of dollars or more would be ruinous. But today it is quite feasible. Cheap money paired with treasury shares can make acquisitions financially painless.
The question then is, “Why?” Solid bottom line growth comes from growing organically. But many semi-conductor companies have not expe-rienced reasonable revenue growth despite the largest and fastest growing demand in human history. Be it execu-tive inability to navigate markets, engi-neering inability to conceive of new and viable products, or just plain bad luck, many semiconductor companies are not growing and their shareholders are not happy.
This causes some CEOs of semicon-ductor companies to launch M&A sprees, most with the same tragic results. Years ago, a CEO I knew headed a major semiconductor com-pany. He decided he needed to get his company’s top-line revenues up to one billion dollars. Yet the industries in which his company worked were not going to grow at the pace he desired results, and he was unwilling to take the time to build the teams, technology, and market strength to grow. Instead, he launched an M&A campaign with artificial deadlines for gaining top-line revenues. This led to sloppy merging of the acquired companies, frustrated employees, falling product quality, cha-otic customer support, and more. In the end the CEO never achieved his billion-dollar dream, and was sacked when the weight of the acquisitions destabilized the company.
This time around, it may be worse.
Sad as the corporate failures from irra-tional consolidation may be, the human toll is worse still. Real people lose their jobs when companies merge. This means real families with real hopes and dreams are cast aside. They don’t take vacations, never fund their children’s college fund, and even lose their homes. Messianic CEOs don’t much care. Nor do activist investors, or even shareholders. I see this daily as people I know and meet in the industry no longer ask about the industry, but ask me if I know where they can find a job.
The changes coming won’t stay dismal forever. Through this consoli-dation you will see greater divisions between design and fabrication (Micrel had the last Silicon Valley silicon plant – so expect all manu-facturing to go elsewhere). Those fabs will have the mission of scale to serve a few billion consumers and the nascent Internet of Things (IoT) mar-kets. Design will become uniquely divorced from fabrication, splitting the market risk. Design firms will survive best by innovation, and fabs through ruthless efficiency.
The question is now, “What comes next?” There will inevitably be new markets and devices that will drive a new growth spurt. The IoT is the sleeping giant, but I doubt the only one snoozing.
Raymond D. “Ray” Zinn is an inventor, entrepreneur, and the longest serving CEO of a publicly traded company in Silicon Valley. He is best known for creating and selling the first wafer stepper (an industry standard piece of semiconductor manufacturing equipment), and for co-founding semiconductor company Micrel (acquired by Microchip in 2015), which provided essential components for smartphones, consumer electronics, and enterprise networks. He served as Chief Executive Officer, Chairman of the Board of Directors, and President from Micrel’s inception in 1978 until his retirement in August 2015. Zinn’s philosophy on people, servant leadership, humanistic management, and the ethics of corporate culture are credited with Micrel’s nearly unbroken profitability. Zinn also holds over 20 patents for semiconductor design. A proud great-grandfather, he is actively retired and mentoring entrepreneurs. His new book, Tough Things First (McGraw Hill), is available at ToughThingsFirst.com, Amazon and other fine booksellers.
Ray Zinn ToughThingsFirst.com @Ray_Zinn_ www.linkedin.com/in/rayzinn
www.embedded-computing.com 15
Hardware emulation to debug embedded system softwareBy Dr. Lauro Rizzatti
In today’s competitive landscape, getting complex electronic devices rich in embedded software to market
faster while making them cheaper and more reliable is a very risky proposition.
Not thoroughly testing hardware designs inexorably lead to respins, increasing design costs and length-ening delivery of the netlist to the layout process, and ultimately delaying the time-to-market target with devas-tating effects on the revenue stream. Even more dramatic outcomes of missing market windows hide in late testing of embedded software.
It’s no surprise that the verification por-tion of the project cycle takes a dis-proportionately large amount of the schedule. That’s because tracking and eliminating bugs is no small feat, espe-cially when the software content of a system on chip (SoC) is growing at a rate of approximately 200 percent per year. By contrast, the growth of the hardware portion of the design is only about 50 percent.
Hardware emulation as the foundation of system verificationWhile virtual prototyping and field-pro-grammable gate array (FPGA) proto-typing have gained attention for early embedded software testing, they cannot help with the integration of software and hardware. The former lacks the hardware accuracy required for tracking hardware bugs. The latter provides limited hard-ware debugging capabilities necessary to quickly zoom in on a bug.
Test, Verification, and Analysis Tools
16 Embedded Computing Design | February 2016
As a result, development teams and project managers have turned to hardware emulation as the foundation for their veri-fication strategy. Emulation is a versatile verification tool with many associated benefits, including hardware/software co-ver-ification, or the ability to test the integration of hardware and software. Software developers have taken notice because it is the only verification tool able to ensure that the embedded system software works properly with the underling hardware. It’s noteworthy, as well, for hardware engineers working to debug a complex SoC design since it can trace a software bug into the hardware or a hardware bug within the software’s behavior. Other benefits include its fast compilation capabilities, another plus for software verification, thorough design debugging and scalability to accommodate designs that encompass more than one billion application-specific integrated circuit (ASIC) gates. Additionally, it can process billions of verification cycles at high rates of speed mandatory to validate embedded software and perform system validation (Figure 1).
In the past, hardware debug and testing was the sole reason for the verification portion of the project cycle, something man-aged by logic simulation driven by hardware description lan-guage (HDL) testbenches. Traditional big-box emulation was employed solely for the largest designs. Formal verification has been adopted by many development teams to supplement simulation, increasing basic coverage and ensuring that corner cases aren’t missed. However, only hardware emulation can complete the entire verification task for SoC designs within a practical timeframe and alleviate the runtime problems associ-ated with event-based simulation.
It’s all about the software contentAn SoC’s software content makes co-verification an all-impor-tant part of the verification strategy because it confirms that the hardware and software parts of an embedded SoC are verified concurrently and interact correctly before commit-ting to silicon.
In the past, if there was a hardware problem once the design was taped out to silicon, the software developer had to work out how to code around it, if at all possible. By validating the software before the SoC is complete, the design team has the oppor-tunity to fix hardware issues before they’re set in silicon. As already stated, emulation checks to make sure the embedded soft-ware is running on the supporting hard-ware according to the specification.
Software debug had been done in the past using a variety of debug engines. With one per core, they took advantage of hardware features that provided visibility into and control over the inner workings of a processor. While some debug capabili-ties were offered, the ability to diagnose issues was limited by the kind of access that the processor provided. Moreover, because traditional software debug typi-cally happened on the actual system, soft-
ware developers were executing real code on real hardware at target system speeds. This allowed them to work quickly through large volumes of code to find the errant routine.
These traditional techniques broke down when debugging an SoC. Because there is no real hardware, the code cannot
www.embedded-computing.com 17
Hardware emulation can handle designs of more than one billion ASIC gates and process billions of verification cycles at high rates of speed, which makes it an ideal verification tool for embedded software.
Figure 1
be executed at true system speed. Supposedly, hardware can be simulated as the code is executed and all of the hardware visibility would be provided by the simulator. The problem is speed – it’s a slow way to debug code.
For example, if an SoC is designed to run programs over Linux, the software developer would have to complete the Linux boot with billions of clock cycles before the software can begin executing. The rough estimate is that it would take more than 28 years using typical simu-lation speeds of about 10 hertz (Hz) to complete a Linux boot.
Regardless of whether it’s hardware or software being debugged, traditional hardware and software debug tools don’t know anything about the other. With large and complex SoC designs, it’s inefficient for two types of debug to be done independently in an attempt to locate a problem.
Allowing the two to work together is the ideal scenario and this is where emulation saves the day. The SoC hardware is implemented in hardware, typically an FPGA or some other pro-grammable element, giving it a higher speed. With this setup, the Linux boot
can be finished in as quickly as 15 min-utes, depending on the actual speed being run. Hardware emulation pro-vides similar control and visibility to that of a hardware debugger with both breakpoints and waveforms.
Confirming an SoC design will work as intendedHardware emulation differentiates itself from other verification tools with its high performance – an increasingly important requirement driven by soft-ware requirements. It is able to confirm that an SoC design will work as planned and is suitable for handling complex designs that can be as large as one billion ASIC-equivalent gates and con-sume more than one trillion verification cycles per month. Even so, thorough and exhaustive functional verification using hardware emulation at this stage continues to be the most cost-effective and effective debugging approach available (Figure 2).
The introduction of transaction-level modeling (TLM) and availability of transactors can turn hardware emula-tion into a virtual platform test environ-ment for a range of vertical markets. A transactor, part of verification intel-lectual property (IP) portfolio, is a
high-level abstraction model of a periph-eral function or pro-tocol. Transactors, often provided as off-the-shelf IP, are available for a variety of different proto-cols. A typical catalog includes PCIe, USB, FireWire, Ethernet, Digital Video, RGB, HDMI, I2C, UART, and JTAG components.
Better verification for more complex systemsPreviously, hardware design was indepen-dent from the cre-ation of the software to be executed on
those chips. That’s no longer the case. As SoCs double in number of proces-sors and incorporate twice the software content with each product generation, concerns about software becomes a pri-ority for development teams and project managers. Now, an SoC isn’t complete until the development team has proven that the intended software works on the hardware platform.
An SoC is a full-fledged embedded system and needs hardware emulation to verify it works correctly. With hard-ware emulation, development teams can plan more strategically and imple-ment a debugging approach based on multiple abstraction levels. They can track concurrently a bug between the hardware and embedded software to identify where the problem lies. In the process, they are saving time in a cost-effective and efficient manner, dramati-cally reducing the risk of missing the market window.
Dr. Lauro Rizzatti is a verification consultant and industry expert on hardware emulation. Previously, Dr. Rizzatti held positions in management, product marketing, technical marketing, and engineering.
SoftwaRE Test, Verification and Analysis Tools
18 Embedded Computing Design | February 2016
Today’s SoC is loaded with peripherals and protocols that need to be fully verified. Hardware emulation uses transactors to fully test that these components work as intended.Figure 2
Formal verification going mainstream for SoC block verificationBy David Kelf
The use of formal verification technology as a mainstream technique for system-on-chip (SoC) designs is,
at last, becoming a recognized approach to combat the verification gap. A recent survey suggests that
formal assertion-based verification (ABV) is now used on 26 percent of chip design projects. However, the
promise of this alternative approach to classic simulation has taken many years to bear fruit, and still only
advanced verification environments incorporate it. Why is this and what can we learn from its use so far to
make it available to the SoC engineering community at large?
SoC block verification hitting a wallSince their inception, SoC devices have presented a verification nightmare to development teams. While the verification of a complete SoC is now a task best left to emulation and rapid pro-totyping systems, even the larger blocks on these devices have outgrown simulation-only environments.
The advent of emulation, ever-faster simulators, verification intellectual property (VIP) for key tests, and the Universal Verification Methodology (UVM) have all helped to miti-gate this. Still, the verification requirement exceeds available processing time in simulation-based environments.
Formal verification has helped to improve block verification through the use of automated “apps” that target specific needs, which otherwise require significant simulation effort.
Checking the correct operation of stan-dard communication protocols, ensuring key connections and register operation, analyzing correct startup sequences on
domain resets, and many other tasks are now handled by these solutions.
However, we have just begun to tap into the true power of formal verification. Many of its usage issues have been eliminated leaving us at the forefront of what may be an entirely new era in verification, as this tech-nology is deployed for hard-core verification.
Formal verification: If it’s so good, where is it today?First, a quick review of formal verification technology, why it has the potential to create this fundamental shift, and what is stopping it today.
Hardware simulation works by cycling a block of hardware description language (HDL) code through a serial sequence of meaningful states to demon-strate its operation. This state sequence is driven by input stimulus (an HDL description
Test, Verification, and Analysis Tools
www.embedded-computing.com 19
of a set of events on the input of the device) designed to explore the right states to identify operational issues.
This approach begs the question: If we know all the states a code block can get into and the inter-state transitions, then can’t we simply ask questions about the code operation to ensure it is cor-rect? This would avoid having to write many lines of stimulus to try and get the code block into the correct, information-bearing states. This is the approach used by formal verification tools.
This basic approach can be morphed into a number of useful applications. For example, if the questions to be asked can be created automatically based on an aspect of the design code and a verification scenario to be checked, then an automated app for a verification purpose can be created. This would not require the user to write the question. If the formal tool can demonstrate specific sequences of states (a state machine operation, for instance) with minimal input, then a design engineer can understand how his or her code might execute, revealing possible mistakes.
The real power of formal verification is exercised when engineers ask the ques-tions themselves. This requires the ques-tions, or properties, to be written using assertions and applied to the design in a process known as assertion-based verifi-cation or ABV.
Of course, this high-level description masks the issues with ABV, including the capacity and performance requirements of a tool that stores this much informa-tion are already being solved with the latest technologies.
Two issues remain as barriers for the widespread use of ABV:
1. The authoring of assertions, often using the SystemVerilog standard syntax, can be complex and difficult to visualize
2. The understanding of verification progress, or coverage, is difficult to comprehend and collate with that of other verification methods
Although improvements have been made in both of these areas, more is required to lower the learning curve, allowing the general proliferation of ABV.
ABV applicationThere are two common methods that ABV is applied during the verifi-cation process. The first is to check for specific, corner case style issues, usually of a nature that would otherwise require a significant effort to build a simulation testbench for the problem to be ana-lyzed. The second is the more general checking of a block, either in con-junction with simulation or standalone.
The first use model for formal verification is valu-able and can shave a rea-sonable percentage off the verification schedule. The second model has the potential to alter the characteristic verifica-tion process, saving sig-
nificant time and resource expenditure, while increasing the overall potential to discover every bug in the design. Already some industry segments are using ABV in this second mode exten-sively. These include automotive and aeronautical electronics where high quality and reliability is a factor.
In a combined simulation-formal veri-fication flow, as shown in Figure 1, it is common to use simulation for gen-eral operational analysis and to “get a feel” for the design’s behavior and performance. In addition, there are some functions where simulation is more appropriate, such as mathe-matical data processing or signal pro-cessing. However, formal verification is well suited to functions of a control or data transport variety like finite state machines, data communication, and protocol checks. In addition, ensuring certain kinds of verification scenarios, such as Safety Checks (e.g. can a cer-tain activity ever happen), is also a sweet spot for this technology. These code and scenario examples commonly require a high proportion of the verifi-cation resource.
SoftwaRE Test, Verification and Analysis Tools
20 Embedded Computing Design | February 2016
A combined simulation and formal verification flow would include simulation for analysis and an impression of how the design will behave and perform.Figure 1
Assertion authoring improvementsIn the same way that UVM drove a lay-ered approach to simulation testbench creation, new techniques are emerging that introduce abstraction into assertion authoring. These abstractions reduce the complexity by masking assertion detail, while allowing the engineers to think about the verification task rather than individual characteristics of the assertions.
For example, OneSpin Solution’s Operational Assertions is a SystemVerilog library that allows formal tests to be represented in a transactional timing diagram-like manner, not unlike high-level UVM sequences, widely rec-ognized by verification engineers. Breker Verification Systems’ graph-based test sequences, now under consideration by the Accellera Portable Stimulus stan-dards committee, is another abstraction form that could also be applied to asser-tion authoring.
These techniques, while easing the application of formal tests, have the advantage of providing a recogniz-able and more natural input scheme, allowing engineers to relate to the verifi-cation process underway by eliminating some of the formal verification mystery.
Common coverage modelsSimplifying assertions is just one part of the puzzle. At the other end of the process is the collation of coverage information from various sources to understand overall verification progress regardless of the tools used. Simulation progress still is primarily focused on code coverage of one sort or another, with some functional coverage thrown in. Formal verification coverage focuses on assertions (so called “Assertion Coverage”), whether they were exe-cuted, did they pass or fail, or did they pass with a caveat (e.g., a bounded proof such as “the code passes within a set number of clock cycles”). This infor-mation may be fed back to a verifica-tion planning system to provide some useful data.
However, measuring formal coverage, where the actual code tested by spe-cific assertions is identified, is an area of interest to leading formal verification vendors. Schemes have been proposed
that vary both in terms of precision and execution resources required. The key is the ability to compare these formal models with that of simulation to pro-vide a combined, meaningful coverage assessment. The Accellera Unified Coverage Interoperability Standard (UCIS) committee is focused on this goal and has proposed methods by which the two may be compared. More work is required in this area, but it is clear that several of the formal verification vendors have solutions that allow a reasonable metric of progress to be calculated.
Simulation style debugThe debug of formal verification code in a manner that is meaningful to a simulation-centric engineer has, to a large extent, been solved by many of he formal verification vendors. Most tools can output a “witness” in the event of an assertion failure. That is, a sequence of events in the form of a simulation wave-form that led to the assertion failure. Indeed, some of the vendors, including OneSpin, can output simulation tests that allow the failure to be reproduced in the simulator for further study.
Cracking the code of mainstream ABVIt is clear that the use of ABV is starting to become mainstream. In recent papers, both ARM and Oracle declared the full power of ABV in their environments and noted that it was now being used at a significant level on their projects.
Solving the three legged stool of Assertion Authoring, Collated Coverage and Simulation-centric Debug, and com-bining it with a clear understanding of the design areas and scenarios where formal verification excels will propel this approach into the mainstream of SoC verification. Once this happens, it will have a dramatic impact on future design quality and development schedules.
David Kelf is Vice President Marketing at OneSpin Solutions.
OneSpin Solutions www.onespin.com @OneSpinSolution www.linkedin.com/company/
onespin-solutions
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Maximizing cloud value with strategy before connectivityBy Catherine Ter Horst
Connected embedded systems are all about the data – enabling information access now, or fueling analytics
in the future. Addressing the right questions will help uncover a manageable path to connectivity, enabling
cloud efficiencies where they make sense today and keeping business poised for inevitable evolution.
Connecting edge devices to the cloud is technically something most of us do every day, yet connectivity itself is not the end-all for adding cloud value to the enterprise. Connectivity allows for gath-ering and accessing business data in a timely and actionable way, but does not consider strategic use or analytics of the data. And without focusing on data as the end game, transitioning operations and applications to the cloud can create enough uncertainty to roadblock a com-pany daunted by the immense impact on business technology, equipment, operations, personnel, and even com-pany culture. Rather than connecting to just be connected, the process must entail a deep understanding of a long-term business strategy and a smart approach to what goes in the cloud and why. Addressing the right questions will help uncover a manageable path – it’s typically not a quantum leap, but rather incremental steps that consider cost, performance, storage, security, and scal-ability as flexible, individualized options.
Onsite or outsourced? Considering a hardware investment or an infrastructure investment is often the strongest starting point for determining a cloud strategy, it can be eye opening in terms of altering a company perspective towards outsourcing. For instance, the cost of deploying a new upgraded appli-cation in a cloud facility could compare favorably against migration costs related to traditional infrastructure investments.
Onsite systems require not only capital expenditure for the systems themselves, but also ongoing resources devoted to their care and feeding. Power, physical space, timely maintenance, planning for obsolescence and procuring trained technical staff all add expense. This can increase with company growth when tied to rapid expansion or a spike in customer activity fueled by a new product or service.
Cloud strategies reduce this challenge by taking on many of the complex back-end processes that can consume an internal IT department. Highly trained technical staff and extensive hardware and software expertise are part of the service, reducing the need to procure or sustain such talents in-house. Overall, capital expenditures change to oper-ating expenditures, adding value in delivery of services rather than long-term, multi-million dollar purchases of hard goods.
How fast and how often must data be accessed? Accessing information quickly can make a difference in how a business operates, how a customer is served, or how a patient is treated. Medical imaging is a prime example, representing data that is not necessarily accessed 24/7, but could be required urgently in a medical application where a diagnosis relies on the information. Data-on-demand is redefining the standard of care, driving healthcare
providers and their technology special-ists to develop strategies for supporting doctors who may be accessing data from non-traditional environments.
Partnerships or multiple cloud vendors can ensure fast, efficient data access. For instance, even though a larger medical device manufacturer may already have a data center or cloud solution, partnering with a regional cloud hosting vendor would address latency and bandwidth challenges by offering point-to-point connectivity to local/regional healthcare end-users. Connectivity remains seam-less, no major infrastructure changes are required in the existing datacenter, yet service improves with quicker response time and lower latency.
Using the training and simulation industry as an alternate example, cloud connectivity may not yet be ideal for an application with high determinism and low latency – yet the industry must capitalize on strategies to reduce costs, improve services, and enhance per-formance by streamlining data access. These future business strategies are integral to how hardware and soft-ware assets are tracked, and can also help OEMs become more strategic in overall maintenance, management, and product planning. For example, the cloud can act as a storehouse for training manuals, curriculums, and other types of technical information that helps drive the training experience. Data becomes a
Connecting to the Cloud
22 Embedded Computing Design | February 2016
secure, encoded video stream with fully rendered images sent wirelessly to a trainee’s personal device. Other advan-tages include streamlining hardware resources, networking data repositories, and monitoring, managing, and tracking training assets remotely.
Enabling new or enhanced services is another consideration. The cloud enables OEMs to remotely monitor and manage their systems, such as software updates and proactive main-tenance, improving uptime and cus-tomer satisfaction.
Is data secure and industry-compliant while being stored as well as used?Determining performance needs, along with an evaluation of the type of data being gathered, stored, and accessed, helps define the ideal type of cloud con-nectivity. Comparing public, private, and hybrid clouds must include a look at the different levels of security and manage-ment required.
A private cloud is a highly virtualized datacenter located safely inside a com-pany’s firewall, or a private space within
a cloud vendor’s data center designed to handle a specific company’s workload. With services and infrastructure maintained on a private net-work, private clouds provide the greatest level of security and control, yet they are more costly because the user pur-chases and maintains all soft-ware, hardware, and in the case of being inside the com-pany firewall, infrastructure as well. This option is ideal for businesses that are driven by data and applications, or must conform to strict security and data privacy requirements. Cloud vendors may already be compliant with complex and costly requirements such as ISO, Service Organizational Controls (SOCs), and HIPAA, enabling manufacturers to capitalize on specific markets rather than compliance pro-cesses themselves.
In contrast, public clouds are a “multi-tenant environment,” where users share their por-tion of a server with other cli-ents or tenants. Services and infrastructure are provided off-site via Internet connectivity, offering efficiency in shared resources. Public clouds are ideal for companies using secure third-party Software-as-a-Service (SaaS) applica-tions, or managing workloads for applications such as email. A public cloud user may want to develop and test their own application code, collaborate
with other entities on specific projects, or add incremental capacity for peak service times.
Hybrid clouds are the most complex and varied, coordinating a number of public and private options from multiple pro-viders and delivering services and infra-structure both onsite and via Internet connectivity. While hybrid environments offer the most overall efficiency, they require management of multiple plat-forms to ensure all aspects of the busi-ness can communicate. A company using a SaaS application but concerned about
www.embedded-computing.com 23
Cloud technologies add value in training and simulation applications, centralizing technology to benefit system performance. Options include a centralized data repository used to store, manage, and simplify access to training information, and secure remote capabilities for effective management and tracking of assets.
Figure 1
Public, private, or hybrid options cover the bases for cloud connectivity, with most users opting for hybrid strategies that encompass secure data, legacy applications on- and off-site, and services tailored for different markets.
Figure 2
security could use a private cloud inside their firewall to host the application and add a virtual private network (VPN) for increased security. Another company may handle their customer interactions via a public cloud while company data is hosted privately.
Are you prepared to handle Big Data as a long-term asset?Big Data is a rising business consider-ation, and its anticipated growth will compound the challenge for existing IT resources. Because trends and issues are revealed by executing analytics and evaluating information over time, data must be properly gathered, stored, and protected. It is the payoff for connected embedded systems, and planning for it now assures its long-term strategic value as a business asset.
When a large onsite server was the core storage tool, the only reasonable growth path was to purchase another server. Increased load on the IT team was part of the natural progression, as well as more integration, operating costs, power, and maintenance. Today, the cloud alternative offers more space and
more options, such as scalable storage to handle large datasets and fully redun-dant, replicated, and secure systems.
Adapting organizations for the futureOrganizations are becoming more com-plex; the type of employees that are needed to run them are required to have peripheral vision to see beyond what is considered their normal scope of responsibilities. They need to be more proactive and creative in how they find and resolve issues. With the shift to greater connectivity, they will have a greater focus on identifying issues to drive new opportunities, and will use those opportunities to generate new revenue. Instead of monitoring equip-ment and managing day-to-day require-ments for keeping operations at peak performance, key staff members are focused on designing an infrastructure to drive and optimize Big Data analytics – ultimately helping derive meaningful business insights and improve results across the organization.
For example, the role of an infrastructure architect is becoming a solutions
architect. This indi-vidual has a deep understanding of a company’s current and future data usage and storage needs, and can design a complete infrastructure that is securely built to address high performance and bandwidth latency.
Fostering cloud strategyThe flexibility inherent to cloud technolo-gies can enable a company-wide shift in perspective, changing the conversat ion about how to handle growth. To determine an ideal path, OEMs must answer a full slate of questions for end-users, addressing costs, performance,
storage, security, scalability, and even cultural challenges that result from busi-ness transformation.
While recognizing the need for data is essential, the key to making it happen is to find incremental ways to embrace cloud efficiencies rather than just con-nectivity. Cloud technology partnerships add value by simplifying the strategy and respecting the level of control a business wants to outsource or maintain internally. Most importantly, cloud effi-ciencies for one customer may not make sense for another – it’s not a one-size-fits-all proposition to either embrace or not. Focus on the end game of getting access to data for the long term, driving new revenue and creating a pace of change that makes sense today and for the future.
Catherine Ter Horst is Senior Product Manager for IoT at Dedicated Computing.
Dedicated Computing www.dedicatedcomputing.com opsy.st/DedicatedLinkedIn
24 Embedded Computing Design | February 2016
Strategies Connecting to the Cloud
Choices depend on the desired level of control. Greater end-user control equals greater responsibility and the need for more internal resources on-site; greater outsourcing capitalizes on the overall cloud value proposition in terms of reducing operating expenses, accessing specific hardware, and software expertise, and quickly increasing scalability of services.
Figure 3
Connecting to the Cloud
Evaluating Bluetooth Smart – What IoT developers need to know about getting connectedBy Mark Bowyer
This article serves as an initial guideline to help those with little-to-no RF or Bluetooth expertise get started
on Internet of Things (IoT) designs and get to market quickly.
The IoT landscape continues to grow at a rapid pace. Between fitness and activity trackers, smart watches, connected cars, and more, the consumer-driven desire to utilize a vast variety of sensors within devices and gadgets to retrieve measurable data is at an all-time high. The challenge for IoT will be mass-market enablement and creating accessibility to IoT through easy-to-use, easy-to-deploy wireless technology and sophisticated sen-sors that can drive computational resources to the device. This approach may reduce the heavy lifting otherwise delegated to the cloud and can thereby create more power efficient solu-tions that offer world-class performance and environment/use case accuracy.
Original equipment manufacturers (OEMs) looking to make their way into the IoT need to consider several factors, including their design philosophy. Entering the consumer IoT market space typically drives design toward a balance of simple, intui-tive setup and operation with increased battery lifespan, while decreasing power, cost, and form factor. In order to meet these needs, the right communication technology should be selected from the start.
Bluetooth Low Energy (BLE or Bluetooth Smart to many) can be a snap to use. When the Bluetooth SIG announced the
formal adoption of Bluetooth Core Specification version 4.0, it included the Bluetooth Smart (low energy) feature giving devel-opers an easy and efficient way to enable Internet connectivity for embedded devices through BLE-enabled platforms like mobile phones and tablets (Figure 1). A slew of accelerometers; magnetometers; IR temperature, hall-effect, position, radar, and light sensors; and hundreds of other devices can now be enabled quickly and deployed as Internet-connected “things.”
Nevertheless, developers should be aware that there are sev-eral project-level challenges when it comes to creating an Internet of Things (IoT)-enabled product. Understanding the challenges before beginning a project can save time, effort, and money, and being versed in the emerging application development solutions and ecosystems deployed by device and module providers can benefit developers as well. Most importantly, keeping in mind that “ease of use” is the predomi-nant driver of integration with previously “tethered” solutions is critical to a successful device.
Choosing the right wireless technologyAs stated, choosing a technology to enable connectivity for IoT devices is key. As consumer IoT products progressively get smaller and more convenient for portability, mobility, and
www.embedded-computing.com 25
longer battery life, circuitry for direct Internet connectivity is sacrificed. But, smartphones and tablets allow external devices to connect and send data to the Internet by acting as a gateway through their own means of connectivity. This makes phones and tablets ideal candidates for developers seeking to connect sensor-based embedded devices to the Internet. The list of avail-able wireless connectivity options for external devices to smartphones and tablets can be narrowed to Wi-Fi, Bluetooth, and near-field communication (NFC), with the characteristics of each listed in Figure 2.
Classic Bluetooth and Wi-Fi are known to steadily drain battery life as they operate based on the application and use case, hence such protocols may be better suited for streaming and high-data rate applications instead of sending small bursts of data packets. By comparison, BLE’s power consumption is very low thanks to the nature of its data exchange. Determining which method of wireless con-nectivity your product should use depends on the application needs. In most circumstances, IoT devices fit within the same set of principles for design: enabling connectivity while maintaining good battery life, being small and lightweight, and keeping costs low. BLE has therefore found itself a niche within IoT devices due to a few distinguishing factors that address these very needs:
õ Many IoT devices are driven by short-range communication. BLE operates under the lowest possible power consumption within low ranges, which is ideal for such communication.
õ IoT devices are typically in edge device roles, aiding to lower their power consumption. Devices
in central roles — usually the smartphone or tablet itself — are subject to slightly higher power consumption due to their continuous scanning nature and number of devices connecting to them.
õ BLE’s low power consumption attributes directly to the size a device can be. BLE-enabled devices can often operate on only a coin-cell. This contributes to reduced overall size, weight, and cost of such devices.
õ BLE maintains a low data rate and exchanges small packets of information over extended intervals. This is great for devices sending short bits of data infrequently, as it can maximize the time spent idle while in low power mode.
õ BLE is optimized to minimize the time between connection and data exchange to within a few milliseconds, with a typical connection and tear-off cycle only
26 Embedded Computing Design | February 2016
Strategies Connecting to the Cloud
Bluetooth Low Energy (BLE) is being deployed in countless applications in virtually every field - with new applications arriving almost on a daily basis.Figure 1
Wi-Fi, Bluetooth, and near-field communication (NFC) are the most common wireless connectivity options available to design engineers. Listed here are some of their basic characteristics.Figure 2
lasting around 6 ms. The protocol then severs the connection and returns to idle mode. This is key for devices that send data.
õ Many BLE-enabled devices are natively compatible with mobile operating systems. This makes them great for use with most smartphones and tablets
Each of the connectivity options has its benefits, though, so choosing one over the other is application-specific. While Bluetooth does not provide the data rate and speed of Wi-Fi, it offers a better power-to-battery life ratio. NFC devices offer the lowest power consumption but are range-limited. Additionally, Bluetooth-enabled devices can be paired to smart-phones and tablets easily to create an ad hoc network with access to the Internet.
In light of the methods outlined above, BLE appears to stand out as the most viable standard to enable IoT connec-tivity for embedded devices by using a mobile device as a gateway.
Getting started with developmentWith a basic understanding of BLE under our belt, let’s consider application
development. There’s much to choose from when starting the process as there are numerous development tools available to assist in app creation and custom design. Platforms such as App Inventor, Appcelerator, Atmosphere, MoSync, Phonegap, and others allow easy development of mobile apps that can be customized for embedded solutions and tested across multiple platforms. Users with little-to-no RF or BLE expertise will find the Atmosphere development platform particularly intriguing (Figure 3). With it, developers can create embedded device firm-ware and mobile apps simultaneously using a web-based drag and drop tool. Further, Atmosphere provides a library of sensors that can be incorporated into designs without coding.
Atmosphere uses a variety of “ele-ments” to help create a project easily. Elements are blocks of pre-made code that perform various functions and can also represent sensors when added into a project, allowing users to easily create a project without understanding programming languages or coding. Whenever an element is placed in the user interface, it automatically creates code for both the mobile app (which can
be designed and modified at will) and the embedded system. Elements can be connected in countless ways to utilize a variety of sensors and expand the func-tionality of a project.
Tools and tech to get startedAmong all wireless standards, the gadget-oriented Bluetooth has become a mainstay of personal device interconnectivity, and with BLE we are about to see exponential growth in the emerging IoT space. Developers can greatly accelerate time to market by choosing the right wireless technology, tools, and software to connect their sensor-based embedded devices to the Internet.
Mark Bowyer is Director of Business Development for Anaren’s Wireless business unit, where he leads and deploys the company’s strategy for the Internet of Things.
Anaren www.anaren.com [email protected] @AnarenInc linkedin.com/company/anaren opsy.st/AnarenYouTube
www.embedded-computing.com 27
The Atmosphere cloud- and-web-based integrated development environment (IDE) allows users to easily create and build applications using drag-and-drop elements. The application for a mobile device and the firmware for the connected hardware are created simultaneously.Figure 3
Embedded device security for the IoTBy Mike Rohrmoser
When it comes to security for the Internet of Things (IoT), the sum of the parts may be lesser than the whole.
As more devices become network-enabled, public or private, there’s an increasing concern around the security profile of those devices. There’s been a fair amount of discussion regarding the concepts of “security by design” and “defense in depth,” and in these areas components can represent either a gaping hole or another line of defense.
Ultimately, the security of any device is dependent on its components — any connected device is only as secure as its hardware and software building blocks — and if those components aren’t part of a secure system architecture, they almost certainly can invite unauthorized access and use.
Let’s take look at some of the recent vul-nerabilities that were exposed in devices in both consumer and non-consumer industrial applications:
õ In July 2015, security researchers demonstrated how they could wreak havoc with a Jeep Grand Cherokee’s
systems by disabling brakes or manipulating the transmission, despite the driver’s actions. The exploit was based on a vulnerable component in the carmaker’s Uconnect vehicle connectivity system, enabling hackers to connect through the cellular connection as long as the vehicle’s IP address is known. After that, the firmware in the vehicle’s entertainment system was replaced with a version incorporating malicious code that allowed access to the vehicle’s internal CAN bus system. All this led to a recall of about 1.4 million vehicles by Fiat Chrysler.
õ In the Summer of 2015, it was reported that three hospitals suffered data breaches after some of their medical devices, ranging from blood gas analyzers to radiology and X-ray equipment, had been infected with malware, allowing hackers to access sensitive patient data. Not to mention the widely publicized case of a popular
IV pump model being vulnerable to relatively unprotected malicious firmware updates through its external serial port, granting access to dosage control and other key operational aspects.
õ At the USENIX Security Symposium 2015, a group of researchers claimed that it’s possible to wirelessly hack into vehicles equipped with cellular-enabled dongles that track location, speed, and efficiency. These devices are simply plugged into a vehicle’s standard OBD-II port and are commonly used by insurance companies and commercial trucking fleet operators to gather information on driving habits or manage vehicle and delivery logistics.
õ In late 2015, multiple security vulnerabilities related to connected cameras, ranging from video baby monitors to public CCTV systems, were published, exposing them to brute-force dictionary attacks by working through a list of likely
Connecting to the Cloud
28 Embedded Computing Design | February 2016
passwords, including default or “hidden” passwords, due to their weak traditional user/password authentication.
There are countless other similar exam-ples, and many of these attacks mark a departure from the usual methods that target network security vulnerabilities and signify that, in addition to firewall-based perimeter defenses and network security controls, the embedded devices and their components must be locked down.
Secure connections aren’t enoughWith more and more devices joining the IoT on a daily basis, these issues are amplifying already existing con-cerns, making it a vital requirement that connected devices (both legacy and new) are adequately covering device identity and device integrity aspects, as well as connection security. The previous examples cover almost the entire gamut of embedded device security issues – issues that could have been addressed with certificate-based implementations of firmware updates, user authentication, and encrypted storage. Additional use of hardware-based capabilities, including tamper detection and locking down backdoors, such as the ubiquitous JTAG interface, provide another proactive layer against local attacks.
Any connected device represents a potentially vulnerable access point to hackers seeking to either control or dis-able a device, or to find an access point to proprietary data or networks. In fact, the issue of security in a connected world was recently addressed in a Federal Trade Commission report and an FBI Public Service Announcement regarding the IoT that recognized the rapid growth of connected devices and their benefits, but also cited risks that could seriously undermine those benefits.[1,2]
The old-fashioned concept “security by obscurity” for embedded devices, if it was ever really valid to begin with, is no longer sufficient in today’s connected world. A vast number of IoT devices are, by definition, embedded devices, and especially in non-consumer applications require a device security approach that also supports their often-long product
lifecycles of seven-to-ten years or more. What’s needed is a comprehen-sive Embedded Device Security System Architecture that’s suited to follow the security trends and threats throughout a device’s lifespan.
Device-level security measuresApart from including key security tech-nologies and measures for connected devices when considering system architecture and design, a security-by-design strategy must be adopted at the embedded component level to effectively block potential pathways that could permit unauthorized access or control of connected devices and/or data. Key recommendations include:
õ Design and build to a Device Security System Architecture that meets current and future requirements, including building products with appropriate “headroom” for future extensions (performance, memory, connectivity, and hardware support) to ensure that products will stand the test of time.
õ Leveraging appropriate training and tools, ranging from security coding techniques to properly and fully assessing the risks of system designs holistically. It’s crucial to invest in and maintain up-to-date tools such as source code analyzers that can scan for vulnerabilities and test suites to perform network security vulnerabilities analysis.
õ Securing data connections is key, but the need for device security extends to an integrated system concept with encrypted local data storage, digitally-signed firmware, certificate-based authentication, a proper certificate management strategy, locking down debug ports such as JTAG for production units, and tamper-proofing against local access to hardware.
õ Lastly and perhaps most importantly, there must be a secure and scalable process that lets the device automatically update itself remotely, or to allow authorized users to update the device locally. This allows manufacturers to quickly and reliably respond to most recent vulnerabilities and continue to enhance their products’ capabilities
in lockstep with the current state of technology. Especially in light of some of the fundamental concerns that current security algorithms could be broken within this decade, there’s a need to include new implementations such as Elliptic Curve Cryptography in future products.
Ultimately, the burden falls on manufac-tures to determine the level of security that’s added to their IoT devices, which capabilities are enabled, what those devices do on their customers’ networks, and which services are open. The ben-efits of the IoT are undeniable, but its inherent risks need to be addressed and an intelligent security concept must be an integral component of the “things.”
Manufacturers should turn to embedded component suppliers that can address those security needs and understand the embedded market and its specific needs, both now and in the future. Manufacturers needn’t assume the entire burden, but they should ensure that the suppliers they work with have the required track record and will be around to support them for years to come. Security issues have the potential to affect not just the end user, but also severely tarnish the device mak-er’s reputation.
Mike Rohrmoser is Director of Product Management for Embedded Systems at Digi International, where he is responsible for the definition and delivery of Digi’s current embedded product solutions offerings and future direction.
Digi International @digidotcom [email protected] opsy.st/DigiLinkedIn opsy.st/DigiYouTube
References1. “FTC Report on Internet of Things Urges Companies to Adopt Best Practices to Address Consumer Privacy and Security Risks.” Federal Trade Commission. Accessed January 14, 2016. www.ftc.gov/news-events/press-releases/2015/01/ftc-report-internet-things-urges-companies-adopt-best-practices. 2. “Internet of Things Poses Opportunities for Cyber Crime.” Internet Crime Complaint Center (IC3). Accessed January 14, 2016. www.ic3.gov/media/2015/150910.aspx.
www.embedded-computing.com 29
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30 Embedded Computing Design | February 2016
www.embedded-computing.com 31
FEATURES
ö Fanless rugged embedded micro box ö Intel Skylake 6th Generation Core i7-6600U 2.6GHz ö DDR3L 1066MHz SODIMM 8 GB Memory ö 1 x mSATA SSD 64GB and 1 bay swappable slot for 1 x 2.5" SATA
HDD storage ö MIL-STD-810F in temperature, vibration, and shock ö Fully IP67 rated ö Wide range operating temperature -30°C ~ 65°C (-13°F ~ 158°F) ö VGA and DVI video input with option for VGA and HDMI ö 1 LAN, 2 COM, and 2 USB ports ö DC 9~36V power supply ö I/O ports includes two USB 2.0, RS232, RS422, GbE LAN ö 8.56"(W) x 1.77"(H) x 5.83"(D) ö 8.82 lbs
Military standards compliance in temperature, vibration, and shock, the fully IP67 with dust and water proofing completed with anti-corrosion housing fanless embedded box is complimented with DDR3L 1600MHz 16GB, removable 1-bay 2.5" SSD, and multiple I/O ports.Acnodes Corporation, a leading manufacturer of industrial and embedded computer platforms and technologies, introduced today the launch of FES9280, a fanless embedded PC, powering high-performance military applications with space con-straints. Computations will be of acceleration with the newest Intel Skylake 6th Gen-eration Core i7-6600U 2.6GHz. With a wide range temperature, it is complimented with anti-vibration and anti-shock resistance of MIL-STD. These features meet the severe environment operational demands in many industries creating reliability in the multitude of conditions. The fully IP67 rated enclosure provides for complete dust proofing, water immer-sion durability, and anti-corrosion housing yet maintaining its lightweight capability.FES9280 has 16 GB of DDR3L 1600MHz, as well as a 2.5" SSD in Hot swappable array and a mSATA SSD 64GB cache for system boot. VGA and DVIoutput accepted. It includes multiple optional features such as HDMI, DP output, full size miniPCIe for wireless card IEEE 802.11 a/b/g/n 2x2 Dual Band, and full size miniPCIe for WWAN 3G/4G card integrated. I/O for Signal includes two USB 2.0 interfaces, RS232, RS422, GbE LAN, DVI port, and VGA port. The power input supports DC 9~36V input.
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Acnodes Corporationwww.acnodes.com
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Come visit the ADL Embedded Solutions booth (#1-554, Hall 1) at the Embedded World Exposition & Conference in Nurnberg, Germany, February 23-25th 2016 to view the latest products and to see multi-ple live product demos or visit http://ew2016.adl-usa.com. For system pricing, contact ADL Embedded Solutions at 858-490-0597 www.adl-usa.com or email [email protected].
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32 Embedded Computing Design | February 2016
FEATURES
� Secure, connected, highly cost-effective system-on-module � NXP i.MX6UL-2, Cortex-A7 @ 528 MHz � Up to 2 GB NAND flash, up to 1 GB DDR3
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Digi's new ConnectCore® for i.MX6UL module delivers a secure and extremely cost-effective embedded communication module platform in a low-profile form factor slightly bigger than a postage stamp. Its innovative and scalable Digi SMTplus™ surface mount form factor (28x28 mm) supports virtually unlimited design integration and flexibility without the burden of manufacturing complexity.
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Take advantage of the PCI Express interconnect in your embedded system. PCI Express networking connects multiple processors, FPGAs, GPUs and I/O devices into an intelligent network. Dolphin’s PCI Express Networking solution includes standard hardware components, middleware software, and customized system support for various embedded systems. PLX/Avago and IDT PCIe switches can be used by designers to create new more power-ful systems build on a powerful software stack.
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� Fully sealed rugged chassis for aircraft, marine and vehicle applications
� Dissipates up to 95W of power, using only passive cooling � Shock handling up to 10g, Vibration up to 2g � Configured to house PC/104, ComExpress and EBX boards simultaneously
� Up to 8 PC/104 or similar-sized boardsLooking forward to seeing you in Hall 2, Stand 451 at Embedded World.
Rugged ATR Conduction-Cooled Enclosure for Housing Conduction-Cooled PC/104 Modules. The M-Max ATR-compliant chassis is a fully sealed rugged enclosure with passive cooling, providing extreme physical pro-tection for high performance systems. The machine-worked aluminum chassis is especially designed for the most challenging environments. The ATR-compliant enclosure excels in critical applications needing to oper-ate under extreme temperatures, dust and humidity. Providing excel-lent shock and vibration protection, the completely fanless chassis uses natural convection and conduction cooling. Typical systems housed in this ATR-compliant enclosure deliver IP66 dust and moisture protection, withstand shocks up to 10g and vibration up to 2g. The fully sealed enclo-sure houses up to 8 PC/104 or similar-sized boards. The configurable front panel can be outfitted with variety of customer-defined connectors.
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www.embedded-computing.com 33
FEATURES
ĄĄ safer actor-based concurrencyĄĄ hierarchical state machinesĄĄ software tracingĄĄ graphical modelingĄĄ automatic code generation
Embedded software developers are independently re-discovering patterns for build-ing concurrent software that is safer, more responsive and easier to understand than naked threads of a Real-Time Operating System (RTOS). These best practices univer-sally favor non-blocking, asynchronous, event-driven, encapsulated state machines instead of naked, blocking RTOS threads.While these concepts can be implemented manually on top of the “free threading” approach, a better way is to use an active object (actor) framework, which inherently supports and automatically enforces the best practices of concurrent programming.The QP™ family of active object frameworks from Quantum Leaps provides a light-weight, reusable architecture designed specifically for deeply embedded systems. The QP family consists of QP/C, QP/C++, and QP-nano frameworks, which are all strictly quality controlled and thoroughly documented. The frameworks are licensed as GPL open source as well as commercially.The behavior of active objects is specified in QP by means of hierarchical state machines (UML statecharts). The frameworks support manual coding of UML state machines in C or C++ as well as fully automatic code generation by means of the free QM™ graphical modeling tool.All QP frameworks contain a selection of built-in real-time kernels and can run on bare-metal microcontrollers, completely replacing a conventional RTOS. Native QP ports and ready-to-use examples are provided for major CPU families, such as ARM Cortex-M. QP/C and QP/C++ frameworks can also be used with many traditional RTOSes and desktop OSes (such as Windows and Linux).
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34 Embedded Computing Design | February 2016
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LINQ/GbE - Feature Highlights � 12 and 24 Port 10/100/1000 Mbps Managed Switch Box � Ruggedized Sealed RJ-45 Acclimate Connector Series � IP68 Dust and Waterproof Solid Aluminum Enclosure � Layer 2+ Carrier Ethernet Management � Low Power Passively Cooled Construction � Extended Temperature Range -40°C to +85°C
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Connect Tech http://bit.ly/1n14INp
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www.embedded-computing.com 35
FEATURES
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Connect Tech http://bit.ly/205iYn5
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FEATURES
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Connect Tech’s COM Express® Type 10 Mini Carrier Board is an extremely small carrier board (84mm x 55mm) . This Type 10 Mini Carrier Board is ideal for space constrained applications, harsh environments, demanding conditions, and sup-ports extended temperature ranges of -40°C to +85°C. Choose from on board low profile, locking pin header connectors, or our latest model with board to board connectors, allowing for easy mating to off-the-shelf or custom designed breakout boards. This option dramatically reduces your cabling requirements and allows for the most compact packaging of your system.
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Connect Tech http://bit.ly/1Ki4o2f
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36 Embedded Computing Design | February 2016
FEATURES
� Quad-, dual-, and single-core models � 4th Generation “Bay Trail” processor � -40°C to +85°C operation � Wide input voltage (8V – 17V) � Soldered-on RAM (up to 4 GB) � Soldered-on Flash (up to 8 GB) � Mini PCIe / mSATA expansion socket � Two serial / COM ports; Four USB 2.0 ports � MIL-STD-202G Shock and Vibration
Ultra Small “Bay Trail” Embedded ComputerThis next gen Embedded Processing Unit (EPU) format combines processor, memory, video, and system I/O into an extremely compact embedded com-puter, with a footprint the size of a credit card!
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Hawk (VL-EPU-3310)
Hardware
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VersaLogic Corporationwww.VersaLogic.com/05Hawk
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FEATURES
High Reliability � -40° to +85°C Operating Temperature � Soldered-on RAM (up to 1 GB) � Fanless Operation � High shock and vibe
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Rugged PC/104-Plus Embedded Computer Fox is a rugged new PC/104-Plus™ single board computer (SBC). It features the compactness of the PC/104 form-factor, and the compatibility of the classic PC/104-Plus expansion interface—with ISA and PCI bus expansion. It also fea-tures extensive I/O capabilities, low power consumption, and fanless operation over the full industrial temperature range.
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Fox (VL-EPM-19)
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VersaLogic Corporationwww.VersaLogic.com/05Fox
� [email protected] � 503-747-2261� linkedin.com/company/versalogic-corporation � @versalogic
FEATURES
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The PPM-C407 from WinSystems utilizes the E3800 family of Atom™ processors from Intel® to provide low power and performance in the versatile PC/104 form factor. Designed for harsh environments and reli-ability, it includes soldered RAM for added shock and vibration resistance with an operating temperature range from -40°C up to +85°C.
WinSystems is offering the PPM-C407 in multi-core options depending on the application requirements. The scalable performance allows you to choose between low power single-core and higher performance dual or quad-core solutions. Linux, Windows, and other x86 operating systems can be booted from the mSATA, or USB interfaces, providing flexible data storage options.
PPM-C407 - Low Power PC/104 SBC with Long Term Availability
Hardware
embedded-computing.com/p372685
WinSystemswww.winsystems.com
� [email protected] � 817-274-7553� linkedin.com/company/winsystems-inc- � @WinSystemsInc
FEATURES
� 1024×600 Resolution 10” Panel PC with Touchscreen � Dual-core Freescale® i.MX 6DL Cortex A9 Industrial ARM CPU @ 800 MHz
� 2GB of Soldered DDR3 RAM � Gigabit Ethernet with IEEE-1588™
� Six USB 2.0 ports and one USB On-The-Go Port � Two CAN Bus ports, One High Speed Serial port � 24 lines GPIO tolerant up to 30 VDC � SD/SDIO and MicroSD sockets � MiniPCIe and IO60 expansion � Wide range DC or Power over Ethernet (PoE) PD Power Input � Fanless -40° to +85°C operational temperature
WinSystems’ PPC-10W-398D dual-core open frame Panel PC combines high performance multimedia graphics with a rich mix of industrial I/O. The Freescale i.MX 6DL processor’s integrated power management pro-vides excellent efficiency and allows operation from -40° to +85°C. WinSystems series of ARM®-based embedded solutions are reliable yet versatile to meet a variety of applications with a remarkable power-to-performance ratio. They are designed for demanding applications in secu-rity, transportation, medical, and digital signage.
PPC-10W-398D
Hardware
embedded-computing.com/p373278
WinSystemswww.winsystems.com
� [email protected] � 817-274-7553� linkedin.com/company/winsystems-inc- � @WinSystemsInc
www.embedded-computing.com 37
Small, rugged XMC form factor Linux/Windows embedded computerThe Innovative Integration SBC-Nano is a diminutive single board computer and XMC carrier with full Windows/Linux functionality that boots from eMMC. Combine with Innovative’s FPGA-based XMC mezzanine cards to reduce time to market while providing extreme performance for deeply embedded applications. The FPGA on each XMC is user-programmable using the FrameWork Logic in MATLAB or VHDL, with pristine analog I/O configurations from ultra-sonic to 6 GHz.
3D image sensor chips bringing virtual reality to smartphonesInfineon and pmdtechnologies announced the second generation of the jointly developed REAL3 3D image sensor chip portfolio. Combined with infrared cameras, imaging systems based on REAL3 chips can enhance virtual reality game experiences that involve gamer’s hands and their living environment. Other applications involve spatial measurement of rooms and objects, indoor navigation, and implementation of special photo effects. The new generation 3D image sensor chips double the pixel sensitivity to measure intensity of emitted and reflected infrared light. Google’s “project Tango” uses this technology to provide 3D perception in smartphones and tablets.
Infineon Technologies www.infineon.com embedded-computing.com/p373239
Innovative Integration www.innovative-dsp.com embedded-computing.com/p373107
Easy integration of device data into M2M applicationsThe Digi International Digi Device Cloud enables easy integration of device data by integrating access from any device through an open API and cloud connector. The devices can be securely managed and grouped for increased efficiency in M2M applications. Devices can also be managed along with providing software update capabilities. Alarms and notifications can be configured based on data conditions. The environment also includes open APIs that enable device data to be pushed into any third party application or custom-built M2M applications. The cloud systems are located in certified SSAE-16 and ISO27001 facilities for security purposes, are ISO-27001 and PCI certified, and conform to many of the controls for NERC/CIP and HIPAA.
Digi International www.digi.com embedded-computing.com/p373240
Editor’s Choiceembedded-computing.com/editors-choice
38 Embedded Computing Design | February 2016
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