ELE 804/EE 8604

RF Circuits and Systems

Laboratory One - Low-Noise Amplifiers

X. Lai and F. Yuan, PhD., P.Eng.

Department of Electrical and Computer Engineering

Ryerson University

Toronto, Ontario, Canada

Copyright c©Fei Yuan 2012

Preface

This laboratory manual is an essential component of the 4th-year elective

course ELE 804 (Radio-Frequency Circuits and Systems) and the graduate

course EE 8604 (Special Topics in Electrical Engineering : Radio-Frequency

Circuits and Systems) offered by Professor Fei Yuan in the Department of

Electrical and Computer Engineering at Ryerson University, Toronto, On-

tario, Canada. Permission to duplicate and distribute this document is

granted for an educational purpose only. Please report any error in this

Laboratory Manual or problem encountered during laboratories to Professor

F. Yuan at fyuan@ee.ryerson.ca.

Dr. Fei Yuan

Jan. 2012

1

Calendar Description of EE8604/ELE804

This course deals with the design of low-power high-speed CMOS inte-

grated circuits using deep sub-micron CMOS technology at the system level.

The course consists of two essential components: theory and project. The

theoretical component consists of : advanced topics on modeling of MOS

transistors, modeling of interconnects (lumped, distributed RC, distributed

RLC, and transmission line models), impedance matching techniques, lay-

out techniques for high-speed digital and mixed analog-digital circuits, clock

generation and distribution on chip, power distribution on chip, analog and

digital grounding of mixed analog-digital circuits on chip, I/O and pad de-

sign, packaging and ESD protection, switching noise, and high-speed data

links. The project component consists of design, layout, and simulation of

CMOS circuits using state-of-the-art CMOS technology and CAD tools.

3 hours lecture, 1 hours laboratory each week.

Prerequisites ELE704 or ELE734.

2

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2 Cascode Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . 8

3 Maximum-Power-Gain Output Impedance Matching . . . . . . 13

4 Stability Analysis and Source/Gate Degeneration . . . . . . . 26

5 Maximum-Power-Gain Input Impedance Matching . . . . . . . 34

6 Minimum-Noise-Figure Input Impedance Matching . . . . . . 40

7 Linearity: P1dB and IIP3 . . . . . . . . . . . . . . . . . . . . 47

3

List of Figures

1 Cascode amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . 9

2 Simulated output voltage of cascode amplifier. The bottom is

input and the top is output. . . . . . . . . . . . . . . . . . . . 10

3 Cascode amplifier with IBM inductors and capacitors. . . . . . 11

4 Simulated output voltage of the cascode amplifier with IBM

inductors and capacitors. The bottom trace is input and the

top is output. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5 Basic cascode amplifier with port-setup for output impedance

measurement. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6 Properties of the input port. . . . . . . . . . . . . . . . . . . . 16

7 Properties of the output port. . . . . . . . . . . . . . . . . . . 17

8 ADE (Analog Design Environment) setting with ideal match-

ing network components. . . . . . . . . . . . . . . . . . . . . . 18

9 S-parameter analysis select menu. . . . . . . . . . . . . . . . . 19

10 Output impedance measurement by plotting Z22. . . . . . . . 20

11 Cascode amplifier with the ideal output impedance matching

network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

12 Output impedance of the cascode amplifier with the ideal out-

put matching network. . . . . . . . . . . . . . . . . . . . . . . 22

13 Cascode amplifier with the IBM output impedance matching

network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

14 Output return loss measurement by plotting S22. . . . . . . . . 24

4

15 Output return loss S22 of cascode amplifier with the IBM out-

put impedance matching network. . . . . . . . . . . . . . . . . 25

16 Stability factor K < 1 at the input port of Fig. 5. . . . . . . . 27

17 Cascode amplifier with source and gate inductive degeneration. 28

18 Stability analysis Spectre menu. . . . . . . . . . . . . . . . . . 29

19 Stability factor K > 1 with inductive source degeneration. . . 30

20 Stability factor |∆| < 1 with gate inductive degeneration. . . . 31

21 Input impedance looking into the gate degeneration inductor

(real part). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

22 Input impedance looking into the gate degeneration inductor

(imaginary part). . . . . . . . . . . . . . . . . . . . . . . . . . 33

23 Maximum-power-gain input impedance matching with IBM

devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

24 Input return loss after input impedance matching by IBM de-

vices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

25 Transducer gain: GT ; Available power gain: GA; Power gain:

GP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

26 Noise figure analysis menu. . . . . . . . . . . . . . . . . . . . . 38

27 Noise figure of the amplifier with maximum-power-gain input

impedance matching networks. . . . . . . . . . . . . . . . . . . 39

28 Measurement of optimal source output impedance Zs,opt for

minimum noise figure. . . . . . . . . . . . . . . . . . . . . . . 41

29 Noise circle selection form in Spectre output menu. . . . . . . 42

30 Noise circle in Smith chart for NF=0.9 dB. . . . . . . . . . . . 43

31 Noise matching network with IBM devices. . . . . . . . . . . . 44

32 Noise figure at 2.4 GHz after noise matching network by IBM

devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

33 Noise circle at NF=1.4 dB passing Zs = 50Ω origin for the

designed matching network in IBM devices. . . . . . . . . . . 46

34 Linearity measurement for LNA with maximum-power-gain

input-output matching in Fig. 23. . . . . . . . . . . . . . . . . 48

5

35 IIP3 measurement input port setting. . . . . . . . . . . . . . . 49

36 IIP3 measurement output port setting. . . . . . . . . . . . . . 50

37 HB (harmanic balance) in ADE analyses selection form. . . . . 51

38 HB AC analysis in ADE analyses selection form. . . . . . . . . 52

39 Parameter settings for HB and HBac analyses in Cadence ADE. 53

40 Plot IIP3 in SpectreRF. . . . . . . . . . . . . . . . . . . . . . 54

41 IIP3 of the LNA. . . . . . . . . . . . . . . . . . . . . . . . . . 55

42 Plot input 1dB compression point in SpectreRF. . . . . . . . . 56

43 1dB compression point for the LNA. . . . . . . . . . . . . . . 57

6

List of Tables

1 Design specifications of low-noise amplifier . . . . . . . . . . . 8

1 Introduction

Low-noise amplifiers (LNAs) are a key block of wireless receivers. They are

used to amplify the received weak RF signal and suppress noise. This lab-

oratory will design a CMOS low-noise amplifier for Blue-tooth applications.

The carrier frequency is 2.4 GHz. The LNA will be designed in IBM 130 nm

CMOS technology.

The design of LNAs differs from that of an analog amplifier where voltage

amplification is the goal. The design of LNAs is constrained by the maximum

power transfer, i.e., maximumly convert the received RF power to a voltage

signal. Impedance matching is thus required at both the input and output

port of a low-noise amplifier. In this lab, the design starts from a conven-

tional cascode voltage amplifier. Input and output matching networks for

maximum power transfer are then added at the input and output of the low-

noise amplifier. We will also see that low-amplifier amplifiers might oscillate.

Source and gate inductive degenerations are necessary for the LNA to oper-

ate stably. In addition to the maximum power transfer, the input impedance

matching network can also be tuned so that the noise figure of the LNA is

minimized. This is crucial for RF receivers as the noise figure of the LNA

typically dominates the noise figure of the receiver.

The LNA will be designed using an IBM 130 nm CMOS technology with

7

8

Table 1: Design specifications of low-noise amplifier

Specifications of LNA Value

Carrier frequency 2.4 GHz;

Noise figure ≤2 dB (power matching)

Noise figure ≤1.5dB (noise matching)

Gain ≥ 25 dB;

IIP3 ≥0 dBm at 25 dB gain

IIP3 ≥10 dBm at 15dB gain

Input/Output Impedance 50Ω;

Input/Output Return Loss ≤-20 dB;

Stability Factor K > 1;

DM top-metal option used for spiral inductors. The design specifications of

the LNA are given below :

2 Cascode Amplifiers

In this section, we first introduce a simple cascode votage amplifier with a

LC-tank load, as shown in Fig. 1. The LC tank is composed of an ideal

inductor in series with a resistor, and an parallel capacitor. The component

values are annotated in the figure. The input of the amplifier is a 10 mV

sinusoid at 2.4 GHz. The simulated output voltage of the amplifier is shown

in Fig. 2.

Next, we replace the idea inductor-resistor with an IBM top-metal spiral

inductor and the ideal capacitor with an IBM MiM capacitor, as shown in

Fig. 3. The biasing network of the two amplifiers is given in the respective

schematics. The IBM inductors and capacitors have substrate connections,

9

Figure 1: Cascode amplifiers.

which are also shown in the circuit diagram. The simulated output voltage

of the amplifier is shown in Fig. 4.

10

Figure 2: Simulated output voltage of cascode amplifier. The bottom is input

and the top is output.

11

Figure 3: Cascode amplifier with IBM inductors and capacitors.

12

Figure 4: Simulated output voltage of the cascode amplifier with IBM in-

ductors and capacitors. The bottom trace is input and the top is output.

13

3 Maximum-Power-Gain Output Impedance

Matching

In this section, we convert the voltage-mode cascode amplifier studied earlier

to a low-noise amplifier. The first step is to replace the input small-signal

voltage source with an input port. The input port is needed for measuring

a number of key parameters of the LNA including input impedance. Also,

we add an output port at the output node. The output port is needed for

measuring the output impedance of the cascode stage. The circuit diagram

is shown in Fig. 5.

The properties of the input port are shown in Fig. 6 and those of the

output port are given in Fig. 7. In order to measure the output impedance of

the cascode stage, we open up an ADE (Analog Design Enviroment) interface,

as shown in Fig. 8 and choose the sp (S-parameter) analysis from the menu,

as shown in Fig. 9.

Run the simulation and the results can be found in Results – Direct

Plot – Main Form menu. The “Main Form” menu is shown in Fig. 10.

In many cases, the parameter of Z22 can be approximated as the output

impedance and in this design we use Z22 to denote the output impedance

Zout, and Z11 to denote the input impedance Zin.

Plot the output impedance values (real part and imaginary part for Z22)

and record the values:

Z22,real =

Z22,imag =

Now, we can construct an output impedance matching network to convert

the measured Z22 to 50 Ω. The impedance matching process is done using

Agilent ADS Smith Chart utilities and we only gives the results here. The

matching network is shown in Fig. 11 and the output impedance looking

into the matching network from the output port is shown in Fig. 12(a) for

14

its real part and Fig. 12(b) for its imaginary part respectively. We see that

the output impedance looking into the output matching network is indeed

close to a 50Ω resistor.

We then replace the ideal matching network that we have justed obtained

with actual IBM components as shown in Fig. 13. By using the trial-and-

error approach on the inductor turns (n) and capacitor multiplicity (m), the

resulted matching can be close to the ideal matching network. This is verified

by the output return loss S22 shown in Fig. 15. The S-parameter menu can

be selected, as shown in Fig. 14.

In the following sections, we always use ideal L-C components for the

initial design and then replace them with IBM components.

15

Figure 5: Basic cascode amplifier with port-setup for output impedance mea-

surement.

16

Figure 6: Properties of the input port.

17

Figure 7: Properties of the output port.

18

Figure 8: ADE (Analog Design Environment) setting with ideal matching

network components.

19

Figure 9: S-parameter analysis select menu.

20

Figure 10: Output impedance measurement by plotting Z22.

21

Figure 11: Cascode amplifier with the ideal output impedance matching

network.

22

(a) real part

(b) imarginary part

Figure 12: Output impedance of the cascode amplifier with the ideal output

matching network.

23

Figure 13: Cascode amplifier with the IBM output impedance matching

network.

24

Figure 14: Output return loss measurement by plotting S22.

25

Figure 15: Output return loss S22 of cascode amplifier with the IBM output

impedance matching network.

26

4 Stability Analysis and Source/Gate Degen-

eration

A low-noise amplifier could oscillate when its parasitics form a positive feed-

back loop. The unconditional stability criteria of LNAs are:

1. K > 1 and;

2. |∆| < 1;

The definitions of K and ∆ can be found in any RF/Microwave book. In

order to find out whether the LNA designed earlier and shown in Fig. 13 is

stable or not, we plot its K value in Fig. 16, where we observe that K < 1

at the carrier frequency 2.4 GHz, revealing that the LNA is unstable.

To stabilize an RF amplifier, a common method is to add negative feed-

back in the amplifier’s transistor’s source terminal. A source degeneration

inductor is typically used to achieve this. Practically, a small inductor < 1nH

connected to the transistor’s source terminal could yield K > 1. This, how-

ever, only satisfies the first criterion. To satisfy the second criterion, another

inductor in the transistor’s gate terminal needs to be added.

Shown in Fig. 17 is the designed LNA with source-gate degeneration.

The K value can be obtained from sp (S-parameter) analysis form shown in

Fig. 18. It is seen that K > 1, as shown in Fig. 19.

In Spectre, there is no ∆ evaluation. Instead it gives a B1f value, which

is obviously not the ∆ value according to the SpectreRF user manual. As-

suming B1f value resembles ∆, we plot B1f v.s. frequency, as shown in Fig.

20. We can see that B1f < 1 at 2.4 GHz.

We measure the input impedance looking into the gate degenerated in-

ductor, as shown in Fig. 21 and Fig. 22. Record the input impedance Z11:

1. Z11,real =

2. Z11,imag =

27

Figure 16: Stability factor K < 1 at the input port of Fig. 5.

28

Figure 17: Cascode amplifier with source and gate inductive degeneration.

29

Figure 18: Stability analysis Spectre menu.

30

Figure 19: Stability factor K > 1 with inductive source degeneration.

31

Figure 20: Stability factor |∆| < 1 with gate inductive degeneration.

32

Figure 21: Input impedance looking into the gate degeneration inductor (real

part).

33

Figure 22: Input impedance looking into the gate degeneration inductor

(imaginary part).

34

5 Maximum-Power-Gain Input Impedance Match-

ing

The procedures for maximum-power-gain input impedance matching is iden-

tical to the procedures for output impedance matching presented in in Section

??. We briefly summarize the procedures : (1) measure Z11 looking into the

gate degeneration inductor; (2) design LC matching network transforming

Z11 to 50Ω.

The designed input impedance matching network is shown in Fig. 23 and

the input return loss S11 is shown in Fig. 24. Since we have already done

the maximum-power output impedance matching in Section ??, so at this

moment, the input and output terminals are both matched to 50Ω external

ports respectively. The resulted power gains are transducer power gain (GT ),

available power gain (GA) and operating power gain (GP ) shown in Fig. 25

where the three gains coincide at the same point at 2.4 GHz.

But, so far, we have not discussed another important issue in LNA design,

noise. Spectre provides a convenient Noise Figure (NF) calculation menu, as

shown in Fig. 26. NF of the LNA of Fig. 23 is shown in Fig. 27. The noise

figure at 2.4 GHz is approximately 2 dB, which meets the specifications of

most modern wireless applications including Bluetooth.

35

Figure 23: Maximum-power-gain input impedance matching with IBM de-

vices.

36

Figure 24: Input return loss after input impedance matching by IBM devices.

37

Figure 25: Transducer gain: GT ; Available power gain: GA; Power gain: GP .

38

Figure 26: Noise figure analysis menu.

39

Figure 27: Noise figure of the amplifier with maximum-power-gain input

impedance matching networks.

40

6 Minimum-Noise-Figure Input Impedance Match-

ing

In the last section, we have seen the NF for the maximum-power-gain LNA.

Can the NF be even lower? The answer is YES. By designing an appropriate

input matching network, the NF can be made close to the minimum value,

NFmin, defined in RF/Microwave theories.

To design the minimum-NF input impedance matching network, we need

to first know the optimum source impedance Zs,opt that gives the minimum

NF. (We are used to 50Ω source impedance. But it would not give us the

optimum NF.) The optimum source impedance Zs,opt can be measured by

the circuit configuration in Fig. 28 by putting an input port to the gate-

degenerated inductor. The optimum Zs,opt can be estimated by plotting

Noise Circles (NC) with the menu form shown in Fig. 29. A 0.9-dB noise

circle is plotted in a Smith chart in Fig. 30. We choose a point close to the

real axis (x-axis) for the optimum source impedance, e.g., we have picked

the point: Zs,opt = (3.82 + j ∗ 0.21) ∗ 50Ω, where the 50Ω is the reference

characteristic impedance. Then a matching network is designed to make

the output impedance looking into the matching network identical to the

optimum source impedance Zs,opt. This noise matching network is designed

and shown in Fig. 31. The NF at 2.4 GHz is calculated by Spectre to be

around 1.4 dB, as shown in Fig. 32. Another confirmation of this NF is to

plot the NC=1.4dB in the Smith chart, as shown in Fig. 33 where the 1.4-

dB circle passes the Smith chart origin, which indicates 1.4 dB NF is indeed

realized by the designed noise matching network.

41

Figure 28: Measurement of optimal source output impedance Zs,opt for min-

imum noise figure.

42

Figure 29: Noise circle selection form in Spectre output menu.

43

Figure 30: Noise circle in Smith chart for NF=0.9 dB.

44

Figure 31: Noise matching network with IBM devices.

45

Figure 32: Noise figure at 2.4 GHz after noise matching network by IBM

devices.

46

Figure 33: Noise circle at NF=1.4 dB passing Zs = 50Ω origin for the de-

signed matching network in IBM devices.

47

7 Linearity: P1dB and IIP3

As with any other RF amplifiers, the linearity of an LNA is measured by its

input 1dB compression point (P1dB) and its input third-order intercept point

(IIP3). The LNA designed in Fig. 23 is used to demonstrate the linearity

measurement procedures. The circuitry is reproduced in Fig. 34.

SpectreRF provides convenient tools to measure P1dB and IIP3. The

measurement procedures include the following three steps:

1. Input and output port setting.

2. Hb (harmonic balance) and hbac (harmonic balance AC) analyses

selection.

3. SpectreRF output plot form selection.

The input port setting is shown in Fig. 35 and the output port setting is

shown in Fig. 36. In the input port, the parameter Frf1 is used to name the

carrier frequency of 2.4 GHz in the hb analysis and the parameter Prf1 is a

swept variable to sweep input-signal power levels in dBm for hb and hbac

analyses. We temporarily set Prf1=-30dBm.

SpectreRF uses hb (harmonic balance) to calculate the nonlinearity ef-

fects such as P1dB and uses hbac (haronic balance AC) to calculate IIP3

when it is combined with hb analysis. The hb analysis selection form in

the ADE is shown in Fig. 37 where the ”Maxham” in the selection form

is to inform SpectreRF the number of sidebands with respect to the carrier

frequency, 2.4GHz, in its calculation. The input-signal power level is swept

from -100 dBm (small signal) to 10 dBm (large signal) in a step of 10dB per

calculation.

The hbac analysis is selected in the form as shown in Fig. 38 where

the input signal sweep range is set at a Single-Point at 2395 MHz. This

frequency can be interpreted as ω1 = 2395MHz and SpectreRF assumes

another frequency is the carrier frequency such that ω2=2400 MHz. So the

3rd-order inter-modulation frequencies are:

48

2ω1 − ω2 = 2390MHz

2ω2 − ω1 = 2405MHz

As shown in Fig. 40, ω1 = 2395MHz is chosen as the 1st-order harmonic

by SpectrRF and 2ω2−ω1 = 2405MHz is chosen as the 3rd-order harmonic.

The resultant 3rd-order input intercept point IIP3 is plotted in Fig. 41.

The input 1dB compression point can be calculated by hb analysis as

shown in Fig. 42. Because there is only one single frequency of 2.4 GHz in

the simulation, the 1st-order harmonic is selected to be 2.4 GHz. By clicking

the output port, the 1-dB compression point is plotted in Fig. 43.

Figure 34: Linearity measurement for LNA with maximum-power-gain input-

output matching in Fig. 23.

49

Figure 35: IIP3 measurement input port setting.

50

Figure 36: IIP3 measurement output port setting.

51

Figure 37: HB (harmanic balance) in ADE analyses selection form.

52

Figure 38: HB AC analysis in ADE analyses selection form.

53

Figure 39: Parameter settings for HB and HBac analyses in Cadence ADE.

54

Figure 40: Plot IIP3 in SpectreRF.

55

Figure 41: IIP3 of the LNA.

56

Figure 42: Plot input 1dB compression point in SpectreRF.

57

Figure 43: 1dB compression point for the LNA.