EL 402Spring 2009 - Ilker Hamzaoglu1 EL402 VLSI System Design II Spring 2009 Instructor: Ilker Hamzaoglu [email protected] MDBF 1037 Teaching Assistant:

EL 402 Spring 2009 - Ilker Hamzaoglu 1

EL402 VLSI System Design II Spring 2009

• Instructor: Ilker Hamzaoglu [email protected] MDBF 1037

• Teaching Assistant: Onur Can Ulusel [email protected] MDBF 1042 • Web Site: http://people.sabanciuniv.edu/~hamzaoglu/el402/el402.htm

http://people.sabanciuniv.edu/~hamzaoglu/el402/el402.htm


Course Structure

• EL 402 3.00 VLSI Systems Design II M 11:40 am - 12:30 pm FENS L058 R 11:40 am - 1:30 pm FENS L058

• EL 402R 0.00 VLSI Systems Design II Rec. M 12:40 pm - 1:30 pm FENS L058


Course Description

• This course introduces System-on-a-chip (SoC) ASICs and it describes various embedded cores used in SoC ASICs. It then discusses the design and verification of SoC ASICs. In this course, students will also gain practical design experience by using Arm7 simulation model, Modelsim (Mentor Graphics) and Design Compiler (Synopsys) CAD tools to implement and verify a prototype SoC ASIC. The SoC ASIC will be implemented using Verilog HDL and standard cell based design methodology.


References

• Lecture Slides

• Arm Inc. (http://www.arm.com) Technical Documents (Technical Specifications, Technical Reference Manuals, White Papers, and Company Presentations)

• Textbooks: – ARM System-on-chip Architecture, Steve Furber, Addison Wesley,

2nd Edition, 2000– Computers as Components: Principles of Embedded Computing

System Design, Wayne Wolf, Morgan Kaufmann, 2nd Edition, 2005– Reuse Methodology Manual for System-on-a-Chip Designs,

Michael Keating, Pierre Bricaud, Russell John Rickford, Kluwer Academic Publishers, 3rd Edition, July 2002

http://www.arm.com/


Tentative Schedule• Introduction

– System-on-a-chip (SoC) ASICs– Core-based and Platform-based Design

• SoC Embedded Cores – Embedded Microprocessors, Arm Cores – Hardware Accelerators– On-chip Interconnects, Arm AMBA – Memory Controllers, DMA, Interrupt Controller– Device Interfaces, Image Sensor Interface

• SoC ASIC Design– System Level (Architecture) Design – Behavioral (Architectural) Modeling, SystemC– Behavioral (Architectural) Synthesis

• SoC ASIC Verification

• SoC ASIC Debugging


SoC ASIC Design Project

SRAMController

Arm7

Cache

Clock Dividers

PLL(Model)

Register Files

Image Processing Accelerator

AHB Bus

Arm7TDMI (Model)

AHB BusDecoder

AHB Bus Mux

SRAM(Model)

Crystal Oscillator(Model)

TestBench

Image Sensor(Model)

ImageSensor

Interface


Grading

• Attendance 10%• SoC ASIC Design Project 40%• Paper Presentation 10% • Final Exam 40%

• Students will work in groups of two for the project. The project will be done using the Sun Workstations in the VLSI Design Lab which is located in MDBF 1062.

• Cheating in the project and the exam is not allowed. It will be strongly penalized.